JPH0365895B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a package structure for a semiconductor integrated circuit, and in particular, the present invention relates to a package structure for a semiconductor integrated circuit, and in particular, the use of minute columns of solder for electrically and mechanically bonding a semiconductor integrated circuit substrate and a package substrate. The present invention relates to an integrated circuit device using a body.

[Background of the Invention] In order to complete an integrated circuit device, it is necessary to attach a semiconductor substrate on which an integrated circuit or the like is formed to a package substrate, and to make electrical connections therebetween.

By the way, various methods have been proposed and put to practical use as techniques for the above-mentioned mounting and connection, but among them, micro columns of solder are used to connect the semiconductor substrate and the package substrate. There is a method for simultaneously obtaining electrical connection and mechanical connection.

In this method, for example, as disclosed in U.S. Pat. or 40
A solder composition containing 95% to 60% by weight of lead is formed in advance, and the solder composition is heated with the semiconductor base package substrate facing each other with a predetermined gap between them. By melting (reflowing) the composition and forming minute pillars of solder between both terminal parts, electrical connection between the terminal parts and mechanical bonding between the semiconductor substrate and the package substrate can be achieved. It is designed so that it can be obtained.

According to this bonding method using micro columns of solder, even if there are multiple terminals to be electrically connected, all connections can be completed at the same time with just one melting process, and Since mechanical coupling can also be obtained at the same time, this method has recently come to be widely adopted for integrated circuit devices with a large number of connection terminals.

On the other hand, the degree of integration of integrated circuits has continued to increase, and in particular, the number of terminals drawn out in so-called LSIs has reached several hundred.

However, when the method using the solder microcolumns is applied to the connection between a semiconductor substrate with a large number of terminals and a package substrate, a problem has arisen in that the integrated circuit device is more likely to fail. Ta. This failure mainly appears in the form of poor continuity between the respective terminals of the semiconductor substrate and the packaging substrate, which are electrically connected by the solder microcolumns. This is because as a result of repeated stress applied to the solder microcolumns due to the difference in thermal expansion coefficient between them, this portion undergoes thermal fatigue fracture and electrical disconnection occurs. This stress is caused by a difference in the coefficient of thermal expansion of the integrated circuit device members, and when the solder microcolumns have a general spherical shape, they are concentrated in the solder layer in the very vicinity of the semiconductor substrate. In order to solve these problems, several proposals have been made as shown below.
(1) Solid State Technology by P. Lin et al., 48
“Design” in ~54 pages, July, (1970)
Considerations for a Flip-Chip Joining
The paper titled ``Technique'' discusses controlling the lifetime by adjusting the area ratio of the semiconductor substrate-side bonding interface and the dielectric substrate-side bonding interface.

(2) In Japanese Patent Publication No. 43-28735, a large-volume solder bump for shape control is provided approximately at the center of a semiconductor substrate, and electrical connections are placed approximately at the periphery of the semiconductor substrate so as to surround the solder bump. It has been shown that solder bumps for electrical connection are formed in advance, and the semiconductor substrate is lifted by the surface tension of the molten solder for shape control during the connection melting process between the semiconductor substrate and the dielectric substrate, thereby controlling the solder for electrical connection into a columnar shape. .

(3) In JP-A-49-88077, a raised region called a boss or petestal made of a polymer that can be removed with a solvent is formed on a dielectric substrate, and the raised region is softened during the mounting process of a semiconductor substrate. At the same time, pressure is applied from the heating means, and the electrical connection solder placed on the semiconductor substrate so as to surround the raised area is bonded to the connection terminal on the dielectric substrate side, and then during the cooling process, the raised area is returned to its original state. It is disclosed that a columnar structure is obtained by stretching solder for electrical connection by the force of returning to thickness.

(4) In JP-A No. 56-45041, a protruding step is provided on the dielectric substrate side of the semiconductor substrate mounting portion, and electrical connection terminals are arranged on the protruding portion of the substrate and the lower surface portion surrounding the protruding portion. The solder bumps provided on the semiconductor substrate side are fused and connected to these terminals, and the solder bumps are stretched to a length corresponding to the step of the protrusion to form a columnar structure.

(5) Japanese Patent Publication No. 53-45280 discloses that by forcibly moving at least one of the semiconductor substrate or the dielectric substrate and solidifying the solder while maintaining a predetermined gap, the solder bump shape is made thinner at the center. It discloses how to do so.

(6) Japanese Unexamined Patent Publication No. 59-5637 discloses that the solder connection portion between the semiconductor substrate and the dielectric substrate is shaped like an hourglass.

Note that in the above disclosure, the dielectric substrate refers to a substrate for a package, and this term will be used hereinafter.

According to these publicly known matters (1) to (6), the thermal fatigue life of the solder micro columns has a large influence on the side projection shape of the columns, and the shape that helps improve the life. and the location is disclosed.

However, in these disclosures (1) to (6), as the integration density and wiring density of elements within a semiconductor substrate improve, electrical connections between the substrate and the dielectric substrate become finer and denser. Moreover, the problem that arises when the number of connection points increases is that it is necessary to realize a bond with a predetermined shape and size while preventing contact between the densely arranged solders, which are responsible for electrical engagement, on almost the entire surface of a large chip. and the need for this solution.

On the other hand, for example AJBlodgett and DRBarbour
by IBM J.Res.Develop., Vol. 26, No. 1,
“Thermal” on pages 30-36 (1982)
Conduction Module：A High-Performance
The paper titled ``Multilayer Ceramic Package'' discloses a processor device for large electronic computers that requires particularly high calculation speed.According to this disclosure, a large number of semiconductor elements are integrated in a limited semiconductor substrate. , a semiconductor substrate that shortens the length of electrical interconnections between each element as much as possible, that is, LSI
The chip and the dielectric substrate on which the LSI chip is mounted and which electrically connects the chip and external circuits are wired in multiple layers and at high density, thereby substantially shortening the length of the relay connection wiring. A configuration in which electrical connections are made by densely arranged columns of solder particles is shown, and in this case, the LSI chip requires electrical connections using as many as 121 solder particles. However, in reality, the development of LSI chips that integrate semiconductor elements at a higher density and increase the wiring density while increasing the chip size is progressing, and along with this, the number of connection points with the board using micro solder has also increased. The situation calls for a significant increase. This situation cannot be dealt with simply by arranging electrical connections only at the periphery of the semiconductor substrate, as seen in the prior art techniques (1) to (6) above. The reason for this is that the number of connection points cannot be increased too much.

[Purpose of the invention]

The present invention was made in view of the above-mentioned circumstances, and its purpose is to prevent thermal fatigue even when the number of connection points is extremely large in LSI etc., and the semiconductor substrate is large and the influence of differences in thermal expansion coefficients is large. An object of the present invention is to provide an integrated circuit device that can provide a sufficient life span without causing disconnection failures in solder microcolumns.

[Summary of the invention]

In order to achieve this object, the present invention has a side projection shape of a solder microcolumn that electrically connects and mechanically connects a semiconductor substrate and a dielectric substrate (a package substrate) to a bonding surface of the semiconductor substrate. The microcolumns existing in the center and the microcolumns existing in the periphery are different, with the microcolumns in the center having a side projection shape that bulges outward, and the microcolumns in the periphery having a shape that bulges inward. It is characterized by a concave side projection shape.

[Embodiments of the invention]

Hereinafter, an integrated circuit device according to the present invention will be explained in detail with reference to illustrated embodiments.

FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a perspective view thereof.
10 is a semiconductor substrate, 11 is a micro columnar body of solder,
12 is a dielectric substrate serving as a package substrate; 14
1 is a connection pin, and 15 and 16 are terminal portions.

The semiconductor substrate 10 is, for example, an LSI chip in which a solid-state circuit constituting a processor for a large computer is formed on a silicon substrate with a size of 13 mm x 13 mm, and a large number of terminal portions 15 are formed in a predetermined pattern on one surface. They are arranged in a matrix.

The dielectric substrate 12 is made of, for example, a multilayer wiring board made of alumina as a base material, and on its surface facing the semiconductor substrate 10, terminal portions 16 are arranged in a matrix at mutually facing positions corresponding to the terminal portions 15. It has been done.

The terminal portion 15 is a chromium layer formed on the surface of the semiconductor substrate 10 to a thickness of approximately 1000 Å from the substrate side.
It is formed by patterning a laminated metal layer consisting of a copper layer with a thickness of 1000 Å and a gold layer with a thickness of about 2000 Å, and functions as a first bonding interface with the solder micro columns 11.

Similarly, the terminal portion 16 has a copper layer formed on the surface of the dielectric substrate 12 by firing as the lowest layer, and a nickel layer with a thickness of about 3000 Å and a metal layer with a thickness of about 2000 Å are plated on top of this in sequence. It is patterned,
A second bonding interface with the solder microcolumns 11 is formed.

The solder microcolumns 11 are placed between the terminal portions 15 and 16, heated and melted, alloyed at the first and second bonding interfaces, and then returned to room temperature.
This provides electrical connection and mechanical coupling between the semiconductor substrate 10 and the dielectric substrate 12.

Here, the terminal portions 15 of the semiconductor substrate 10 and the terminal portions 16 of the dielectric substrate 12 both have a circular planar shape, and are arranged in corresponding positions with a uniform pitch of about 200 μm. Terminal parts 15 and 1
Approximately 2,500 solder microcolumns are arranged between 6 and 6.

The diameter of the circular portion is the same for all terminal portions 15 and approximately 100 μm, but in the terminal portion 16, the diameter is approximately 100 μm in the inner peripheral region corresponding to the central portion of the semiconductor substrate 10. The outer peripheral region corresponding to the peripheral portion of the semiconductor substrate 10 has a diameter of approximately
The shape of the second layer is controlled so that the area gradually increases from 110 μm to about 160 μm.
They constitute the group 16b.

On the other hand, the solder minute columns 11 are formed as follows. That is, first, on each of the terminal portions 15 on the semiconductor substrate side, a plating method is applied.
By using well-known methods such as vapor deposition and subsequent heating and cooling treatments, approximately spherical so-called solder bumps are formed with a controlled volume of approximately 6 x 10 ^-4 mm ² and then solder bumps are formed on this semiconductor substrate. 10 is placed on the dielectric substrate 12 which has been kept horizontally in advance, with the terminal portions 15 and 16 facing each other accurately, and the semiconductor substrate 10 is subjected to forces other than gravity. After keeping external forces from acting on it,
The solder bumps are melted and subsequently returned to room temperature by heat treatment with flux in air or without flux in a controlled atmosphere such as hydrogen, nitrogen, argon, or fluorocarbon. , micro columns 11 of solder are formed between the terminal portions 15 and 16 by alloying at the first and second bonding interfaces.

Here, in this process, each terminal portion 15
If we consider what happens when the solder bump is brought into a molten state, the molten solder first becomes alloyed at each second bonding interface of the corresponding terminal portion 16, leaving only this portion wet. . on the other hand,
Since the semiconductor substrate 10 is simply placed as described above, when the solder bump melts, it will float above it, and the height h of the solder at this time is determined by the weight of the semiconductor substrate 10, and This value is in balance with the buoyant force or repulsive force determined by the surface tension of all the solders in a molten state on the terminal portion 16.

However, at this time, since the area of the terminal part 16a in the inner circumferential area described above is the same as that of the terminal part 15 and is not very wide, the solder in this part does not reach the second bonding interface of the terminal part 16a. On the other hand, the area of the terminal portion 16b in the outer peripheral area is considerably larger than that of the terminal portion 15, so the solder in this portion is used as the second bond of the terminal portion 16b. It is quite widespread at the interface.

On the other hand, as mentioned above, the amount of solder at each terminal is controlled to be the same, and therefore, if a certain value is assumed as the solder height h, the amount of solder at each terminal is controlled to be the same. As shown in FIGS. 1 and 2, the side projection shape of the microcolumn 11 is that the terminal portion 16a located in the inner peripheral area has an approximately spherical shape with the central portion bulging outward; The terminal portion 16b of the region has a substantially convex shape with the central portion recessed inward.

In addition, at this time, the typical value of the height h in the above case is about 80 μm, and the maximum diameter of the minute columnar body 11a in the inner peripheral area in this case is about
130 μm, and the minimum diameter of the micro columnar bodies 11b in the outer peripheral region was about 70 μm.

Next, the results obtained in this example will be explained.

Figure 3 shows the distribution of integrated circuit devices subjected to repeated temperature changes from -55°C to +150°C to cause them to deteriorate at an accelerated rate, causing disconnection failures in the connections made by minute columns of solder and reaching the end of their service life. In the figure, A is the characteristic of one embodiment of the present invention,
B is a characteristic of a conventional example shown for comparison. It should be noted that the conventional example referred to herein refers to one made without giving any control to the side projection shape of the solder microcolumns. Further, the lifespan here is expressed by the number of temperature cycles until an integrated circuit device including a single semiconductor substrate 10 loses its circuit function.

As is clear from FIG. 3, according to the embodiment of the present invention, an average life of about 2000 cycles is obtained, and from this, the life at the -3σ level is about
It is estimated to last 1,500 cycles, which is sufficiently superior to conventional models.

Note that the above temperature difference setting is a strict condition artificially given to accelerate deterioration, and in a highly controlled environment, the range of temperature change that is effectively applied to integrated circuit devices is sufficiently small. It is becoming.

Therefore, it can be easily inferred that the integrated circuit device according to the above embodiment will have a lifespan much longer than the lifespan read from FIG. 3 under actual operating conditions.

Thermal stress supported by the solder microcolumns is larger toward the periphery, but in this example structure, the degree of shape control is also greater, and the stress is not concentrated in one part but spread over a wide area in the height direction of the columns. It is starting to be shared. The reason why a long life can be achieved despite the large semiconductor substrate mounting structure is due to the above-mentioned stress sharing.

Furthermore, in this embodiment, the chip 10 and the substrate 12
are directly electrically engaged over almost the entire surface by a large number of approximately 2000 minute solders 11. This simplifies the internal wiring in the chip 10 and the internal wiring in the substrate 12, contributes to reducing the wiring length and the number of wiring layers, and ultimately contributes to increasing the operating speed of the integrated circuit device as a whole. It's large.

Furthermore, in this embodiment, although the minute solders 11 are arranged at a high density, the solder 1
No short circuit occurs between the two. This is achieved by a configuration that allows solder melting and shape control without applying external forces that cause mechanical shock, and is one of the advantages of the structure of the present invention.

Next, FIG. 4 shows another embodiment of the present invention. In this embodiment, in order to control the shape of the solder minute pillars 11, a terminal portion 15 of the semiconductor substrate 10 is
The area is made to increase sequentially from the terminal portion 15a in the inner peripheral region to the terminal portion 15b in the outer peripheral region.

Further, FIG. 5 shows still another embodiment of the present invention, in which the terminal portion 1 of the semiconductor substrate 10 is
5 and the terminal portion 16 of the dielectric substrate 12 are sequentially increased from the terminal portions 15a, 16a in the inner peripheral region to the terminal portions 15b, 16b in the outer peripheral region. .

In the embodiments shown in FIGS. 4 and 5, the side projection shape of the solder microcolumns 11 ranges from a substantially spherical shape 11a in the inner circumferential region to a substantially conical shape 11b in the outer circumferential region. It can be seen that it is continuously controlled throughout and can therefore provide a long life as in the embodiment of FIG.

By the way, in the above embodiments, it is necessary to control the volumes of all the solder bumps to be formed in each terminal portion to a predetermined constant value.

Therefore, various methods can be applied to provide a fixed volume of solder on the terminal portion, but preferably selective plating method,
Either a mask vapor deposition method or a lift-off method is preferable.

Here, the plating method is a method in which a resist film for photolithography is selectively formed on the surface to be plated, and then a metal constituting the solder is plated to obtain selective plating.In the mask vapor deposition method, The solder component metal is selectively deposited using a metal mask. Furthermore, in the lift-off method, a resist film is selectively applied to a predetermined area, then a solder constituent metal is vapor-deposited over the entire surface, and after the resist film is burnt off, the vapor-deposited metal in unnecessary areas is mechanically removed.
Note that it is more efficient to perform these treatments before cutting out the semiconductor substrate from the wafer.

Next, yet another embodiment of the present invention is shown in FIG.

In the embodiments so far, the terminal portions 15 and 16
The area of one or both of these is increased from the inner circumferential region toward the outer circumferential region, thereby controlling the shape of the solder microcolumns. In the embodiment shown in FIG. , the shape of the terminal parts 15 and 16 is controlled by changing the volume of the solder bump that should be attached in advance to one of them without changing the area of the terminal parts 15 and 16. 15 and 16 both have a diameter of about 100 μm, and are patterned and arranged at a pitch of about 200 μm, but the volume of the solder minute columns 11 connecting them is approximately For thing 11a, the maximum is about 6×
10 ^-4 mm ³ , and the outer peripheral region 11b has a minimum of about 3.5×10 ^-4 mm ³ .

Note that such volume control can be achieved by adjusting the exposed area of the terminal portion 15, which is the plating formation region, when selectively forming the resist film, for example, when using the selective plating method as described above. This can be easily done.

In addition, when the amount of solder is different between each terminal as in the embodiment shown in FIG. There is a need. Therefore, one method for this purpose is to temporarily transfer the semiconductor substrate 10 to the dielectric substrate in the process of melting the solder.
2, and after all of the solder is brought into sufficient contact with the terminal portion 16, the pressure may be released.

Here, the reason why the present invention makes it possible to significantly extend the service life as shown in FIG. 3 will be explained.

The height h of the solder micro-columns is made to be sufficiently larger than the volume of the solder bumps previously formed on the terminal portion 15, so that the solder micro-columns 1
If the shape is made into a string shape as shown in 1b,
According to the conventional example described above, the stress applied to the minute columnar bodies 11b when stress is generated should be distributed over a wide area in the height h direction, sufficiently suppressing the occurrence of fracture and achieving a long life. It is still being disclosed.

This height h is given by the buoyancy (repulsion) of the solder in the molten state.At this time, the more spherical the shape of the solder, the greater this buoyancy; Since the buoyant force decreases, if no measures are taken, in most cases the shape of the solder microcolumns will be approximately the same, and a height h commensurate with this will simply be given.

However, in the present invention, as a result of controlling the area of the terminal portion and controlling the volume of the solder as shown in the above embodiments, for example, the inner circumferential region has an almost spherical shape like the minute columnar bodies 11a, and the outer circumferential region has a very small shape. The height h of the columnar bodies 11b is maintained such that a concave shape can be obtained, thereby extending the life of the columnar bodies 11b.

Note that at this time, although the inner circumferential region becomes a minute columnar body 11a having a substantially similar shape, the semiconductor substrate 10
The magnitude of the stress generated due to the difference in coefficient of thermal expansion between the semiconductor substrate 10 and the dielectric substrate 12 increases toward the outer circumferential region of the semiconductor substrate 10, is small in the inner circumferential region, and is almost zero especially in the central region. Therefore, even if the substantially spherical minute columnar bodies 11a exist, there is no possibility that the life will be shortened.

By the way, in the above embodiment, each terminal portion 15, 16 forming a bonding interface with the solder minute columnar body 11 is a laminated metal layer made of chromium, copper, nickel, or gold. In this laminated structure, the chromium layer serves as a metal that maintains the adhesive strength between the semiconductor substrate and the dielectric substrate, and the copper layer maintains the adhesion between the chromium layer and the solder metal on the semiconductor substrate and dielectric substrate. Titanium, molybdenum, tungsten, aluminum, platinum, and silver are used as replacement materials for chromium.
Silver, palladium,
Gold, molybdenum, tungsten or mixtures thereof are provided. Nickel prevents contact between the chromium layer or copper layer and the solder material to maintain stable bonding strength, and copper, platinum, and palladium are used as substitute materials. Gold prevents oxidation of the nickel layer and provides wettability to the solder material, and can be replaced with silver, platinum, or palladium. However, when soldering is performed in a clean and controlled atmosphere, the metal layer may be configured without the gold or its substitute material. Furthermore, the metal layer on the dielectric substrate is not limited to one formed by a method such as vapor deposition, but may also be formed by applying nickel plating, gold plating, etc. to metal wiring such as copper, molybdenum, tanksten, or gold-palladium fired conductor. It may be something that has been done.

The semiconductor substrate 10 is generally made of silicon, but it may also be made of a compound semiconductor such as gallium arsenide, and its size can be arbitrarily changed depending on the combination with the substrate material to be bonded together with the semiconductor substrate.

In addition to alumina, the dielectric substrate 12 is preferably made of mullite, which has a small dielectric constant and is advantageous in terms of high speed, or a substrate made of organic resin. However, in applications where high speed is not required, glass, silicon carbide, It may also be an insulator such as aluminum nitride or silicon nitride. Also, substrates other than these can be used if they meet the design specifications for the circuit configuration, but typically a substrate with a dielectric layer formed on a semiconductor such as silicon and a wiring pattern provided. Alternatively, the dielectric substrate 12 also includes a substrate in which a dielectric layer is formed on a metal plate and a wiring pattern is provided.

For the micro-columnar bodies 11, solder based on an alloy such as 95% lead-5% tin is generally used; Alloys with compositions such as 40% lead and 60% tin, and lead-tin based alloys such as bismuth, antimony, silver, gold,
A system to which a third metal such as copper or indium is added can also be used. If higher reliability is required, the lead-tin alloy can be replaced with other alloy materials such as gold-germanium, gold-silicon, and gold-tin.

In the present invention, the package structure is intended to improve the shape of the minute solder 11b in the outer circumferential region, thereby relieving the deterioration in reliability caused by larger chips and higher density connections. At this time, in the above embodiment, the shape of the minute columnar bodies 11b is gradually modified as it moves toward the outer periphery. However, in the present invention, it is not essential that the shape be controlled continuously, but the shape may be controlled in steps, and furthermore, the minute columnar bodies 11b have the same shape throughout the outer peripheral region. There is no problem even if it is.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to easily control a predetermined shape in a necessary area without requiring any shape control means other than micro columns of solder between a semiconductor substrate and a dielectric substrate. Since the life characteristics can be sufficiently improved by performing the above steps, it is possible to solve the problems of the prior art and easily provide an integrated circuit device that is extremely effective for LSI packaging.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing an embodiment of an integrated circuit device according to the present invention, FIG. 2 is a perspective view thereof, FIG. 3 is a characteristic diagram showing an example of characteristics obtained with an embodiment of the present invention, and FIG. 5, and 6 are cross-sectional views showing other embodiments of the present invention. 10...Semiconductor substrate, 11...Minute columnar body, 12
...Package substrate (dielectric substrate), 16...
Terminal section.

Claims (1)

[Scope of Claims] 1. In an integrated circuit device in which electrical connection and mechanical bonding of an integrated circuit substrate to a package substrate are obtained by welding micro-columns of solder, a side view after welding the micro-columns of solder. By controlling the shape, the side projection shape of the microcolumns existing in the center of the integrated circuit substrate changes from an outwardly bulging curve to an inwardly concave shape. An integrated circuit device characterized in that it is configured to have a curve that changes sequentially. 2. The integrated circuit device according to claim 1, wherein the change in the side projection shape of the minute columnar body is a continuous change. 3. The integrated circuit device according to claim 1, wherein the change in the side projection shape of the minute columnar body is a step-like change. 4. In claim 1, the side projection shape of the minute columnar bodies is controlled by changing the solder joint area of the terminal portions of the package substrate and the semiconductor substrate to be soldered to each other. An integrated circuit device characterized by being configured as follows. 5. Claim 4 is characterized in that the change in the solder joint area of the terminal portion is provided by the terminal portion of either one of the package substrate or the semiconductor substrate, or the terminal portion of both. integrated circuit device. 6. The integration according to claim 1, characterized in that the side shape of the micro-columns is controlled by changing the volume of the solder that forms each of the micro-columns. circuit device.