JPH0364865B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image processing apparatus having a digital computer.

Conventionally, various surface potentials of a recording medium are detected, and according to the detected values, a process means for image formation is controlled so that the surface potential becomes a predetermined value. Efforts are being made to optimize image forming conditions. However, the density of the formed image may not be appropriate. In that case, each part of the device must be checked using special measuring instruments to find the cause.
This method has the drawback of requiring a great deal of time and effort.

SUMMARY OF THE INVENTION The present invention eliminates the above-mentioned drawbacks, and aims to provide an image processing apparatus such as a copying machine that allows easy investigation of abnormalities in the apparatus related to image density.

That is, the present invention includes a plurality of process means 16, 22, 23,
25, 45 to 48, detection means 56, 57 for detecting the surface potential of the recording medium, and the above-mentioned detection means 56, 57 for detecting the surface potential of the recording medium, and the above-mentioned detection means 56, 57 for detecting the surface potential of the recording medium, and for optimizing the image forming conditions related to the image density, When controlling a plurality of process means, the detection signals detected by the detection means at different timings for controlling the respective process means are stored in the storage means, and the detection signals from the detection means are stored in a predetermined manner. a digital computer 41 that performs calculations and outputs a control signal 49 to the processing means for controlling the processing means according to the calculation result; and a display means 6 that displays numerical values.
1, a first display mode (step) in which a plurality of detection signals stored in the storage means are read out and displayed on the display means independently of the detection timing;
53 to 61) and when the control of the process means for optimizing the image forming conditions is not being executed, the surface potential of the recording medium is detected by the detection means and the detected surface potential is displayed on the display means. An object of the present invention is to provide an image processing apparatus having means SW1, SW6 to SW8 for selectively switching the second display mode (step 51).

This makes it possible to quickly and easily check for abnormalities in the image forming apparatus with a simple operation.

FIG. 1 is a sectional view of a copying apparatus to which the present invention is applied.

The surface of the drum 11 is made of a three-layer photoreceptor using a CdS photoconductor, is rotatably supported on a shaft 12, and starts rotating in the direction of an arrow 13 in response to a copy command.

When the drum 11 rotates to the normal position, the document placed on the document table glass 14 is irradiated with the irradiation lamp 16 that is integrated with the first scanning mirror 15, and the reflected light is used for the first scanning. Mirror 15 and second
It is scanned by a scanning mirror 17. First scanning mirror 1
5 and the second scanning mirror 17 move at a speed ratio of 1:1/2, so that the original is scanned while the optical path length in front of the lens 18 is always kept constant.

The above reflected light image shows the lens 18 and the third mirror 19.
After passing through the fourth mirror 20, the exposure section 21
Then, an image is formed on the drum 11.

After the drum 11 is charged (for example, +) by a primary charger 22, an image irradiated by an illumination lamp 16 is slit-exposed in the exposure section 21.

At the same time, AC or primary charge removal with a polarity opposite to that of the primary charge (for example, -) is performed by a charge remover 23, and then a high-contrast electrostatic latent image is formed on the drum 11 by full-surface exposure using a full-face exposure lamp 24.
The electrostatic latent image on the photosensitive drum 11 is then transferred to a developing device 25.
It is visualized as a toner image.

The transfer paper 27-1 or 27-2 in the cassette 26-1 or 26-2 is transferred to the paper feed roller 28.
-1 or 28-2, the rough timing is taken by the first register roller 29-1 or 29-2, and the second register roller 30
The photosensitive drum 11 is sent out in the direction of the photosensitive drum 11 with accurate timing.

Next, while the transfer paper 27 passes between the transfer charger 31 and the drum 11, the toner image on the drum 11 is transferred onto the transfer paper.

After the transfer is completed, the transfer paper is guided to the conveyor belt 32 and further to a pair of fixing rollers 33-1, 33-2, where it is fixed by pressure and heat, and then discharged onto the tray 34.

After the transfer, the surface of the drum 11 is cleaned by a cleaning device 35 composed of an elastic blade, and the process proceeds to the next cycle.

In addition, in Fig. 1, TK indicates a numeric keypad (numeric keys from 0 to 9) for inputting the number of copies, and the numeric value entered using this numeric keypad is displayed on the display 61, and the copying machine responds to the entered number n. By repeating scanning the original as many times as the number of responses received, n copies are made.

FIG. 2 shows the control circuit of the above-mentioned copying apparatus, in which 40 and 41 are master and slave microcomputers, the master computer 40 controls the copying process, and the slave computer 4 controls the copying process.
1 is used to set (optimize) conditions for the process units 45 to 48 and display them.

The master computer 40 and the slave computer 41 are connected by signal lines 42 and 43. The signal line 42 sends data from the CPU 40, and the signal line 43 sends out a strobe signal from the CPU 40. From the CPU 40, a high voltage primary transformer 45 supplies high voltage to the primary charger 22, a high voltage secondary transformer 46 supplies high voltage to the static eliminator 23, a lamp circuit 47 supplies lighting power to the illumination lamp 16, and a developer via a signal line 44 from the CPU 40. A control timing signal is sent to control the operation of a process unit such as a developing bias transformer 48 that applies a developing bias to the device 25.

The process units 45 to 48 are digital
Analog converter (D/A converter) 50~
The D/A converter is configured to output a voltage corresponding to the output of the drum 11, and a signal line is connected to the D/A converter in order to control each process unit 45 to 48 in order to optimize the surface potential of the drum 11. 49, digital data (control signals) are sent from the CPU 41.

The CPU 41 is provided with a clock generator 55, and the clock signal generated by the clock generator 55 is of course used as a clock for the CPU 41 itself, but it is also sent via a signal line 54 to a clock synchronized D/D/ It is supplied to A converters 50 to 53 and is also used as a clock source for the D/A converters. In this way, since the clock generator 55 is used to drive the CPU 41 and the D/A converters 50 to 53, the number of circuit parts can be reduced and reliability can be expected to be improved.

Reference numeral 56 indicates a sensor for measuring the surface potential on the drum 11, and the output of this sensor 56 is connected via a measuring unit 57 to channel CH0 of a multiplexer 59. This measurement unit 5
7 applies a measurement potential to the multiplexer by applying a sensor drive signal from the CPU 41 through the signal line 62. Such a multiplexer 59
has channels 0 to 3, 0 (V) potential is applied to channel CH1, -E (V) is applied to channel CH2, the output voltage of the lamp circuit is applied to channel CH3, and CH0 ~ CH3 is selected and applied to the A/D converter 58,
It is constructed so that the digital signal obtained by conversion is taken into the CPU 41.

Note that CH1' to CH3' are provided corresponding to the channels CH1 to CH3, and the LEDs provided for the respective channels CH1' to CH3' respond to the channel selected by the multiplexer 59 to LC1 to LC3. Since it lights up, you can check at a glance which channel is currently selected.

The operation of the multiplexer 59 is controlled by a control signal applied from the CPU 41 via a signal line 63.

Reference numeral 60 is a display circuit driver that forms a display signal based on the signal sent through the signal line 64, and controls program execution display using seven LEDs, LD1 to LD7, and numerical display on the display 61. .

Here, LD1 lights up when a program that calculates a surface potential control value by reading the strong light from blank exposure is executed, and LD2 lights up when a program that calculates a surface potential control value based on the dark area potential of the drum is executed. It lights up when the
LD3 and LD4 light up when a program that calculates the surface potential control value based on the potential of the bright part of the drum is executed, and LD5 lights up when the strobe signal is derived onto the signal line 43. LD6 is lit when the copying machine is executing the reduction copy mode program, and LD7 is lit when the copying machine is executing the post-rotation program.

The display device 61 has a negative display segment 6.
1-1, Japanese character segments 61-2, 61-3 and dot segment 61 that display numerical values from 0 to 9
-4, and can take a plurality of display formats.

In other words, when displaying 3-digit surface potential (displayed in 5V units in this case), segment 61-2
is used as the hundreds digit, segment 61-3 is used as the tens digit, and segment 61-4 is used as the ones digit. If the segment 61-4 is lit, it is assumed that 5 is being displayed. Therefore, when displaying 215 (V), segment 61-
2, 61-3 should be used to display 21, and then segment 61-4 should be lit.

Switches SW1 to SW8 connected to the CPU 41 are control command switches, and switch SW1 is ON.
The self-diagnosis mode is commanded in the OFF state (however, the contents of the self-diagnosis are determined by the combination of switches SW6 to SW8), and the strop signal is applied to the signal line 43 while the data signal is applied to the signal line 42. When the strobe signal is applied, it commands control according to the data signal, and when it is OFF and the strobe signal is not applied, the switch commands the control according to the data signal.
It executes the command determined by the combination of SW6 to SW8.

Note that even if a strobe signal and a data signal are applied while the switch SW1 is in the ON state, the self-diagnosis is executed by ignoring the strobe signal and data signal.

The switch SW2 is a switch for selecting whether to perform potential control (output control of the primary and secondary chargers), and outputs a standard value when not selected.

Switch SW3 is a switch for selecting whether or not to perform light amount control (original exposure lamp control).
If not selected, the standard value is output.

The switch SW4 is a switch for selecting whether or not to perform developing bias control, and outputs a standard value when it is not selected.

The switch SW5 is used to select the time interval of data output to the display circuit and D/A converter during the self-diagnosis mode.

Switches SW6 to SW8 are switches that represent numerical values consisting of bits, and for example, all switches
By setting it to OFF, it represents (000) and the value is 0.
By turning on all the switches, (111) is expressed and the numerical value 7 is expressed.

FIG. 3 is a flowchart showing an outline of the operation of the CPU 41 in FIG.
It initializes the RAM, I/O ports, and the LEDs. When this initialization is completed, it is determined whether the mode is self-diagnosis mode (switch SW1 is ON).
) is determined in step S3,
If it is determined that the mode is self-diagnosis mode (switch SW1 is ON), self-diagnosis is performed in step S4. If it is determined that the mode is not the self-diagnosis mode, it is determined in step S5 whether or not there is a control signal (whether or not a strobe signal is being sent through the signal line 43).

As a result, if there is a control signal, the control mode is executed in step S6, and if there is no control signal, the control mode is executed in step S6.
S7 outputs various data.

To explain this self-diagnosis program in more detail with reference to FIG. 4, in step S8, interrupts are disabled and the surface potential sensor S6 is made inoperable, and then in step S9, it is determined whether the values set by switches SW6 to SW8 are 7 or not. If it is 7, the common channel CHC is connected to the channel CH1 by the multiplexer 59, and the potential is displayed by the display 61. Since the set value of this potential is 0V,
If it is not approximately 0V, the A/D converter 58
Adjust the variable resistor (not shown) located inside so that the potential is within the set range.

If the numerical value is not 7, the process advances to the next step S11 and it is determined whether the numerical value is 6 or not. 6, the common channel CHC is connected to the channel CH2 by the multiplexer 59, and the measured potential is displayed on the display 61. This confirms the reference potential -E (V).

If the numerical value is not 6, the process advances to the next step S13 and it is determined whether the switch SW5 is ON.

SW5 is the subsequent steps S17, S19, S21, S23
This is a switch for determining the level change speed when checking the switch SW5.By turning on switch SW5, the level is changed at a fast speed by adding 4 to the software counter DACNT at a constant speed, and by turning it off. Said counter
The level is changed at a slow speed by adding 1 to DACNT at the constant speed.

By causing the level to change at such a slow speed, it becomes possible to clearly identify the lighting state of the segments of the display device, so that failures in the segments of the display device can be easily discovered.

In the next step S16, the switch SW
It is determined whether the numerical value obtained from SW6 to SW8 is 5 or not, and if it is 5, the primary high voltage is checked.

This check is performed by applying the output of the counter DACNT, which increases the numerical value sequentially, and when it reaches a certain value, returns to the initial value and repeats the operation of sequentially increasing the numerical value again to the D/A converter 50. This is to confirm whether each circuit is operating normally by measuring the output of the A converter 50 and the input or output of the high voltage primary transformer 45 with a measuring device.

For example, if the output of the D/A converter 50 is normally output when the above check is performed, but it is confirmed that the input signal of the high voltage primary transformer is abnormal, the faulty location may be the D/A converter 50. It can be easily determined that the circuit is located between the A converter 50 and the high voltage primary transformer input terminal. In this embodiment, it is possible to easily determine which part of the circuit has a failure by simply switching a switch, which reduces the time required for board checks at the factory and for service in the market. Furthermore, since no special circuit is required, it can be realized at a very low cost. At this time, in order to confirm the contents of the check, segment 61-2, segment 61-3
, C2 is displayed.

If the numerical value is not 5, proceed to the next step S18 to determine whether the numerical value is 4 or not, and if it is 4, sequentially change the numerical values input to the D/A converter 51 in the same manner as in step S17 above. It is something. At this time, C1 is similarly displayed in segments 61-2 and 61-3 in order to confirm the contents of the check.

If the numerical value is not 4, the process proceeds to the next step S20, where it is determined whether the numerical value is 3 or not.

When the value is 3, do the same as step S17,
This is to sequentially change the numerical values input to the D/A converter 52.

At this time, HC is similarly displayed in order to display the contents of the check in the segments 61-2 and 61-3.

If the numerical value is not 3, proceed to the next step S22 to determine whether the numerical value is 2 or not. If the numerical value is 2, the numerical value input to the D/A converter 53 is sequentially changed in the same manner as in step S17 to obtain the current value. The data of the upper 4 bits of DACNT is displayed on the display 61.

At this time, the display 61 shows -00., -11., -22.,...
The operation of the display 61 and display circuit driver 60 is checked, and at the same time,
Changes in the output of the D/A converter 53 are also displayed. If the numerical value is not 2, that is, if the numerical value determined by the switches SW6 to SW8 is 0 or 1, the process proceeds to step S24, where the failure mode is displayed. This failure mode is displayed by displaying the result of the potential diagnosis performed in step S4 as OH, EE, or EA on the display 61-2 and display 61-3 depending on the content, and checking whether it is normal or not. , or if an abnormality occurs, the type of failure is indicated to the operator.
This makes it easier to discover failures.

Next, control step S6 in FIG. 3 will be explained in more detail with reference to FIG.

When the switch SW1 is OFF and the strobe signal is output on the signal line 43, step S6 is executed, but the content of the execution is based on the 4-bit code signal output on the signal line 42. It is determined by the numerical value 0 to 15 represented by . Therefore, first, in step S30, it is determined whether or not the data signal on the signal line 42 is a numerical value of 15. If this data signal is 15, the mode is set to 0.7, that is, the reduction copy magnification, in step S31.
Change the software flag to output high voltage primary output and high voltage secondary output compatible with 0.7. Similarly, in step S32, the data signal is
In this case, in S33, the software flag is changed so as to output high voltage primary output and high voltage secondary output corresponding to mode 1, that is, same-size copy. In response to the software flags changed in steps S31 and S33, the high voltage primary,
High voltage secondary is output.

Control is similarly performed in accordance with the flow chart shown in FIG. 5, but here steps S35, S37, S39, S41, S43, S45,
Let me explain in more detail.

If the data signal has a numerical value of 13 in step S34, the secondary weak software flag is cleared in step S35. When the secondary weak software flag is cleared, the high voltage primary output and high voltage secondary output are output during normal copying. When the secondary weak software flag is set, the high voltage primary output is set to 0, the high voltage secondary output is decreased, and the residual charge on the drum 21 is removed when the copying rotation stops. Also in step S7, the secondary weak software flag is determined and a secondary weak output is performed. step
In S36, if the data signal is 12,
In step S37, the secondary weak software flag is set.

Next, in step S38, if the data signal is 11, then in step S39, _VW is measured and the measured value is stored. _VW refers to the potential of a latent image formed on the drum 11 by a test chart or the like placed on the document table, and the master CPU 40 sends a measurement signal (data signal value 11) to the slave CPU 41 according to the operation of the main body. , the sample is held (stored).

_VWs are used in the market when service personnel perform image adjustments and for factory adjustments.

_VW is displayed on the display 61 when step S53 (FIG. 6), which will be described later, is executed.

When the data signal line has a value of 10 in step S40, the surface potential V _L2 of the drum 11 for determining the developing bias is measured by the sensor 56 and stored in step S41. The developing bias calculated based on V _L2 is also stored. Similar to _VW , V _L2 is displayed on the display 61 when step S55, which will be described later, is executed. The memorized development bias is
It is output to the D/A converter 53 at S7.

In step S42, when the data signal is 9, in step S43, the surface potential V _L1 of the drum 11 for determining the light amount of the document exposure lamp is detected by the sensor 5.
6 and stored. The amount of light from the document exposure lamp calculated based on V _L1 is also stored. Similarly, in step S57, V _L1 is displayed, and in step S7, the calculated value of the original exposure lamp light amount is displayed on the D/A converter 5.
Output to 2.

Steps S45 and S46 control the high-voltage primary output and the high-voltage secondary output, and perform calculations to converge the bright area potential V _SL and dark area potential V _D of the drum 11 to target values.

That is, when the signal data is 8 in step S44, step S45 is executed, and in other cases, that is, when the signal data is 0 to 7, step S46 is executed. Step S45, Step S46
By executing in this order, the surface potential of the drum 11 is determined for determining the high voltage primary output and the high voltage secondary output.
V _SL and V _D are measured by sensor 56 and stored. High voltage primary output and high voltage secondary output are calculated based on V _SL and V _D and stored. Similarly, V _SL and V _D are displayed on the display 61 when steps S59 and 61 are executed, and in step S7, the stored high voltage primary output and high voltage secondary output are displayed on the D/A converters 50 and 5.
1 is output. After the process described above is completed, the process proceeds to step S47, where the strobe signal is transmitted to the signal line 42.
Check that it is not derived above.

This is done to prevent the above process from being executed multiple times during one pulse of the strobe signal.

Next, control step S7 in FIG. 3 will be explained in more detail with reference to FIG.

When switch SW1 is OFF and there is no strobe signal, step S7 is executed, but the content to be executed differs depending on which value from 0 to 7 corresponds to the combination of switches SW6 to SW8. First, in step S50, it is determined whether the numerical value is 7 or not, and when it is determined that it is 7, step S51 is executed. That is,
A sensor drive signal is applied to the signal line 62 by the CPU 41, the surface potential of the drum 11 is measured by the sensor 56, and the multiplexer 59 connects channels CH0 and CHC to immediately display the read surface potential on the display 61. (second display mode).

In the following, control is performed in the same manner according to the flowchart shown in FIG.
S53, S55, S57, S59, S61, S63, and S64 will be explained in more detail.

Steps S50, S52, S54, S56, S58, S60,
S62 is the value 0 based on the combination of SW6 to SW8
~7 is determined and the corresponding processing steps S51, S53,
Select execution of S55, S57, S59, S61, S63, and S64.

Step S51 is executed when the switch value is 7, operates the potential sensor 56, switches the multiplexer 59 to CH0, measures the surface potential of the drum 11, and immediately displays it on the display 61. When the switch is set to the value 7, step S51 is always executed, so the surface potential of the drum 11, which changes moment by moment, can be read from the display 61. You can easily know whether it is present or not. for example,
If the displayed potential does not change at all or is not the expected value, it can be determined that there is an abnormality in the electrometer.

Steps S53, S55, S57, S59, and S61 are the measured potentials sampled and held as described above (Fig. 5).
Displays V _W , V _L2 , V _L1 , V _SL , and V _D . Since the stored value is updated for each measurement, the value of each display potential measured last can be easily known from the display 61. Therefore, each process unit 45~
48 is being controlled normally, and if not, the cause and location of the abnormality can be determined based on each surface potential (first display mode).

In step S63, PC07 and SC07, that is, 70% of the high voltage primary output and high voltage secondary output calculated values in step S46 are displayed on the display 61. By doing this, PC07,
The data of the upper 4 bits of SC07 is a value from 0 to 9. By displaying the data of the upper 4 bits of PC07 and SC07 on the segments of the display devices 61-2 and 61-3, it is possible to roughly know the changes in the high voltage primary output and the high voltage secondary output at the same time.

In step S64, V _C =V _D -V _SL is calculated and displayed on the display 61. By looking at V _C , that is, the contrast potential, it has become possible to know whether the control of the high voltage primary output and high voltage secondary output is being performed normally.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a copying apparatus to which the present invention is applied;
FIG. 2 is a control circuit diagram of the copying apparatus, and FIGS. 3 to 6 are flowcharts for explaining the operation of the control circuit shown in FIG. Here, 11 is a drum, 22 is a primary charger, 2
3 is a static eliminator, 40 and 41 are CPUs, 45 is a high voltage primary transformer, 46 is a high voltage secondary transformer, and 47 is a high voltage secondary transformer.
CVR, 48 is developing bias transformer, 50,5
1, 52, 53 are digital analog converters,
58 is an analog-to-digital converter, 59 is a multiplexer, and 61 is a display.

Claims (1)

[Scope of Claims] 1. A plurality of process means for forming an image on a recording medium, a detection means for detecting the surface potential of the recording medium, and a method for optimizing image forming conditions related to image density. When controlling the plurality of process means before forming an image on a recording medium,
The detection signals detected by the detection means at different timings for controlling the respective process means are stored in the storage means, and the detection signals from the detection means are subjected to predetermined calculations, and according to the calculation results, the detection signals are stored in the storage means. a digital computer that outputs a control signal to the process means for controlling the process means; a display means that displays numerical values; and a plurality of detection signals stored in the storage means;
Independently of the detection timing, the surface potential of the recording medium is detected when the first display mode for reading and displaying on the display means and the control of the process means for optimizing the image forming conditions are not executed. An image processing apparatus comprising: means for selectively switching between a second display mode in which the surface potential detected by the display means is displayed on the display means;