JPH0361698U - - Google Patents
Info
- Publication number
- JPH0361698U JPH0361698U JP12138489U JP12138489U JPH0361698U JP H0361698 U JPH0361698 U JP H0361698U JP 12138489 U JP12138489 U JP 12138489U JP 12138489 U JP12138489 U JP 12138489U JP H0361698 U JPH0361698 U JP H0361698U
- Authority
- JP
- Japan
- Prior art keywords
- memory bank
- refresh
- memory
- control circuit
- timing signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004913 activation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Dram (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12138489U JPH0361698U (OSRAM) | 1989-10-17 | 1989-10-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12138489U JPH0361698U (OSRAM) | 1989-10-17 | 1989-10-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0361698U true JPH0361698U (OSRAM) | 1991-06-17 |
Family
ID=31669418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12138489U Pending JPH0361698U (OSRAM) | 1989-10-17 | 1989-10-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0361698U (OSRAM) |
-
1989
- 1989-10-17 JP JP12138489U patent/JPH0361698U/ja active Pending
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