JPH035888A - Circuit processing device - Google Patents

Abstract

PURPOSE:To prevent the drop-out of a route possible to be a maximum route value in the case to go from a beginning point to an end point through a remarked point by determining the candidate of the route from the beginning point to the remarked point possible to be the maximum route value by using a minimum standard deviation value storing means, a determinate value storing means and a maximum route storing means. CONSTITUTION:In the delay analysis of a logical circuit, a candidate route determining means 6 determines the candidate of the route from the beginning point to the remarked point which is possible to be the maximum route value, i.e., a maximum delay time in the case to go from the beginning point of the end point through the remarked point by using the minimum standard deviation value storing means 2, the determinate value storing means 3 and the maximum route storing means 5. Then, a candidate route storing means 7 stores the candidate of the route possible to be the maximum delay time in the case to go from the beginning point to the end point through the remarked point. Thus, the route possible to be the maximum route value in the case to go from the beginning point to the end point through the remarked point can be stored without drop-out.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a circuit processing device.

[Conventional technology]

The conventional circuit processing device has a maximum standard deviation value storage means (1)
And the determined route of each route from the starting point to the point of interest on the circuit without using the maximum and minimum standard deviation values of the route values from the point of interest on the circuit to the end point given by the minimum standard deviation value storage means (2) From only the information in the determined value storage means (3) that stores the average value and standard deviation value of the values, the maximum route value is obtained when reaching the end point from the starting point via the point of interest. The route from the starting point to the point of interest is determined. Such conventional technologies include [timing analysis system HE A RT for large-scale circuits (1) Speed-up techniques] (
Information Processing Society of Japan 35th National Convention, 7F-6, late 1986) is known.

[Problem to be solved by the invention]

The conventional circuit processing device described above uses only the information of the determined value storage means 3) that stores the average value and standard deviation value of the determined route values of each route from the starting point to the point of interest on the circuit.
The maximum route value is obtained when the route reaches the end point from the starting point via the point of interest. Since the route from the starting point to the point of interest is determined, there is a drawback that the route with the highest possible route value may be missing when reaching the end point from the starting point via the point of interest.

[Means to solve the problem]

The circuit processing device of the present invention includes a maximum standard deviation value storage means (1) for storing the maximum standard deviation value of the path value from the point of interest on the circuit to the end point, and a maximum standard deviation value storage means (1) for storing the maximum standard deviation value of the path value from the point of interest on the circuit to the end point. Minimum standard deviation value storage means (
2), a determined value storage means for storing the average value and standard deviation value of the determined route values for each route from the starting point to the point of interest on the circuit; and 3. maximum route value determining means (4) for determining the route from the starting point to the point of interest that has the maximum route value when reaching the point of interest; and maximum route storage means (5) for storing the determined route; candidate route determining means (6) for determining a route candidate from a starting point to a point of interest that is likely to have the maximum route value when reaching the end point via a point; Candidate route storage means (
7).

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which maximum standard deviation value storage means 1. Minimum standard deviation value storage means 2. Determined value storage means 3
．． Maximum delay time determining means 4. It is comprised of maximum route storage means, candidate route determination means 6, and candidate route storage means 7.

Here, an example of delay analysis of a logic circuit will be described. In logic circuit delay analysis, starting from the point closest to the starting point,
By finding candidates for the maximum delay time of the route from the starting point to the ending point passing through that point, the maximum delay time from the starting point to the ending point is finally found. In the embodiment described here, each point is regarded as a point of interest, and the route value, that is, the delay time, from the starting point to each point of interest is determined.

In FIG. 1, the maximum standard deviation value storage means 1 stores the maximum standard deviation value of the delay time from the circuit top point to the end point, and the minimum standard deviation value storage means 2 stores the maximum standard deviation value of the delay time from the point on the circuit to the end point. The minimum standard deviation value of the delay time is stored, and the determined value storage means 3 stores the average value and standard deviation value of the determined delay time of each route from the starting point to the point on the circuit.

The maximum delay time determining means 4 is the maximum standard deviation value storing means 1.
and the determined value storage means 3 to determine the route from the starting point to the relevant point that will have the maximum delay time when reaching the ending point from the starting point via the relevant point, and the maximum route storing means 5 Stores the route from the starting point to the corresponding point that has the maximum delay time when reaching the ending point via the starting point.

Further, the candidate route determining means 6 uses the minimum standard deviation value storage means 2, the determined value storage means 3, and the maximum route storage means 5 to determine the maximum delay time from the start point to the end point via the corresponding point. The candidate route storage means 7 determines a route candidate from the starting point to the corresponding point, which is likely to result in the maximum delay time when going from the starting point to the destination point via the corresponding point. , stores route candidates from the starting point to the corresponding point.

FIG. 2 shows an example of a logic circuit processed using the above embodiment. 6(1) is the starting point of the route, (2) is the point of interest, and (3) is the ending point of the route. Route (4),
(5) and (6) are signal flows connecting each point. Here, the average values of the delay times of paths (4), (5), and <6) are μm and μ2゜μ, respectively. , the standard deviation value of the delay time is σ! , σ2. σ.

shall be. Information regarding ii′+(4) and (5) is stored in the determined value storage means (3).

The delay time is the average value μ and standard deviation value σ of each delay time.
is obtained as Eμ+3×(Eσ2) 1/2. When σ0 has the maximum value, (μ, +μ.) + 3X (σki +σ3) ””〉
(μ2 +μ0) ±3× (σchi +0g)
If it becomes 1/2, the maximum delay time determining means 4 will:
Information on the route (4) corresponding to μm and σ1 is stored in the maximum route storage means 5. The maximum value of σ0 is stored in the maximum standard deviation value storage means 1. Even when σ0 has the minimum value, (μm + μ.) + 3X (σ〒 +σp, ) 1
/2〉 (μ2 + μo) + 3X (σchi +σif;
) In the case of 1/2, the candidate route determining means 6 does not store anything in the candidate route storing means 7. However, σ
. When has the minimum value, μ 1 + μ o ) +3X (σ 1:
+ σ 'f, ) 1/2〈(μ2 +μ.)
+3
information from the starting point < 1) through the point of interest (2) to the ending point (3
) is stored as a candidate route with the maximum delay time. The minimum value of σ0 is stored in the minimum standard deviation value storage means 2.

〔Effect of the invention〕

As described above, the present invention has the advantage that a route that is likely to have the maximum route value when reaching the end point from the starting point via the point of interest can be stored without being omitted.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a diagram showing an example of a logic circuit processed using this embodiment. 1... Maximum standard deviation value storage means, 2... Minimum standard deviation value storage means, 3... Determined value storage means, 4... Maximum delay time determination means, 5... Maximum route storage means, 6...
Candidate route determining means, 7...Candidate route storage means.

Claims (1)

[Scope of Claims] Maximum standard deviation value storage means (1) for storing a maximum standard deviation value of route values from a point of interest on a circuit to an end point; and a minimum standard deviation value for storing a minimum standard deviation value of the route values. a value storage means (2); a determined value storage means (3) for storing an average value and a standard deviation value of determined route values of a route from a starting point on each circuit to the point of interest; and a determined value storage means (3) for storing the maximum standard deviation value. Using the means (1) and the determined value storage means (3), determine the route from the starting point to the point of interest that has the maximum route value when reaching the end point from the starting point via the point of interest. Maximum route value determining means (4) for determining a route; Maximum route storage means (5) for storing the determined route.
and, using the minimum standard deviation value storage means (2), the determined value storage means (3), and the maximum route storage means (5), from the starting point that is likely to have the maximum route value. candidate route determining means (6) for determining route candidates to the point of interest;
); and candidate route storage means (7) for storing the determined route candidates.