JPH0358441B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Application This invention relates to an optical position detection device that optically detects the position of an object.

(b) Prior Art Conventionally, an optical position detection device has been configured as shown in FIG. 1, for example. That is, a plurality of light-emitting elements a are arranged in the vertical and horizontal directions, and each light-emitting element a and the paired light-receiving element b are spaced apart from each other by a predetermined distance on the same plane.
Multiple arrays are arranged on S ₀ . Then, a pair of the light source and the light receiving element, for example, a ₂ and b ₂ , are sequentially designated to the operating state, and depending on whether or not the light emitted from the light source a ₂ is received by the light receiving element b ₂ , the plane of the object is determined. Detecting location.

(c) Problems In Figure 1, in order to accurately detect the position of an object on a plane, it is necessary to increase the number of elements by making both the light-emitting element and the light-receiving element smaller, which increases the price. The dot was hot. Furthermore, even when coarse resolution is sufficient for detecting the position of an object,
Depending on the position of the object, the optical path is not blocked, so the number of elements cannot be reduced below a certain number in order to eliminate a region where the position cannot be detected at all, that is, an insensitive region.

(d) Purpose This invention was made based on the above circumstances, and its purpose is to provide an optical position detection device that reduces the number of light emitting elements, has a simple configuration, and is highly accurate. be.

(E) Embodiments Hereinafter, embodiments of the present invention will be described based on FIGS. 2 to 5. In Figure 2, the coordinates of one end are (0, 0) and the coordinates of the other end are (O, Y).
The coordinates of L ₁ side (vertical direction in the figure) are (0,
1)... Light emitting elements whose coordinates are (0, Y) are arranged at equal intervals, and a light emitting element _a1 whose coordinates are (0, 0) is further arranged. Also, let the coordinates of one end be (0, Y) and the coordinates of the other end be (X, Y)
The coordinates of L ₂ sides (horizontal direction in the figure) are (1, Y)
...(X, Y) light receiving elements are arranged at equal intervals. Also, let the coordinates of one end be (X, Y),
Light-receiving elements whose coordinates are (X, 1)...(X, Y) are arranged on _{the three} sides of L (vertical direction in the figure) where the coordinates of the other end are (X, 0), and the coordinates of the other end are (X, 0). A light emitting element _a2 with (X, 0) is arranged.
The L ₁ , L ₂ and L ₃ sides form a detection surface S ₁ for detecting the position of an object.

The light emitted from the light emitting element _a1 is received by each light receiving element on the _L2 side and the _L3 side. Further, the light emitted from the light emitting element _a2 is received by each light receiving element on the _L1 and _L2 sides.

FIG. 3 shows the main circuit components of an optical position detection device having the detection section shown in FIG. outputs a rectangular oscillation signal with multiple times higher frequency, and this oscillation signal is input to the shift register 3 as a shift clock via the inverter 2, and is also directly input to the 8-bit counter 4 as a count signal. Ru. The counter 4 outputs a frequency-divided signal obtained by dividing the frequency of the oscillation signal input from the oscillation circuit 1 into 1/2, 1/4, 1/8, and 1/16 in the lower four digits, and also divides the frequency of the upper four digits X ₀ , _X1 ,
Each bit output of X ₂ and X ₃ is output to lines l ₀ , l ₁ , l ₂ , and l ₃ . The 1/4, 1/8, and 1/16 frequency-divided signals are input to the NAND gate 5 through corresponding inverters, and the output of the NAND gate 5 provides an operating time signal to the shift register 3. That is, 1/4,
When at least one of the 1/8 and 1/16 signals is output, an operation time signal is given to the shift register 3, and the shift register 3 becomes operable during that time. The above 1/4, 1/8, 1/16 signals are NAND gate 6
The output of this NAND gate 6 is output as a timing signal for reading the address.

The shift register 3 stores the optical signal applied to the input terminal at the rising edge of the input shift clock in the first digit _A0 only while the operation time signal is input, and stores the stored contents of each digit in one stage. Shift to higher digits. The bit outputs of the lower four digits _A0 to _A3 of the shift register 3 are respectively input to the comparator circuit 7 in parallel. On the other hand, the digits B ₀ to _{B 3} of the comparator circuit 7
The stored contents of these digits _B0 to _B3 correspond to the bit output from the input digits _A0 to _A3 , respectively. When the contents of each digit match, a match signal is output to the flip-flop 8.
The flip-flop 8 is set at the rising edge of the coincidence signal, and the set output is output as a photodetection signal of the light emitting diode. The CLR terminal of the flip-flop 8 is supplied with the operating time signal, and the flip-flop 8 is reset at the fall of the operating time signal.

Outputs from digits X ₀ , X ₁ , and X ₂ of the counter 4 are input to a multiplexer 9 . The eight output terminals of this multiplexer 9 are respectively connected to the collectors of eight phototransistors _b1 to _b8 corresponding to light receiving elements arranged on the detection surface _S1 , and these emitters are connected in common. and is connected to a corresponding one output terminal of the multiplexer 10. The multiplexer 9 grounds one of the phototransistors b ₁ to b ₈ in response to input data from the digits X ₀ , X ₁ , and X ₂ to designate it as operational.

On the other hand, the output from digit X ₃ of the counter ₄ is input to the counter ₁₁ , the output from digits X _{4 and} The output of is input to the input terminal A of the multiplexer 12.
The two outputs of the multiplexer 12 are connected to the bases of the transistors 13 ₁ and 13 ₂ , and the base of one of these transistors is set to low level to designate it as ready for operation, and each time a signal is input to the A input terminal. Switch the specification. The collectors of the transistors 13 ₁ and 13 ₂ correspond to the light emitting elements (light emitting diodes in this example) a ₁ and a _{2 ,} respectively.
The cathodes are connected to each other and grounded.

Each output of multiplexer 10 corresponds to 8
The digits X ₃ , X ₄ ,
The emitter of each phototransistor of the set corresponding to the input data from X ₅ is connected to line k. A positive voltage is applied to this line k via a resistor to enable the connected set of phototransistors. The signal via line k is input as an optical signal to terminal A of shift register 3 via capacitor 14, amplifier 15, and filter circuit 16, respectively. In addition, multiplexers 9 and 10
All the phototransistors sequentially designated by correspond to all the light receiving elements of the detection surface _S1 .

The photodetection signal from the flip-flop 8, the address read timing signal from the NAND gate 6, the phototransistor address signal applied via lines _l1 to _l5 , and the light emitting element designation signal applied via line _l6 are as follows. It is given to CPU17. The CPU 17 receives an input photodetection signal,
An operation is performed to calculate the planar position of the object placed on the detection surface _S1 from the address signal and the like.

Next, the operation of the optical position detection device configured as described above will be explained. In Figure 2,
Let the position, ie, the coordinates, of the object 18 placed on the detection plane _S1 be (x, y). Assume now that the object 18 is placed at the position shown in FIG. At this time, the light emitting element
Although the light emitted from a ₁ is irradiated to the phototransistors on sides L ₂ and L ₃ , the irradiation light is blocked by the presence of the object 18 and the coordinates (n, Y) on side L ₂ are
No light enters only the phototransistor b _o shown by . Similarly, the light emitted from the light emitting element a ₂ is the line L ₁ ,
Although all the phototransistors on _L2 are irradiated, due to the presence of the object 18, the light does not enter only the phototransistor _bn indicated by the coordinates (0, m) on the line _L1 . By the way, the equation of the straight line connecting the light emitting element a ₁ and the phototransistor b _o is given by y=Y/n·x −(1). Further, the equation of the straight line connecting the light emitting element a ₂ and the phototransistor b _n is given by y=m/X(X−x) −(2).

From equations (1) and (2), the position (x, y) of object 18 is determined by the following equation:
(3), (4) x=m/Y/n+m/X −(3) y=Y/n(m/Y/n+m/X) −(4)

To automatically determine the position described above, the following operations are performed in the circuit of FIG. Assume that the outputs of counters 4 and 11 are now at low level,
At this time, a low level signal is output to the base of the transistor 13 ₁ , and as a result, the light emitting element a ₁ is enabled to operate. The multiplexer 10 also selects each of the eight phototransistors b ₁ to b ₈ of the first set and connects each emitter to the line k.
is connected to. Furthermore, the (row, _{row, row) data input from the digits X 0 , X 1 ,} and Grounded and designated as operational. In this specified state, while the counter 4 counts the 1st to 16th oscillation signals from the oscillation circuit 1, the following operations are performed by the light emitting element _a1 and the phototransistor _b1 . When the second oscillation signal is output from the oscillator circuit 1, at the falling edge of the second oscillation signal, the counter 4 outputs a low level 1/2 frequency divided signal and a high level 1/4 frequency divided signal, and as a result, the light emitting element _a1 is turned on and an operation time signal is applied to the shift register 3 via the NAND gate 5, and the shift register 3 is set to an operable state. The infrared rays emitted from the light emitting element a ₁ are received by the phototransistor b ₁ , are slightly delayed through the multiplexer 10 , the amplifier 15 , and the filter circuit 16 , and are input to the shift register 3 as an optical signal. Simultaneously with the output of the second oscillation signal, the shift register 3 receives the low level signal applied to its input terminal (the optical signal is not yet applied) at the timing of the shift clock input via the inverter 2. Store in digit A ₀ . Next, when the third oscillation signal is counted, the counter 4 outputs a high-level 1/2 frequency-divided signal and a high-level 1/4 frequency-divided signal, and as a result, light emitting element _a1 is turned off. The light remains on and the operating time signal continues to be output. At the same time, the shift register 3 takes in the optical signal applied to its input terminal, and sets the contents of digits A ₀ and A ₁ to high and low levels, respectively. The fifth oscillation signal is counter 4
The digit of shift register 3 is counted by
High, low, high, and low levels are stored in _A0 to _A3 , and each of these signals is compared with the setting values of digits _B0 to _B3 of the comparator circuit 22, and a matching signal is output. At the rising edge of this coincidence signal, flip-flop 8 is set and a photodetection signal is output. Next, at the same time that the sixth oscillation signal is counted by the counter 4, the digit of the shift register 3 is counted.
A ₀ to _{A 3} are shifted to low, high, low, and high levels, and as a result, the contents of the comparison circuit 7 do not match, and the output of the coincidence signal stops;
Since the flip-flop 8 continues to be set, the photodetection signal continues to be output. Similarly, 7, 9, 11,
The coincidence signal is output when the 13th and 15th oscillation signals fall, and the output of the coincidence signal stops when the 8th, 12th, 14th, and 16th oscillation signals fall. counter 4
When counting the 14th oscillation signal, NAND circuit 6
The output changes from high level to low level. This low level switching is output as an address read timing signal of the photodetection signal output from the flip-flop 8.

If an object is inserted into the optical path between light emitting element a ₁ and phototransistor b ₁ , counter 4
The 1/2 frequency divided signal from becomes low level and the light emitting element
Even if a ₁ lights up, infrared rays are not detected by phototransistor b ₁ . Therefore, since no optical signal is input even during the period when the operating time signal is input to the shift register 3, the comparison circuit 7 does not output a coincidence signal and therefore does not output a photodetection signal.

In a state where no object is shielded between the light emitting element a ₁ and the phototransistor b ₁ , during the output of the operation time signal, the shift register 3 receives seven light signals in response to the blinking operation of the light emitting element a ₁ . will be applied sequentially. Among these, even if the waveform of the second optical signal is distorted and as a result, it is taken into the shift register 3 as a low level, the output of the coincidence signal stops when the fifth and seventh oscillation signals fall. However, since the coincidence signal is output at the falling edge of the 9th, 11th, 13th, and 15th oscillation signal, the photodetection signal is output by the coincidence signal output at the falling edge of the 9th oscillation signal. Therefore, it is possible to accurately and reliably detect the light arriving from the non-visible light source.
In this case, the phototransistor _b1 does not detect the light from the light emitting element _a1 , so no photodetection signal is output.

When counter 4 counts the 16th oscillation signal,
The output of the operating time signal and the photodetection signal is stopped, and the output of the NAND circuit 6 changes to high level. Furthermore, at this time, since a high level signal is output from the digit _X0 of the counter 4, the multiplexer 9 enables the phototransistor _b2 instead of the phototransistor _b1 . counter 4 is 2
While counting the 1st to 16th oscillation signals, the light emitting element _a1 blinks seven times and the above-described operation based on this is repeated. The same operation is repeated 8 times, and the light emitting element a ₁ and phototransistor b ₁
When the detection operation for the pairs _.about.b8 is completed, a high level signal is output from the digit _X3 of the counter 4. As a result, multiplexer 10 switches the connections between the emitters of the next set of eight phototransistors and line k. Then, in exactly the same manner as described above, the phototransistors in the designated group are sequentially designated and a similar detection operation is performed. Note that the address data of the currently specified phototransistor is in digits.
Sent from X ₀ ~ X ₅ , along with its photodetection signal
It is given to CPU17. A signal from digit _X6 is also input to the CPU 17, and based on this signal it is determined whether the currently designated light emitting element is _a1 or _a2 . Then, when the CPU 17 determines that the light emitting element a ₁ is designated, only the phototransistors on the L ₂ and L ₃ sides are subject to photodetection, and when it determines that the light emitting element a ₂ is designated, In this case, only the phototransistors on the L ₁ and L ₂ sides are subject to photodetection.

As a result, all the phototransistors on the detection surface _S1 are specified as described above, and the presence or absence of light reception from the light emitting element _a1 is inspected.
It is detected that only the phototransistor b _o of Y) receives light and does not receive light. When all phototransistors are specified, digit x ₆ of counter 11 becomes high level,
Multiplexer 12 designates light emitting element a ₂ to be operational. Then, all the phototransistors are sequentially specified in exactly the same way as described above, and the light emitting element a ₂
The presence or absence of light reception is performed. As a result, the CPU 17 detects that only the phototransistor b _n at the coordinates (0, m) is not receiving light. The CPU 17 calculates the coordinates of the object 18 on the plane _S1 from the detected coordinate values n and m and the pre-stored values X and Y according to equations (3) and (4) above, and stores it as the position of the object. do.

In FIG. 3, depending on the position of the object 18, the coordinates (X, m) of the phototransistors on the light emitting elements a ₁ and L ₃ , and the coordinates (n, m) of the phototransistors on the light emitting elements a ₂ and L ₂ , In this case, the relationship between the object's coordinates (x, y) is y=m/Xx...(5) y=Y/X-n(X-x)...(6 ) hold true. There are also cases where equations (1) and (6) hold true. In each case, CPU 17 selects the appropriate combination of equations and calculates the exact position of the object according to the selected equations.

FIG. 4 shows a second embodiment of the invention, in which the sides M ₁ , M ₂ , forming a rectangular detection surface,
Light-receiving elements are arranged in M ₃ and M ₄ at equal intervals. In addition, there are light emitting elements at the four corners of the detection surface.
a ₁ , a ₂ , a ₃ , and a ₄ are arranged respectively. In this case, light emitting element a ₁ is on sides M ₃ and M ₄ , light emitting element a ₂ is on sides M ₁ and M ₄ , light emitting element a ₃ is on sides M ₁ and M ₂ ,
Light emitting element _a4 emits light to each light receiving element on sides _M2 and _M3 , respectively. As shown in FIG. 4, the detection surface is divided into four areas F ₁ ,
When divided into F ₂ , F ₃ , and F ₄ , area F ₁ is divided into light emitting elements a ₂ ,
A ₃ and each light receiving element on side M ₁ , area F ₂ is a light emitting element a ₃ ,
A ₄ and each light receiving element on side M ₂ , area F ₃ is a light emitting element a ₁ ,
A ₄ and each light receiving element on side M ₃ , area F ₄ is light emitting element a ₁ ,
The position of the object in each area can be detected by the combination of the light receiving elements of a ₂ and side M ₄ . In this case, the two optimal light emitting elements for detecting the position of the object are identified for each of the four regions, so
The accuracy can be further improved compared to the case shown in FIG. In particular, if the light receiving element is formed by an image sensor, the accuracy can be further improved. Note that the circuit configuration for detecting the position of the object and the method for detecting the position of the object from the coordinates of each light emitting element a ₁ to _{a 4} and a predetermined light receiving element are almost the same as in the above embodiment. The explanation will be omitted from here.

FIG. 5 shows a third embodiment of the present invention, which realizes a simple position detection device. in this case,
In the device shown in FIG. 4, the array of light receiving elements on sides M ₁ and M ₄ is removed, and the light emitting elements a ₁ , a ₂ , a ₃ , a ₄
The position of the object on the detection surface _S2 is detected by the combination of the light receiving elements on the sides _M2 and _M3 . That is, in FIG. 5, the coordinates of the light emitting elements a ₁ , a ₂ , a ₃ , and a ₄ are respectively (0, 0), (0, Y), (X, Y),
(X, 0), and the position of the object 19 is (x, y). At this time, the light-receiving elements on side _M4 , which the light from light-emitting elements a ₁ and a ₂ do not reach, are (X, m') and (X, n'), respectively.
Then, y=m′/Xx −(7) y=−Y−n′/Xx+Y −(8) holds, so x=X−Y/m′−n′+Y −(9) y=m′ Y/m′−n′+Y −(10) is obtained. In this case as well, the position of the object (x, y) can be automatically determined using a circuit configuration substantially similar to that of the first embodiment. The details are omitted.

In the above embodiment, all the light receiving elements constituting the detection surface were scanned, but only the light receiving element corresponding to a designated light emitting element, for example, the second light receiving element, was scanned.
In the figure, when light emitting element a ₁ is specified, side L ₂ and
A configuration may also be adopted in which only the light receiving element of _L3 is scanned.

(e) Effects As explained above, according to the present invention, the light receiving elements of the second light receiving element group which do not receive light emitted from the first light source and the light receiving elements of the second light receiving element group which do not receive light emitted from the second light source Since the configuration is configured to detect light reception by the first light receiving element group and calculate the coordinates of the planar position of the object based on the coordinates of the detected light receiving element and the planar positions of the first and second light sources, the light emitting element can be significantly reduced in number and can be manufactured at low cost. Further, even a slight change in the position of an object on a plane appears as a large optical path change on the light receiving element side, which detects it, so it can be reliably detected on the light receiving element side, and therefore detection accuracy can be improved.
Furthermore, since the insensitive area is reduced, the number of light receiving elements can also be reduced.

[Brief explanation of drawings]

Fig. 1 is a plan view of a position detection surface used in a conventional optical detection device, Fig. 2 is a plan view showing a first embodiment of the position detection surface of the present invention, and Fig. 3 is used in Fig. 2. FIG. 4 is a plan view showing a second embodiment of the position detecting surface of the present invention, and FIG. 5 is a plan view showing a third embodiment of the position detecting surface of the present invention. 1...Oscillation circuit, 3...Shift register, 4,
11...Counter, 7...Comparison circuit, 8...Flip-flop, 9, 10, 12...Multiplexer, 18, 19...Object, _a1 , _a2 , _a3 , _a4 ...Light emitting element, _b1 ~b ₈ , b _n , b _o ... phototransistor (light receiving element).

Claims (1)

[Claims] 1. At least one first light source and one second light source respectively disposed on at least one opposing first and second side of a plane for detecting the position of an object; a first light-receiving element group that is arranged on a side and receives light emitted from the second light source; and a second light-receiving element group that is arranged on the second side and receives light emitted from the first light source. and the first and second light sources and the first and second light sources.
Each light receiving element in the light receiving element group has a specified coordinate on the plane, and does not receive light emitted from the first light source because the light is blocked by an object on the plane. a detection means for detecting a light receiving element of the second light receiving element group and a light receiving element of the first light receiving element group that does not receive light emitted from the second light source; 1. An optical position detection device comprising: an arithmetic circuit that calculates the coordinates of the planar position of the object based on the coordinates of the planar position of the second light source.