JPH0358236A - Information processor - Google Patents

Abstract

PURPOSE:To generate no error report to the outside and to prevent the information processor from being stopped by constituting this processor so that an OS converts an error processing routine to be processed into a firmware and expands it on a CPU, and executes an error processing at the time when an error is generated in a main memory. CONSTITUTION:When the storage contents 103 on a main memory, especially, an area 104 of an OS is brought to breakdown, a CPU 100 which knows this fact transfers immediately the control to an error processing routine existing in a firmware 101 containing an error processing function through a CPU interface 102, and executes such a processing as generating an error report, etc. Thereafter, the CPU 100 returns the control temporarily to the OS, and if the area brought to breakdown is partial, the processing is transferred to such a processing as continuing a job operation by small resources, etc. In such a way, it is prevented that the information processor stops in a state that no report is executed to the outside by such an abnormal operation as the CPU is stalled in the course of executing an error processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device, and particularly to an information processing device that performs main memory error processing.

[Conventional technology]

Conventionally, in information processing devices, error processing to be handled by the OS (operating system) has been made into a routine, developed on main memory hardware along with other programs such as job schedulers and resource management programs, and operated. It had been. This situation is shown in FIG.

[Problem to be solved by the invention]

In the conventional information processing described above, the error handling routine is developed in the OS area, that is, the main memory hardware, so when the main memory is destroyed, it is necessary to notify the information processing device user of this in the form of an error report. However, there is a very high probability that the error processing routine area for creating error reports is also destroyed at the same time, and no data is sent to the outside due to abnormal operations such as the CPU stalling while executing error processing. Otherwise, the information processing device will stop working. In other words, the system will stop for unknown reasons.

This is a drawback that cannot be tolerated in a remote-controlled or unmanned information processing device, even if it is a stand-alone personal computer that is used next to a computer.

[Means to solve the problem]

The information processing apparatus of the present invention does not deploy the error processing routine to be processed by the OS on hardware of the main memory, but converts it into firmware, and deploys it on the CPU to perform error processing when an error occurs in the main memory.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

CPUIOO is main memory, CPU interface 102
, using the firmware 101, the OS area 10 is developed on the memory contents 103 on the main memory (not shown).
4. Information stored in the user job related area 105 is used to operate the information processing device. The range up to now is well known.

Now, when the storage contents 103 on the main memory, especially the OS area 104, are destroyed, the CPUIOO, which learns of this via the main memory and CPU interface 102, immediately detects the error that exists in the firmware 101 that includes the error handling function. Transfers control to the processing routine and performs processing such as creating an error report. Thereafter, the CPUIOO temporarily returns control to the OS, and if the area that has been destroyed is only partial, it moves on to processing such as continuing the job operation with fewer resources.

In any case, it will not stop without producing any error report to the outside world.

〔Effect of the invention〕

As explained above, the present invention does not develop the error processing routine to be processed by the OS on the hardware of the main memory, but instead develops it as firmware on the CPU, and when an error occurs in the main memory, the error processing routine is executed. By allowing this to occur, it is possible to prevent the information processing apparatus from stopping without any error report being generated to the outside.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional embodiment. i oo, 2oo・-cpu, 103.203-・・
Main memory storage contents, 104,204...OS area, 105,205...User job related area, 1
02,202...Main memory, CPU interface 1
01...Firmware including error processing, 2o1.
・・Firmware that does not include error handling, 2o6・・
・Error handling related area.

Claims (1)

[Claims] In an information processing device comprising at least a CPU and a main memory, an error processing routine to be processed by an OS is converted into firmware and deployed on the CPU to perform error processing when an error occurs in the main memory. Information processing device.