JPH0358097U - - Google Patents
Info
- Publication number
- JPH0358097U JPH0358097U JP11870289U JP11870289U JPH0358097U JP H0358097 U JPH0358097 U JP H0358097U JP 11870289 U JP11870289 U JP 11870289U JP 11870289 U JP11870289 U JP 11870289U JP H0358097 U JPH0358097 U JP H0358097U
- Authority
- JP
- Japan
- Prior art keywords
- pass filter
- low
- digital data
- conversion circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 230000005236 sound signal Effects 0.000 claims description 4
- 230000004044 response Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Description
第１図はこの考案に係るオーデイオ装置の実施
例を示したブロツク図である。第２図は低域の再
現性を向上するための従来例のスピーカシステム
の断面図である。
主な符号の説明、１……オーデイオ信号の入力
端子、２……ローパスフイルタ（ＬＰＦ）、３…
…ハイパスフイルタ（ＨＰＦ）、４……遅延回路
、５……第１のＡ／Ｄ変換回路、６……バツフア
メモリ回路、７……デイジタルシグナルプロセツ
サ（ＤＳＰ）、８……Ｄ／Ａ変換回路、９……第
２のＡ／Ｄ変換回路、１０……ＲＡＭコントロー
ラ、１１……オーデイオ信号の出力端子。
FIG. 1 is a block diagram showing an embodiment of an audio device according to this invention. FIG. 2 is a sectional view of a conventional speaker system for improving low frequency reproducibility. Explanation of main symbols, 1...Audio signal input terminal, 2...Low pass filter (LPF), 3...
...High pass filter (HPF), 4...Delay circuit, 5...First A/D conversion circuit, 6...Buffer memory circuit, 7...Digital signal processor (DSP), 8...D/A conversion circuit , 9...Second A/D conversion circuit, 10...RAM controller, 11...Audio signal output terminal.
Claims (1)
スフイルタと、このローパスフイルタを通過する
低域部分以外の周波数帯域を通過させるハイパス
フイルタと、このハイパスフイルタを通過した出
力信号を上記ローパスフイルタを通過した出力信
号の振幅に応じて遅延時間を変化させる遅延回路
路とで構成したことを特徴とするオーデイオ装置
。 ２ 上記遅延回路がハイパスフイルタの出力信号
をデイジタルデータに変換する第１のＡ／Ｄ変換
回路と、ローパスフイルタの出力信号をデイジタ
ルデータに変換する第２のＡ／Ｄ変換回路と、第
１のＡ／Ｄ変換回路の出力デイジタルデータをＲ
ＡＭ（ランダムアクセスメモリ）で蓄えるバツフ
アメモリ回路と、このバツフアメモリ回路のデー
タ入力アドレスを制御するＲＡＭコントローラと
、このＲＡＭコントローラで制御されてバツフア
メモリ回路の出力デイジタルデータに対して遅延
時間の変化に対応して中間データを生成するデイ
ジタルシグナルプロセツサと、デイジタルシグナ
ルプロセツサの出力デイジタルデータをアナログ
信号に変換するＤ／Ａ変換回路とで構成したこと
を特徴とする請求項１記載のオーデイオ装置。[Claims for Utility Model Registration] 1. In an audio signal reproducing device, a low-pass filter that passes a low-frequency portion of an audio signal, a high-pass filter that passes a frequency band other than the low-frequency portion that passes through this low-pass filter, and this high-pass 1. An audio device comprising a delay circuit that changes the delay time of an output signal that has passed through a filter in accordance with the amplitude of an output signal that has passed through the low-pass filter. 2. The delay circuit includes a first A/D conversion circuit that converts the output signal of the high-pass filter into digital data, a second A/D conversion circuit that converts the output signal of the low-pass filter into digital data, and a first A/D conversion circuit that converts the output signal of the low-pass filter into digital data. The output digital data of the A/D conversion circuit is R
A buffer memory circuit that stores data in an AM (random access memory), a RAM controller that controls the data input address of this buffer memory circuit, and a RAM controller that controls the output digital data of the buffer memory circuit in response to changes in delay time. 2. The audio device according to claim 1, comprising a digital signal processor that generates intermediate data, and a D/A conversion circuit that converts the output digital data of the digital signal processor into an analog signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11870289U JPH0358097U (en) | 1989-10-12 | 1989-10-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11870289U JPH0358097U (en) | 1989-10-12 | 1989-10-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0358097U true JPH0358097U (en) | 1991-06-05 |
Family
ID=31666854
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11870289U Pending JPH0358097U (en) | 1989-10-12 | 1989-10-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0358097U (en) |
-
1989
- 1989-10-12 JP JP11870289U patent/JPH0358097U/ja active Pending
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