JPH0350445B2 - - Google Patents

Info

Publication number
JPH0350445B2
JPH0350445B2 JP56149996A JP14999681A JPH0350445B2 JP H0350445 B2 JPH0350445 B2 JP H0350445B2 JP 56149996 A JP56149996 A JP 56149996A JP 14999681 A JP14999681 A JP 14999681A JP H0350445 B2 JPH0350445 B2 JP H0350445B2
Authority
JP
Japan
Prior art keywords
digital
signal
modulation
circuit
phase shifter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56149996A
Other languages
Japanese (ja)
Other versions
JPS5851602A (en
Inventor
Koichiro Takeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56149996A priority Critical patent/JPS5851602A/en
Publication of JPS5851602A publication Critical patent/JPS5851602A/en
Publication of JPH0350445B2 publication Critical patent/JPH0350445B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C1/00Amplitude modulation

Description

【発明の詳細な説明】 〔概要〕 デイジタル直交変調した被直交変調信号成分間
の直交度を正しく保つために、90゜移相器誤差の
相殺分と発生させる手段を直交変調入力段に設け
た。
[Detailed Description of the Invention] [Summary] In order to maintain correct orthogonality between digitally orthogonally modulated signal components, a means for generating a 90° phase shifter error offset is provided in the orthogonal modulation input stage. .

〔産業上の利用分野〕[Industrial application field]

本発明は90゜移相器に生ずる誤差を相殺して直
交度を維持し得るデイジタル直交変調回路に関す
る。
The present invention relates to a digital quadrature modulation circuit that can maintain orthogonality by canceling errors occurring in a 90° phase shifter.

〔従来の技術〕[Conventional technology]

従来のデイジタル直交変調回路は第3図に示さ
れる如く構成している。デイジタル直交変調回路
における直交変調方式としては、直交振幅変調が
あるが、この直交振幅変調には4相PSKと等価
な4値QAM、8値QAM、16値QAMなどがあ
る。以下に、16値QAMを例にとつて直交振幅変
調回路の動作を説明する。
A conventional digital quadrature modulation circuit is constructed as shown in FIG. Quadrature modulation methods in digital quadrature modulation circuits include quadrature amplitude modulation, which includes 4-value QAM, 8-value QAM, and 16-value QAM, which are equivalent to 4-phase PSK. The operation of the quadrature amplitude modulation circuit will be explained below using 16-value QAM as an example.

16値QAMは、各伝送時刻(クロツク周期)毎
に4ビツトを同時に伝送するもので、その4ビツ
トずつの2ビツトずつの2系列に分け、各系列の
各2ビツトが取つている値によつて、一時には4
値の内の1つの値を取るデイジタル信号に変換
し、変換された各各のデイジタル信号をデイジタ
ル変調信号X,Yとして第3図のミクサー(平衡
変調器)2,3の一方の入力端子に入力される。
一方、ミクサー2,3の他方の入力端子には搬送
波が入力されるが、ミクサー2へは90゜移相器1
を介して90゜遅れた搬送波が入力される。尚、実
際には、デイジタル変調信号X,Yは帯域制限の
ためローパスフイルタを設けるのが一般的である
が、その場合においてもクロツク周期毎に4値に
収束する。
16-value QAM simultaneously transmits 4 bits at each transmission time (clock cycle).The 4 bits are divided into 2 series of 2 bits each, and the value of each 2 bits of each series is determined. At one time, 4
Convert each digital signal into a digital signal that takes one of the values, and input each of the converted digital signals as digital modulation signals X and Y to one input terminal of mixers (balanced modulators) 2 and 3 shown in FIG. is input.
On the other hand, the carrier wave is input to the other input terminal of mixers 2 and 3, but the 90° phase shifter 1 is input to mixer 2.
A carrier wave delayed by 90° is input via Incidentally, in practice, it is common to provide the digital modulation signals X and Y with a low-pass filter to limit the band, but even in that case, the signals converge to four values every clock cycle.

ミクサー2への搬送波をsinωtとし、ミクサー
3への搬送波をcosωtとすると、ミクサー2,3
の出力はXsinωt、Ycosωtとなる。これらの出力
信号はハイブリツト回路4で合成され、Xsinωt
+Ycosωtとなる。その信号配置は第4図のよう
になる。即ち、搬送波を4ビツトの信号に応じて
16の点の内の1つの点で示される位相と振幅とに
して出力する。
If the carrier wave to mixer 2 is sinωt and the carrier wave to mixer 3 is cosωt, mixers 2 and 3
The outputs are Xsinωt and Ycosωt. These output signals are synthesized by the hybrid circuit 4, and Xsinωt
+Ycosωt. The signal arrangement is as shown in FIG. In other words, the carrier wave is changed according to the 4-bit signal.
The phase and amplitude indicated by one of 16 points are output.

このような動作において、ミクサー2への搬送
波が取つている位相に対して90゜移相器1の出力
信号の位相にδの誤差が生じたとすると、ミクサ
ー3の出力はYcos(ωt+δ)=Ycosδcosωt−
Ysinδsinωtとなる。ここで、δが十分小さいと
きはcosδ≒1、sinδ≒δで近似出来る。その場合
には、Ycos(ωt+δ)≒Ycosωt−Yδsinωtとな
り、sin成分としてδ・Yが生じて来る。従つて、
合成信号(被直交変調信号)Aは、(X−δ・Y)
sinωt+Ycosωtとなり、送信信号、つまり受信信
号のX成分に(−δ・Y)の誤差が生じる。この
様子を第5図に示す。
In such an operation, if an error of δ occurs in the phase of the output signal of 90° phase shifter 1 with respect to the phase of the carrier wave to mixer 2, the output of mixer 3 will be Ycos (ωt + δ) = Ycosδcosωt −
Ysinδsinωt. Here, when δ is sufficiently small, it can be approximated by cos δ≒1 and sin δ≒δ. In that case, Ycos(ωt+δ)≈Ycosωt−Yδsinωt, and δ·Y arises as the sin component. Therefore,
The composite signal (orthogonally modulated signal) A is (X-δ・Y)
sinωt+Ycosωt, and an error of (-δ·Y) occurs in the X component of the transmitted signal, that is, the received signal. This situation is shown in FIG.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

かかる手段による直交度の調整には、その90゜
移相器の製造上の理由、例えば変調回路のモジユ
ール化、量産化等によりその調整が困難乃至不能
となる。このことは当然のことながら、被直交変
調信号成分間の直交度を90゜に保ち得なくなり、
所望の被直交変調信号を送信出来ないことにな
る。
Adjustment of orthogonality by such means is difficult or impossible due to manufacturing reasons for the 90° phase shifter, such as modularization and mass production of modulation circuits. Naturally, this means that the degree of orthogonality between the orthogonally modulated signal components cannot be maintained at 90°.
This means that the desired orthogonally modulated signal cannot be transmitted.

本発明は、斯かる問題点に鑑みて創作されたも
ので、90゜移相器に誤差があつても被直交変調信
号成分間の直交度を保ち得るようにしたデイジタ
ル直交変調回路を提供することを目的とする。
The present invention was created in view of such problems, and provides a digital quadrature modulation circuit that can maintain orthogonality between signal components to be quadrature modulated even if there is an error in the 90° phase shifter. The purpose is to

〔問題点を解決するための手段〕[Means for solving problems]

第1図は本発明の原理ブロツク図を示す。この
図において、7は係数器で、8は加算回路であ
る。デイジタル変調信号Xは、係数器7で重み付
けられたデイジタル変調信号Yと加算回路8で加
算されて直交変調のための変調信号として従来構
成の直交変調部10へ供給され、デイジタル変調
信号Yはそのまま直交変調部10へ供給されるよ
うにして本発明回路は構成されている。なお、直
交変調部10は従来と同様、直交変調に供される
搬送波信号のための90゜移相器1を備えている。
FIG. 1 shows a block diagram of the principle of the present invention. In this figure, 7 is a coefficient unit, and 8 is an adder circuit. The digital modulation signal The circuit of the present invention is configured such that the signal is supplied to the quadrature modulation section 10. Note that the orthogonal modulation section 10 is equipped with a 90° phase shifter 1 for a carrier signal to be subjected to orthogonal modulation, as in the prior art.

〔作用〕[Effect]

係数器7でデイジタル変調信号Yに与えられる
重付け量は直交変調部10の90゜移相器1に生ず
る誤差成分に対し逆位相成分を発生させるのに足
りる値である。従つて、90゜移相器1に誤差が生
じ、それがため被直交変調信号成分間の直交度が
崩れて来るようになつたとしても、上述重付け量
をデイジタル変調信号Yに与えてデイジタル変調
信号Xに上述誤差に対する相殺成分を生じさせれ
ば、被直交変調信号成分間の直交度は維持され
る。
The amount of weighting given to the digital modulation signal Y by the coefficient multiplier 7 is a value sufficient to generate an antiphase component with respect to the error component generated in the 90° phase shifter 1 of the quadrature modulation section 10. Therefore, even if an error occurs in the 90° phase shifter 1 and the degree of orthogonality between the orthogonally modulated signal components collapses, the above-mentioned weighting amount can be applied to the digital modulated signal Y. If a canceling component for the above-described error is generated in the modulated signal X, the degree of orthogonality between orthogonally modulated signal components is maintained.

〔実施例〕〔Example〕

第2図は本発明の実施例回路を示す。この回路
6は直交変調されるべき一方のデイジタル変調信
号Yを係数器7を介して加算回路8Aの一方の入
力へ供給すると共に加算回路8Aの他方の入力へ
他方のデイジタル変調信号Xを供給して合成し、
その合成信号と上記一方のデイジタル変調信号と
を第3図の直交変調回路5のそれぞれの入力へ供
給するように構成されている。この回路6におい
て、係数器7はデイジタル変調信号への重付けを
調整しうる重み調整可能な係数器として構成され
るのがよい。
FIG. 2 shows an embodiment circuit of the present invention. This circuit 6 supplies one digital modulation signal Y to be orthogonally modulated to one input of an adder circuit 8A via a coefficient unit 7, and supplies the other digital modulation signal X to the other input of the adder circuit 8A. and synthesize it,
The composite signal and one digital modulation signal are supplied to respective inputs of the orthogonal modulation circuit 5 shown in FIG. 3. In this circuit 6, the coefficient multiplier 7 is preferably constructed as a weight-adjustable coefficient multiplier capable of adjusting the weighting applied to the digital modulation signal.

次に、上記構成の本発明回路の動作を説明す
る。
Next, the operation of the circuit of the present invention having the above configuration will be explained.

第2図回路の90゜移相器1に誤差がなく、従つ
て係数器7の出力も零に調整された状態において
は、デイジタル変調信号X、Yは第3図に示され
る従来の直交変調回路5で直交変調されたと同様
となり、ハイブリツト回路4の出力、即ち被直交
変調信号Aは A=X+Yej x/2 で表される如くなり、その直交度は90゜に保たれ
ている。
When there is no error in the 90° phase shifter 1 of the circuit shown in FIG. 2 and the output of the coefficient multiplier 7 is also adjusted to zero, the digital modulation signals X and Y are converted to the conventional orthogonal modulation shown in FIG. This is similar to orthogonal modulation in the circuit 5, and the output of the hybrid circuit 4, that is, the orthogonally modulated signal A is expressed as A=X+Ye j x/2 , and the degree of orthogonality is maintained at 90°.

このような直交変調を生じさせている変調回路
の90゜移相器1にδだけの誤差が生じるに至つた
とすると、被直交変調信号A′は A′=X+Yej(x/2 +) で表される信号となり、被直交変調信号の直交度
はδだけずれて来る。
Assuming that an error of δ occurs in the 90° phase shifter 1 of the modulation circuit that generates such orthogonal modulation, the orthogonally modulated signal A′ is A′=X+Ye j(x/2 +) , and the orthogonality of the orthogonally modulated signal shifts by δ.

この時、係数器7の信号Yへの重付け量をsinδ
になるように調整すると、その時の被直交変調信
号A″は A″=X+Ysin δ+Yej(x/2 +)=X+Y jcosδ となる。つまり、この被直交変調信号成分間の直
交度は90゜に維持される(第6図参照)。
At this time, the weighting amount of the coefficient unit 7 on the signal Y is set to sinδ
When adjusted so that, the orthogonally modulated signal A'' at that time becomes A''=X+Ysin δ+Ye j(x/2 +) =X+Y jcosδ. In other words, the degree of orthogonality between the orthogonally modulated signal components is maintained at 90 degrees (see FIG. 6).

このように、本発明による直交度の維持は90゜
移相器1を少しも調整することなく達成される。
従つて、90゜移相器1に全く調整機能を有しなく
とも、或いはその調整機能による調整が困難乃至
不能にある環境に置かれたとしても、被直交変調
信号成分間の直交度を90度に維持し得る。
Thus, maintenance of orthogonality according to the invention is achieved without any adjustment of the 90° phase shifter 1.
Therefore, even if the 90° phase shifter 1 has no adjustment function at all, or even if it is placed in an environment where adjustment using the adjustment function is difficult or impossible, the orthogonality between the orthogonally modulated signal components can be adjusted to 90°. can be maintained at any time.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、90゜移相器
を何んら調整することなく被直交変調信号成分間
の直交度を90度に維持し得る。このことは直交変
調器のモジユール化、集積回路化に伴つて90゜移
相器での調整に依存し得なくなる場合に、特にそ
の有用性を発揮する。
As described above, according to the present invention, the degree of orthogonality between orthogonally modulated signal components can be maintained at 90 degrees without any adjustment of the 90 degree phase shifter. This is particularly useful when quadrature modulators become modular and integrated circuits and can no longer rely on adjustment by a 90° phase shifter.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の原理ブロツク図、第2図は本
発明の実施例回路図、第3図は従来回路図、第4
図は直交度が90゜の場合の信号点配置図、第5図
は直交度が90゜+δとなつた場合の場合の信号点
配置図、第6図は直交度を保つための調整を施し
た場合の信号点配置図である。 第1図及び第2図において、1は90゜移相器、
7は係数器、8は合成回路(加算回路8A)、1
0は直交変調部である。
Fig. 1 is a principle block diagram of the present invention, Fig. 2 is an embodiment circuit diagram of the present invention, Fig. 3 is a conventional circuit diagram, and Fig. 4 is a block diagram of the principle of the present invention.
The figure shows the signal point arrangement when the degree of orthogonality is 90°, Figure 5 shows the signal point arrangement when the degree of orthogonality is 90° + δ, and Figure 6 shows the signal point arrangement when the degree of orthogonality is 90° + δ. It is a signal point arrangement diagram in the case of In Figures 1 and 2, 1 is a 90° phase shifter;
7 is a coefficient unit, 8 is a synthesis circuit (addition circuit 8A), 1
0 is a quadrature modulation section.

Claims (1)

【特許請求の範囲】 1 90゜移相器1により互いに90゜異なる二つの搬
送波を作成し、該二つの搬送波を二つのデイジタ
ル変調信号でそれぞれ変調し、該変調された信号
を合成して出力するデイジタル直交変調回路にお
いて、 一方のデイジタル変調信号を上記90゜移相器1
の移相誤差に対応した係数の係数器7を介して加
算回路8へ供給して他方のデイジタル変調信号に
加算し、その加算信号及び上記一方のデイジタル
変調信号を直交変調に用いるように構成したこと
を特徴とするデイジタル直交変調回路。 2 上記係数器7を重み調整可能な係数器に構成
したことを特徴とする特許請求の範囲第1項記載
のデイジタル直交変調回路。
[Claims] 1. Two carrier waves different by 90 degrees from each other are created by a 90 degree phase shifter 1, the two carrier waves are modulated with two digital modulation signals, and the modulated signals are combined and output. In the digital quadrature modulation circuit, one digital modulation signal is transferred to the 90° phase shifter 1.
The coefficient corresponding to the phase shift error is supplied to the adder circuit 8 through the coefficient unit 7 and added to the other digital modulation signal, and the added signal and the above-mentioned one digital modulation signal are used for quadrature modulation. A digital quadrature modulation circuit characterized by: 2. The digital orthogonal modulation circuit according to claim 1, wherein the coefficient multiplier 7 is constructed as a weight-adjustable coefficient multiplier.
JP56149996A 1981-09-22 1981-09-22 Orthogonal modulation circuit Granted JPS5851602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56149996A JPS5851602A (en) 1981-09-22 1981-09-22 Orthogonal modulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56149996A JPS5851602A (en) 1981-09-22 1981-09-22 Orthogonal modulation circuit

Publications (2)

Publication Number Publication Date
JPS5851602A JPS5851602A (en) 1983-03-26
JPH0350445B2 true JPH0350445B2 (en) 1991-08-01

Family

ID=15487180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56149996A Granted JPS5851602A (en) 1981-09-22 1981-09-22 Orthogonal modulation circuit

Country Status (1)

Country Link
JP (1) JPS5851602A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60145754A (en) * 1984-01-09 1985-08-01 Nec Corp Quadruple phase modulator
JPH02211748A (en) * 1989-02-10 1990-08-23 Nec Eng Ltd Orthogonal modulation circuit

Also Published As

Publication number Publication date
JPS5851602A (en) 1983-03-26

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