JPH0349079A - Track counting circuit - Google Patents

Abstract

PURPOSE:To improve a measuring accuracy and to shorten the time required for counting by changing-over plural track counting means in accordance with the velocity range of relative movement velocity for a recording/reproducing head. CONSTITUTION:A signal obtained from an optical head is amplified by a sensor amplifier 1, converted to parallel data (a) by a shift register 2 and demodulated to a relative address (b) by a demodulating circuit 3 to input it to a latch circuit 4, then the latest relative address (c) and the previous relative address (d) are recorded. The value which the relative address (d) is subtracted from the relative address (c) is outputted by a subtracting device 5 as a relative velocity (e) with a track of optical head, and a velocity decision is made by a selecting circuit 8 to select a cross deciding circuit 6 for low velocity time when the velocity is low and a cross detecting circuit 7 for high velocity time when the velocity is high, then a count-up pulse (j) and count-down pulse (k) are sent to an up-down counter 9. Consequently, the time required for the count at a high velocity seeking is shortened and the accurate counting can be performed even if an effect of eccentricity is exerted at the low velocity seeking.

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a track counting circuit during high-speed seeking of an optical disc. [Prior Art] Conventionally, there are several known track counting methods for performing high-speed seeks on optical discs. An example thereof will be explained using FIG. FIG. 10 is a diagram showing a servo area in a sample servo type optical disc. On this disc,
One track includes 1376 servo areas, and each servo error signal for autofocus and autotracking is obtained by sampling and holding signals within the servo area. In FIG. 10, 101 and 102 are tracking wobble bits, which sample and hold changes in the amount of light from an optical head (not shown) at the timing of the two wobble bits, and use the difference between the two as a tracking error signal. . In addition, the focus error signal is a signal obtained from an optical system similar to the known astigmatism method or the Naifezi method.
Wobble bit 102 and clock bit 103 in FIG.
Obtained by holding the sample on the mirror surface between the two. During high-speed seek, the difference between the wobble bits 101a and 101b is checked while moving the optical head. In other words, the track number is I+ (N-1)X16 (where I=1, 2..., 16; N=1.2, 3
．． ), when N is an odd number, the wobble bit 101a is placed at the bit 3 position, and when N is an even number, the wobble bit 101a is placed at the bit 3 position. The wobble bit 101b is placed at the bit 4 position. Then, wobble bit 101 (:101a, 101
The position of b) changes to the position of bit 3 and the position of bit 4 every 16 tracks. So Wobble Pit 10
By monitoring the position of No. 1, the approximate position of the optical head could be detected even during seek, and high-speed seek was possible. [Problem to be solved by the invention] However, in the above conventional example, the difference in Bakun is 16
Since it appears only for each track, it is not possible to accurately detect the number of tracks, and the position detection accuracy during seek is poor. In particular, during high-speed seek, there is a problem in that the time required to detect the number of tracks is large compared to the moving speed of the head, resulting in a large error in the detected position. In addition, in conventional track counting circuits, in the case of optical discs, etc., the same counting circuit is used both at low speeds where eccentricity is affected and at high speeds where eccentricity is less affected. In view of the above-mentioned drawbacks, it is an object of the present invention to reduce the time required for counting during high-speed seek, and to avoid the influence of eccentricity during low-speed seek. The object of the present invention is to realize a track counting circuit that can perform highly accurate counting.

[Means and Operations for Solving the Problems] The present invention, as a means for solving the above-mentioned problems, is provided periodically on the tracks of an optical information recording medium. A track counting circuit of an optical information recording and reproducing apparatus that reproduces a Gray code pattern including a relative address and counts the number of track crossings of the recording and reproducing head, calculates the relative address of the recording and reproducing head from the information of the Gray code pattern. a moving speed detecting means for detecting a moving speed; a plurality of track counting means according to a speed range of relative moving speed of the recording/reproducing head; and a plurality of track counting means according to a speed range of the recording/reproducing head. The present invention provides a track counting circuit characterized in that it has a switching means. Further, as the moving speed detection means, a subtracter that calculates a relative moving speed from the difference between the latest relative address demodulated from the Gray code pattern and the previous relative address, and as the plurality of track counting means, A plurality of cross determination circuits configured of logic circuits based on a truth table for traversing track blocks set in advance according to the difference between the relative address and the previous relative address. a selection circuit that selects the outputs of the plurality of cross determination circuits according to the output of the subtracter as means for switching the track counting means; an up/down counter that counts based on the output value of the selection circuit; The track counting circuit is characterized by having an arithmetic circuit that calculates the total number of tracks crossed from the output value and the output value of the previous up-down counter. A track counting circuit comprising a value latch circuit and an arithmetic circuit for calculating the total number of tracks crossed from the latest relative address, the initial value, and the output of the up/down counter, This is an attempt to solve the above problem. According to the present invention, by switching a plurality of track counting circuits between low speed and high speed, accurate track counting can be performed in a shorter time. [Example] Hereinafter, an example of the present invention will be described in detail using one drawing. First of all, an example of a known format pattern of an optical disc used in the high-speed seek of the present invention will be explained with reference to FIG. Figure 9 shows a pattern called the gray code, 1-
It represents 18 relative addresses. This pattern is
Usually wobbling bit 10 as explained in FIG.
1, 102 and clock pins 1-103 are provided for each servo area. Further, the position of the wobbling bit 101 is fixed. Hereinafter, the space between the servo areas will be referred to as one unit, and will be referred to as a segment. In the gray code shown in FIG. 9, of the 10 address bits, 2 bits are "1" (part 0 in the figure), 58 bits are "0", and between adjacent tracks, " The position of 1'' has changed by only 1 bit. Therefore, even if the optical head passes over two tracks when the tracking servo is off or during seek, the approximate position of the optical head can be known. Also, the pattern is 1
Since it changes for each track, the position of the optical head can be detected with l-track accuracy. Since the relative address is intended to be readable even when the tracking servo is off, it cannot take too many channel bits, and because it is a gray code, it is a pattern that periodically changes every certain number of tracks (18 in Figure 9). (Hereinafter, a group of 18 tracks will be referred to as one track block). Therefore, accurately detecting the crossing of a track block boundary is an essential condition for detecting the position of the optical head. Become. FIG. 1 is a diagram of a track counting circuit representing a first embodiment of the present invention. In the figure, l is a sensor amplifier, 2
is a shift register, 3 is a demodulation circuit, 4 is a latch circuit, 5
is a subtracter, 6 is a cross determination circuit at low speed (cross determination circuit 1), and 7 is a cross determination circuit at high speed (cross determination circuit 2).
, 8 is a selection circuit, 9 is an up/down counter, and 10 is an arithmetic circuit. In the figure, a signal obtained from an optical head (not shown) is amplified by a sensor amplifier l, and converted into parallel data a by a shift register 2. The Gray code pattern converted into parallel data a by the shift register 2 is sent to the demodulation circuit 3.
It is demodulated to relative address b. The relative address b is input to the latch circuit 4, and the latest relative address C and the previous relative address d are stored. The subtracter 5 subtracts the previous relative address d from the latest relative address C and outputs the value as the relative speed e of the optical head with respect to the track. The low-speed cross determination circuit 6, the high-speed cross determination circuit 7, and the selection circuit 8 are circuits that output a count-up pulse j or a count-down pulse k depending on the crossing direction when a track block boundary is crossed. explain. When a count up pulse j and a count down pulse k are generated, the up run counter 9 counts the number of pulses and outputs the count number 2 to the arithmetic circuit 10. The calculation circuit 10 calculates the total number of tracks crossed based on the track block cross count number ρ and the relative speed e. Incidentally, there are two factors that cause the relative speed e between the optical head and the track: eccentricity of the disk and movement of the optical head during seek. Therefore, the relationship between the two points and the relative velocity e will be explained. The eccentricity of the disk is generally ±100 μm or less. Therefore, the displacement of a certain track as seen from the optical head can be approximately approximated by the following equation. y = 10-' 5in2i ft [s] where f is the number of rotations of the disk. Than this. The relative velocity is y −= 2xf ・10−′・cos2ift [
m/s]t, and the maximum relative speed represents the difference between the address and the previous relative address, so
Let the number of segments in one track be X, and consider the maximum amount of movement of the track between one segment. The time required for the disk to rotate by one segment is: If the track pitch is d, then the maximum amount of track movement between one segment can be expressed as follows. here,
d=1.5 [μm1. , X=1300 (this varies depending on the format, so calculate with a smaller value to allow for margin), then the maximum amount of track movement between one segment is d. FIG. 3 is a diagram showing the maximum relative velocity due to eccentricity. In FIG. 3, 21 is the center of the track, 22 is the part where the relative address (gray code pattern) is recorded, and 23 is the trajectory of the light beam when it traverses the track from the inner circumference side of the disk to the outer circumference side at the maximum speed. 24 is the trajectory of the light beam when it crosses the track from the outer circumferential side of the disk to the inner circumferential side at the maximum speed. In other words, caused only by eccentricity,
The number of track crossings between one segment is at most ±1. Next, in the case where there is no eccentricity, the relative speed between the track and the optical head caused only by the seek operation is as shown in FIG. That is, as the optical head is accelerated, the number of tracks traversed between l segments gradually increases, and after reaching the maximum speed, it begins to decrease as the optical head decelerates. Here, in general,
If more than one track block is exceeded in one segment, the processing becomes complicated, so the maximum speed never exceeds the size of one track block (18 tracks in this embodiment). As shown in Figure 4, if there is no eccentricity, the seek direction and
Crossing of a track block can be determined from the magnitude relationship of the read relative addresses. Here, if the outer circumference side is the track φ, the relative addresses are 1.2..., 18.1.2...18, l from the outer circumference side.
..., the flag representing the seek direction is set as DIR, and the seek from the outer side to the inner side is set as Dil (="H"), when DIR="H", the relative address is set according to the movement of the optical head. When the relative address increases and crosses the track block, the relative address decreases. Therefore, when DIR="Hl", the relative address decreases, and when DIR="L", the relative address increases by checking the crossing of the track block. However, since the actual change in relative address is a combination of the component due to the seek in Figure 4 and the component due to eccentricity in Figure 3, In areas where the head moves at a slow speed, the head crosses the track block in the opposite direction to the seek direction due to eccentricity, and it may not be possible to detect the track block crossing only by the magnitude relationship between the DIR value indicating the theta direction and the relative address. Therefore, in the present invention, as shown in FIG. 1, separate cross determination circuits 6 and 7 are provided for low speeds affected by eccentricity and high speeds unaffected, and a selection circuit 8 performs speed determination. The configuration is such that the cross determination circuit is selected based on the cross determination circuit. The operation of the cross determination circuit selection flag Vf will be explained using FIG. 5. FIG. 5 (8) shows that the theta direction flag DIR="
It shows the change in the number of tracks crossed during a seek at "H", and is the normal acceleration/deceleration pattern plus the width for eccentricity (arrow in the figure) ± 1 track. In this example, , the velocity profile in Fig. 5(a), 3
The cross determination circuit selection flag Vf="L" in the low speed region on both sides, and Vf="H" in the high speed region.
Here, in this embodiment, the point at which Vf changes is that Vf = "H" when the number of track crossings reaches 4 (including the effect of eccentricity) for the first time after the start of seek, and then When the number becomes 1 (including the effect of eccentricity), Vf
= “L”. However, it goes without saying that this number should not be taken lightly. Further, the number of track crossings is calculated by adding the result of the count pulse f+g+h+1 to the output e of the subtracter 5. The selection circuit 8 sets the cross determination circuit selection flag Vf="L"
At this time, the low speed cross determination circuit 6 is selected. The low-speed cross determination circuit 6 operates according to the truth table shown in FIG. In FIG. 6, U'' is for sending out a count-up pulse f, ``D'' is for sending out a count-down pulse g, and -'' is for sending out a count-up pulse f.
This indicates that neither pulse is sent, and the cross determination circuit becomes effective at low speeds when the number of track crossings is ±3.
If within track, ±4 track (6th track)
○ mark in the figure) indicates that the cross determination circuit selection flag Vf is set to “H”.
", and cases where there is a greater difference in relative addresses are indicated by "X" as cases that cannot occur. When Vf="L", the number of tracks crossing is ±3 tracks, so for example, if the previous address was 1 and this time it was 17, it is impossible for the tracks to be in the same track block, that is, it is always 1. Since this is the previous track block, the countdown pulse (“D”)
display). The same applies to other areas marked with "D". Also, for the same reason, the area U'' is considered to be the next track block, so a count up pulse is sent out.Next, when the cross determination circuit selection flag Vf="H",
The number of tracks crossing between one segment is two or more,
Also, since the movement is not fast enough to cross one track block between one segment, the track block will not be crossed in an unexpected direction due to eccentricity. Therefore, the value of the theta direction flag DIR determines whether the track block is Crossing can be detected. FIG. 7 shows the operation of the high-speed cross determination circuit when the theta direction flag DIR="H". When DIR="H", if the movement is within the same track block, the latest relative address Ad (n) is the previous relative address Adr
It should be larger than (n-1). Therefore, Ad
When r(n)≦Adr(n-1), it is sufficient to send a count up pulse h, and Adr(n)=^dr(n
-1) When it becomes +1, switch the cross determination circuit selection flag Vf to "L". , (O mark in Fig. 7) The same applies when DIR="L" and Vf="H",
When Adr(n)≧Adr(n-1), a countdown pulse l is sent out (FIG. 8). As explained above, the selection circuit 8 sends out the count up pulse j and the count down pulse k, and thereby the up/down counter 9 sends the count value β obtained by counting the count pulses to the arithmetic circuit 10. The arithmetic circuit 10 calculates the output e(=Dif(n)) of the subtraction circuit 5.
=Adr(n)-Adr(n-1)) and the count value ρ of the up/down counter 9, the total number of tracks traversed T is calculated using the following equation. T=Dif(k)+A-N=1 where N represents the number of tracks in one track block. As explained above, in the present invention, the optical head speed is calculated from the demodulated relative address, and the selection circuit detects the crossing of a track block by switching between different cross determination circuits for low speed and high speed. Even during low-speed seek, it is possible to accurately count the total number of track crossings without being affected by eccentricity. In addition, in this embodiment, the pattern shown in FIG. 9 has been described as the gray code pattern recorded on the optical disc, but if a relative address in which a predetermined cycle is repeated is recorded, the present invention can be applied. Of course, the range is not limited to the pattern shown in FIG. Furthermore, in this embodiment, DIR has been explained as a flag representing the theta direction, but when vf is switched to "H", the difference in relative addresses as the output e of the subtraction circuit 5 is Dif(
n) = 4, -14, then DIR = "H-, Di
By controlling DIR so that if f(n) = -4,14, DIR = "L", it can be used not only during seek but also when the optical head moves rapidly due to external vibrations, etc. Accurate track counting becomes possible. FIG. 2 is a diagram showing a second embodiment of the present invention. In FIG. 0, members having the same functions as those in FIG. 1 are designated by the same numbers, and detailed explanations thereof will be omitted. In FIG. 2, 11 is an initial value latch circuit, 12 is a first
This is an arithmetic circuit that performs a different operation from that of the embodiment. The initial value latch circuit 11 is a circuit that latches an initial value Adr(o) of a relative address before starting a seek. The arithmetic circuit 12 includes the latest relative address Adr (n),
Counter value of up/down counter! and the initial value of the relative address are input, and the calculation circuit 12 performs the calculation as follows. T = Adr(n) −Adr(o) + A −N
However, T is the total number of tracks crossed, and N is the number of tracks in one track block. This arithmetic circuit 12 also makes it possible to accurately count the number of track crossings during high-speed seek. [Effects of the Invention] As explained above, when seeking at high speed on an optical disc on which a periodic Gray code pattern is recorded as a relative address, the difference between the reproduced relative address and the previous relative address, that is, the relative speed By switching the method of detecting track block crossing according to the above, accurate track counting can be achieved in both high-speed and low-speed seeks, and the seek time can be shortened.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention. FIG. 2 is a diagram showing a second embodiment of the present invention. FIG. 3 is a diagram of the optical spot crossing the track when there is eccentricity. FIG. 4 is a diagram showing changes in the number of track crossings during seek when there is no eccentricity. FIG. 5 shows the change in the number of track crossings during seek and the cross determination circuit selection flag V when there is eccentricity. A diagram showing changes in. FIG. 6 is an operation truth table of the low-speed cross determination circuit. Figure 7 shows the operational truth table (DI
R=”H”). Figure 8 shows the operational truth table (DI
R=“L”). FIG. 9 is an example of a known gray code pattern. Figure 10 shows a conventional servo bite pattern. Sensor amplifier shift register Demodulation circuit Latch circuit Subtractor Low speed cross determination circuit High speed cross determination circuit Selection circuit Up/down counter 1, initial value latch circuit 0.12. Arithmetic circuit

Claims (3)

[Claims] (1) A track of an optical information recording/reproducing device that reproduces a gray code pattern including a relative address provided periodically on the track of an optical information recording medium and counts the number of track crossings of the recording/reproducing head. The counting circuit includes: a moving speed detecting means for detecting a relative moving speed of the recording/reproducing head from information on the Gray code pattern; a plurality of track counting means according to a speed range of the relative moving speed of the recording/reproducing head; A track counting circuit comprising: means for switching the plurality of track counting means according to a speed range of the recording/reproducing head. (2) The moving speed detecting means includes a subtracter that calculates the relative moving speed from the difference between the latest relative address demodulated from the Gray code pattern and the previous relative address; A plurality of cross determination circuits each configured of a logic circuit based on a truth table for crossing track blocks set in advance according to the difference between the relative address and the previous relative address; and means for switching the track counting means. a selection circuit that selects the output of the plurality of cross determination circuits according to the output of the subtracter; an up/down counter that counts based on the output value of the selection circuit; an output value of the subtracter; 2. The track counting circuit according to claim 1, further comprising an arithmetic circuit for calculating the total number of tracks crossed from the output value of the track counting circuit. (3) An arithmetic circuit that has an initial value latch circuit that latches the initial value of the relative address, and that calculates the total number of tracks crossed from the latest relative address, the initial value, and the output of the up/down counter. The track counting circuit according to claim 1, characterized in that it has a track counting circuit.