JPH0348284A - Driving circuit for matrix type liquid crystal display device - Google Patents

Abstract

PURPOSE:To improve contrast and to reduce electric power consumption by providing a bidirectional output circuit which can make charging and discharging of the output line of a video signal output means in this output means. CONSTITUTION:The output line 13 of a differential amplifier 1 is connected to the gate of an N channel output transistor 2 and the gate of a P channel output transistor 12. Output video signals are taken out of the sources of the output TRs 2 and 12 via the output line 9. The output TRs 2 and 12 can, therefore, execute either of the charging and discharging of the output line 9 and a signal electrode 102 connected thereto according to the input signal level. All of the time TH assigned to the scanning of one horizontal scanning line is utilized for writing to a picture element. The contrast of the display device is improved in this way and the electric power consumption is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a drive circuit for a matrix type liquid product display device.

(Prior Art) Due to rapid advances in design technology and manufacturing technology in recent years, matrix-type liquid crystal display devices are achieving display quality comparable to that of CRTs. The matrix type liquid crystal display device is
Because it has excellent characteristics such as being thin and lightweight and having low power consumption, it is expected to be used in a wide range of applications, such as the display part of television receivers and display devices for information devices such as personal computers. There is.

FIG. 3 schematically shows an example of a conventional matrix type liquid crystal display device. The matrix-type crystal display device shown in FIG. 3 uses T F T as a switching element for driving picture elements.
(Thin Film Transistor). Other switching elements include MOS
}A transistor or the like can be used. A TPT liquid crystal panel loo as a display unit includes picture elements 103 arranged in a matrix of n rows and m columns. In FIG. 3, one horizontal scanning line is formed by a plurality of picture elements 103 lined up in a row in the horizontal direction. In the vicinity of each picture element 103, T
PTIO4 is provided respectively, and the drain electrode of the TFT 104 is connected to the electrode of the picture element 103. A common counter electrode 105 is arranged between the electrodes of all the picture elements 103. The TFT liquid crystal panel 100 has n scanning electrodes 10.
1 are arranged in parallel. The j-th scanning electrode 101 has a TFT 1 corresponding to the pixel 103 of the j-th horizontal scanning line.
The gate electrode of 04 is connected. m signal electrodes 102 are arranged in parallel so as to be orthogonal to the scanning electrode 101. The i-th signal electrode 102 has the i-th column TFT1.
04 source electrode is connected.

The TFT liquid crystal panel 100 includes a gate driver (vertical scanning means) 200 and a source driver (video signal output means')
300. The gate driver 200 and source driver 300 are TFT panels l.
They are connected to the scanning electrode 101 and signal electrode 102 of OO, respectively.

The video signal is input to source driver 300.

A control signal such as a scanning pulse input to the gate driver 200 and a sampling link clock input to the source driver 300 is provided from a control circuit not shown.

The display operation in the matrix type liquid crystal display device shown in FIG. 3 will be explained with reference to FIG. 4. The gate driver 200 is
As shown in FIG. 4, the scanning electrode 1 of the TFT panel 100
A gate-on signal is sequentially applied to 01. That is, the gate driver 200 scans the horizontal scanning lines in a predetermined order.

A time of 7M is allocated to scanning one horizontal scanning line.

When the j-th horizontal scanning line is scanned, the TFT 104 connected to the j-th scanning electrode 101 is turned on. The source driver 300 samples the input video signal at a predetermined sampling frequency, and outputs the video signal to the signal electrode 102 in synchronization with the output of the gate-on signal by the gate driver 200. Therefore, TFT l04 in the on state
A video signal is written to the picture element 103 via the pixel 103. Picture element 1
The signal written in 03 is the time T until the next write.
It is held for a period of u.

The write operation by the above-mentioned conventional drive circuit will be explained in more detail. FIG. 5 shows a circuit diagram of an output stage of an example of the source driver 300. The circuit in Figure 5 has one signal electrode 10.
It corresponds to 2.

The video signal is accumulated in the sampling capacitor Csr+p by inputting the sampling pulse.

When writing a video signal to the picture element 103, as shown in FIG.
IS) signal is set to high level. Therefore, the signal electrode 103 is discharged via the transistor 303, and its potential is lowered to the ground level. Next, the transfer (TRF) signal is set to high level, and the signal accumulated in the sampling capacitor CSMρ is transferred to the hold capacitor CH, and the differential amplifier 30
1 and an output circuit including an output transistor 302, the signal is output to the signal electrode 102 connected to an output line 306. The transistor 3o5 has a function of passing a bias current. At the same time as the TRF signal is set to high level,
The TFT corresponding to one of the scanning electrodes 101 is activated by the gate-on signal output from the gate driver 200 described above.
104 is turned on, and the video signal on the signal electrode 102 is transmitted to the picture element 103 connected to the turned on TFT 104.
will be written to.

(Problems to be Solved by the Invention) In the conventional drive circuit described above, as can be seen from the circuit diagram shown in FIG. 5, when the voltage level of the input signal VIN is lower than the voltage of the signal electrode 1o2, However, since there was no means for lowering the voltage of the signal electrode 102, it was necessary to discharge the signal electrode 102 by the DIS signal prior to writing. As can be seen from FIG. 6, the presence of the DIS signal reduces the writing time to picture element 103 and therefore
This has been a hindrance to improving the charging degree of No. 3 and, furthermore, to improving the contrast of a liquid crystal display device.

Further, since all the signal electrodes 1o2 are simultaneously discharged by the DIS signal, a large discharge current flows through the source driver 300 at that time. Furthermore, since the discharging by the DIS signal is performed during scanning of each horizontal scanning line, the power consumption of the source driver 300 increases.

The present invention was made in view of the current situation, and
The object is to provide a drive circuit for a matrix type liquid crystal display device that does not require the DIS signal, improves the contrast of the display device, and reduces power consumption.

(Means for Solving the 5 Problems) A drive circuit for an IJ type liquid crystal display device of the present invention is for a matrix type liquid crystal display device having a display unit in which a plurality of picture elements are arranged in a matrix. vertical scanning means for scanning the display unit every horizontal scanning line;
and a video signal output means for outputting a video signal to the display unit every time the vertical scanning means scans a horizontal scanning line, the video signal output means being capable of charging and discharging the output line. The present invention also includes a bidirectional output circuit capable of performing the following functions, thereby defeating the above purpose.

(Example) The invention will now be described with reference to examples.

The drive circuit of this embodiment includes a gate driver and a source driver, similar to the conventional drive circuit shown in FIG. FIG. 1 shows a circuit diagram of the output stage of the source driver. An input line 6 into which a video signal is input is connected to a non-inverting input terminal of a differential amplifier l via two gates 7 and 8. input! Similarly to the circuit shown in FIG. 5, a sampling capacitor CsI1p and a hold capacitor CI4 are connected to II6. The output line l3 of the differential amplifier 1 is connected to the gate of the N-channel output transistor 2 and the gate of the P-channel output transistor 12. An output video signal is taken out from the sources of the output transistors 2 and 12 via an output line 9. Output line 9
is connected to the inverting input terminal of the differential amplifier I. Between the sources of output transistors 2 and 12 and ground,
A bias setting transistor 11 is provided.

The operation of the circuit shown in FIG. 1 will be explained. The video signal is stored in the sampling capacitor C sr+p by inputting the sampling pulse to the gate 7 . Next, the transfer (TRF) signal is set to high level, and the signal accumulated in the sampling capacitor csr+ρ is transferred to the hold capacitor CH, and the signal is transferred to the differential amplifier l.
is input. Since the differential amplifier 1 operates as a non-inverting amplifier, the output voltage VQ of the differential amplifier 1 changes substantially in conjunction with the level of the input video signal.

When the voltage Vc is larger than the voltage v ouv of the output line 9, the gate of the N-channel output transistor 2 is controlled by the voltage Vc, and the output transistor 2 is turned on.
A full ml flow of io+ flows. The charging current io1 flows until the output voltage Vour becomes equal to the input voltage VIN of the differential amplifier 1.

On the other hand, when voltage VG is smaller than output voltage VOLI7, the gate of P-channel output transistor 12 is controlled by voltage vG, output transistor 12 is turned on, and discharge current io2 flows. Discharge current 102 flows until voltage V OIJT equals voltage VIN.

As can be seen from the above, the output transistors 2 and l2 have a bidirectional function that allows them to charge and discharge the output line 9 and the signal electrode 102 connected thereto depending on the input signal level. have.

In this way, the drive circuit of this embodiment eliminates the need for discharging the signal electrodes using the DIS signal, which was conventionally required. As shown in FIG. 2, if the drive circuit of this embodiment is used, the time T
}All of I can be used for writing to picture elements. Therefore, the degree of charge of the picture element is increased compared to the conventional case, and the contrast of the display device is improved. In addition, the current associated with the above-mentioned discharge is eliminated, and the only current required is to fill the difference between the input voltage VIN and the output voltage vour, so the power consumption of the display device including the drive circuit is reduced. greatly reduced.

(Effects of the Invention) According to the present invention, a drive circuit for a matrix type liquid crystal display device is provided, which can improve the contrast of the display device and reduce power consumption.

In the field of matrix-type liquid crystal display devices, it is thought that larger display screens and higher definition will be pursued in the future. Along with this, it will be necessary to further shorten the writing time for picture elements. Furthermore, considering that the source capacitance and gate capacitance within the display panel will increase as the screen becomes larger, and the signal delay time will increase, the conditions for writing to picture elements will become increasingly strict. The present invention is extremely effective in such situations.

As the resolution of screens increases, the number of signal extraction terminals increases, so high-density packaging technology is considered to be necessary. COG is seen as a promising technology for high-density packaging, but
The reduction in power consumption achieved by the present invention is also very effective in realizing high-density packaging using COG.

4. Noe na! U Fig. 1 is a circuit diagram of the output stage of a source driver in an embodiment of the present invention, Fig. 2 is a timing chart for explaining the operation of the embodiment, and Fig. 3 is a conventional matrix type liquid crystal display. A diagram schematically showing an example of the device, FIG. 4 is a timing chart of a gate-on signal in the matrix type liquid crystal display device, and FIG. 5 is a source driver in a drive circuit for a conventional matrix type liquid crystal display device. FIG. 6 is a timing chart for explaining the operation of the drive circuit having the source driver of FIG. 5. FIG.

l... Differential amplifier, 2... N-channel output transistor, 6... Input line, 9... Output line, 1l...
Bias setting transistor, l2...P channel output transistor, lOO...TFT liquid crystal panel, l
ol...Scanning electrode, 102...Signal electrode, 103...
...Picture element, 104...TFT, 200...Gate driver, 3oO...Source driver.

that's all 1st 1E Forbidden figure 2 Figure 3 Figure 4 Figure 5 VCρ Figure 6 G) Sekenju

Claims (1)

[Scope of Claims] 1. Vertical scanning means for scanning the display unit for each horizontal scanning line, for a matrix type liquid crystal display device having a display unit in which a plurality of picture elements are arranged in a matrix; A drive circuit comprising a video signal output means for outputting a video signal to the display unit each time a horizontal scanning line is scanned by the scanning means, the video signal output means charging and discharging the output line. A drive circuit for a matrix type liquid crystal display device, which is equipped with a bidirectional output circuit capable of providing a bidirectional output circuit.