JPH0346289A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a structure in which both an electronic device and an optical device can be optimized by a method wherein the overlap of the wave functions of two-dimensional electron gas and holes injected from an emitter side into a GaAs quantum well of an undoped layer are controlled by an electrical field from a collector electrode. CONSTITUTION:When a GaAs/AlGaAs heterojunction is used, a carrier feed layer type AlGaAs layer 4 and an undoped AlGaAs layer 5 are provided so as to form two-dimensional electron gas (2DEG) in a high purity GaAs layer 10. Moreover, a p<->-AlGaAs layer 11 functioning as a potential barrier layer against holes and a p<+>- AlGaAs collector layer 12 are provided so as to temporarily localize a hole injection current 100 from an emitter p-AlGaAs layer 3. When a semiconductor device is made to operate as an light emitting device, the holes 100 are properly injected from an emitter side and a collector bias is applied, whereby the overlap of the wave functions of electrons 50 and 51 in a base can be controlled. Therefore, a recombination time required for electrons and holes inside a base region can be made extremely small and the light emission of the base region can be controlled at a very high speed. By this setup, a structure where an electronic device and an optical device can be separately optimized can be obtained.

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a semiconductor device, and particularly relates to a semiconductor device suitable for use in an optoelectronic integrated circuit (OEIC) used for optical logic operations such as optical computers, optical communication, optical measurement, etc. . [Prior art] Semiconductor laser (LD), photodetector
ctor), light-emitting diodes (LEDs), and field-effect transistors (FETs; Field E
effect transistor) or heterojunction bipolar transistor QIBT;
nction Bipolar Transistor
0EIC that integrates electronic devices such as ) on the same substrate.
(Optoelectronic integrated circuit) is a high-speed optical signal for optical communication/1! It has already reached the practical stage as a child signal converter (for example, Seiji Ohnaka, Hiraaki Tsujii, Jun Shibata; Photoelectronic integrated circuit for light emission integrated on a semi-insulating InP substrate: f! Child Information and Communication Society Journal CVol, J71-CNo, 5.pp, 748-
754. May 1988). Regarding the current status and problems of conventional 0EIC, see IEICE Transactions C; Vol.
. Learn more about J71-CNo. 5, special feature on optical integrated circuits. Ultra-high-speed memory and ultra-high-speed logic of compound semiconductor electronic devices, or ultra-high-speed Si bipolar memory (for example, Jo Nagata, Ultra-high-speed bipolar devices, Baifukan, 198
In a supercomputer using ultra-high-speed devices such as the SS1. M.S.
Since the connection between the IC and the LSI is realized by metal electrical wiring, the inter-chip delay time derived from the CR time constant determines the main part of the system delay time. In an attempt to solve this delay time, some studies have begun on optical elements and connection technology using light. In addition, communication technology using optical fibers and computer technology, which had traditionally belonged to separate technology categories, have merged their respective unique technologies.
There is a growing demand for more sophisticated systems.

[Problem to be solved by the invention]

This kind of fusion of computer construction technology and communication technology is
This will lead to the realization of a new system, and the key device to realize this is a new concept opto-electronic integrated IC1 that takes advantage of the characteristics that electronic devices and optical devices are good at. ) with an integrated scale of opto-electronic integrated ICs (OEIC/MSI/LSI)
) is believed to be. However, such opto-electronic integrated ICs cannot be used with conventional ○E.
Even if an attempt was made to realize this using IC technology, semiconductor laser LEDs and the like were conventionally used as such optical devices, resulting in the following problems. 1. The switching speed of conventional semiconductor lasers and LEDs is essentially limited by the recombination time of electrons and holes, and cannot be reduced to less than 10 psec. In other words, conventional optical devices are considered as switching elements. sometimes,
Compared to the switching time of an electronic device (FET or bipolar transistor), the switching time is more than two orders of magnitude slower, so it was unsuitable for ultra-high speed as an 0EIC for computer applications. 2. The threshold current Iih of a conventional semiconductor laser is on the order of mA at the lowest, and the current when the semiconductor laser is operating is on the order of 10 mA. Therefore, it was impossible to integrate a large number of semiconductor lasers due to power consumption and heat generation issues. 3. Conventional semiconductor lasers require the formation of some kind of resonator, making the manufacturing process extremely complicated. , it was not suitable for integrating a large number of semiconductor lasers. 4. Because the crystal structures of optical and electronic devices are different, the manufacturing processes for electronic devices and optical devices are not compatible, and optical devices that require higher crystal quality can be manufactured with high reliability and high yield. However, it has not been possible to form a device with good quality. In order to solve these problems of conventional 0EIC, it is possible to make the ZI optical element high-speed and low-power consumption. Z2. Electronic and optical devices can be formed with the same crystal structure or a structure close to it, and both can achieve the highest performance. On the other hand, the following are the directions for new optoelectronic integrated devices: A. A new device operation that combines transistor-like operation and light emitting or light receiving operation can be achieved within one element. B. A new device operation is possible in which the transistor itself has optical input/output functions. The C0 structure is simple and can be made as easily as conventional transistors. D. A new device operation that uses light for signal transmission (output) and electrons (holes) for signal amplification control is possible. E. With the same crystal structure, A, B, C, and D can be realized. A new optoelectronic fusion device with such functions has been long awaited, but no concrete device structure has been realized. If we call the opto-electronic convergence device with the above new functions the second generation 01EIC, the directions for this new 0EIC are: (1) It is possible to form an optical device and an electronic device with the same crystal structure; Is it the highest performance device? (2) Individual electronic elements that perform logical operations simultaneously. It can be said that the goal lies in the realization of a new opto-electronic fusion device that completely integrates light and electrons by receiving light and emitting light. An object of the present invention is to provide an optoelectronic fusion device that realizes a second generation 0EIC that satisfies such requirements. The features of the present invention are the above A, B, C, D,
In addition to satisfying E, we provide a structure that allows electronic devices and optical devices with the above functions to be independently optimized using the same epitaxial layer. The advantage is that it is possible to create an opto-electronic fusion IC with a high yield and an integration scale exceeding that of an optical device while achieving the desired device performance. When realizing such an opto-electronic integrated IC, what limits the speed is the light emitting device. In an attempt to break the switching speed limits of conventional optical devices, Yamanishi et al.
181486) has been proposed. The principle diagrams of the invention are shown in FIGS. 2(a) and 2(b). As disclosed herein, a normal double heterojunction PNP HBT (Heterojunction Bi
A moderate amount of holes are injected into the n-type base region of the polar transistor) from the emitter layer 110 side, and a collector bias is applied to inject electrons in the base (Fig. 2(b)
It is possible to spatially separate electrons A and holes B while still capturing A) in ) and holes (B in Fig. 2(b)). Furthermore, it is possible to control the light emission lifetime, and to reduce the amount of light emitted from the base region. It is disclosed that light emission can be controlled extremely quickly. However, this invention does not have the technical concept of using the semiconductor light emitting device as an ultra-high-speed electronic device HBT or the technical concept of monolithically integrating an optical device and an electronic device. However, it takes time to spread the base region, and the cutoff frequency is thought to be quite low, although it is not specified in this invention. This is a problem specific to electronic devices caused by simply using the n-type base region of a normal pnp-type HBT as an n-type GaAs or AlGaAs layer.
O[EIC] intended for integration and compounding with electronic devices.
becomes a particular problem. This problem is solved by the IBT laser (J, Kat
z and 6 others App1. Phys, Lett, 37.
(1980), 211), the performance as an IBT and as a laser becomes mediocre, and in practice it cannot be used even if optimized. Furthermore, double hetero type pnp type HBT as an optical device
The biggest problem with this is that the base layer is doped with a high concentration of impurities, making it difficult to apply a high electric field within the base, making it impractical to efficiently realize light-emitting devices such as Yamanishi's. It must be emphasized that this is extremely difficult. This problem is an essential drawback due to the fact that the base layer of the IBT is formed by a doped layer. This is the same phenomenon as the inability to form a finite electric field in metals. By grading the A1 set in the base region, it is possible to realize a device that applies an effective electric field only to either electrons or holes, but it is possible to effectively control the spatial separation of electrons and holes. It's difficult to do. That is,
The present inventors have noticed that the double-hetero type pnp type HBT has disadvantages that cannot be avoided both as an electronic device and as an optical device. Subsequently, Y.Kan et al., in their paper, '
ThreeTerminal Light Emit
ting Device with Functions
of Current Injection and
Field Control', LC-5-7, pp
633-634: Extended Abstract
s of the 20th (1988 Interna
tional)Conference on 5oli
d 5tate Devices and Materi
als, August 24-26.1988. K
aio Plaza Hotel, Tokyo, JA
In the PAN, the base region of the pnp HBT is made of n-Al.
By using a GaAs/undoped GaAs/n-AlGaAs structure, the operation of the light emitting device of JP-A-63-181486 has been demonstrated. In this case, when light is emitted, electrons and holes exist in the GaAs region within the quantum well,
When not emitting light, the emitter side p-AlGaAs/n
-AlGaAs has been shown to exist in the heterointerface n-AlGaAs. By providing an undoped layer in such an n-type base layer, the above-mentioned drawbacks of a normal pnp type double heterojunction HBT seem to be partially avoided, but this is not sufficient. Furthermore, Kan et
The device structure of al. focuses only on the operation of an optical device, and there are deficiencies as an electronic device. For example, if the n-AlGaAs layer on the emitter side of the base region is too thick, a neutral region is generated in the rrAIGaAs layer at the pn junction with the emitter p-AlGaAs11, and it is not completely depleted. ), which results in a significant deterioration of the performance of the electronic device (the cutoff frequency is approximately 5 GHz).Furthermore, the rrAIGaAs base layer on the collector side is completely unnecessary as an electronic device, and this also deteriorates the device performance. It is decreasing. This situation is normal pnpfl
It's no different from BT's shortcomings. Some of the inventors of the present invention have already attempted to solve the problems of ordinary pnp-type HBTs as electronic devices by combining one or two layers of two-dimensional carriers with a bipolar base layer or a composite with an FET. Electronic devices used for
BT)
the IEDM-International E
electronDevices Meeting, W
ashington D, C, December 6
-9.1987. pp78-81. Or, JP-A-6
2-25455, JP 62-25454, JP 62-199049, JP 63-236358,
(See Japanese Patent Application Laid-Open No. 63-236359, etc.). However, these inventions do not describe the operation as an optical element.

[Means to solve the problem]

Among our above-mentioned inventions, JP-A No. 63-236358,
In JP-A No. 63-236359, Figs. 2(c) and (d)
), the two-dimensional electron gas layer (20EG
) 590 (same invention; corresponds to 59 in FIGS. 1(b) and (c). 430 is n-Al which is a 20EG supply source
The GaAs layer 450 is the emitter layer for hole injection and is made of p-Al
It is formed of a GaAs layer. It is important to design the crystal structure so that the n-AlGaAs layer is depleted at the 430.450 pn junction. ) is the AlGaAs barrier 43
Undoped GaAs sandwiched between 0.5OO1soo'
It has been found that since the pnp type HBT formed in the layer 420 is close to a device structure that can solve the problems of the present invention. That is, the operation of the optical device of the semiconductor light-emitting device of Yamanishi et al. can be realized using the essential part. In other words, by controlling the overlap of the wave functions (generally distribution functions at finite temperatures) of 20EG and holes injected from the emitter side in the GaAs quantum well, which is an undoped layer, by using the electric field from the collector electrode, an almost ideal state can be achieved. We discovered that it is possible to realize the light-emitting device of Yamanishi et al. Also, JP-A-63-
No. 236358 and JP-A No. 63-236359, the corephthal type layer is made of p+-GaAs 410 (Fig. 2(c)
), (d)), the collector layer 500
．． When the film thickness of 500' is approximately 300 nm or less, there is a slight problem that part of the light generated in the base/collector regions 420, 500, and 500' is absorbed within the p'' GaAs layer 410. However, this point is p-A
This problem can be completely solved by replacing it with an IGaAs layer. Furthermore, even with such a device structure, there is no deterioration in the characteristics of the electronic device. That is,
As an electronic device, it can maintain extremely high speed. According to one aspect of the present invention, one or two two-dimensional carrier regions formed at a semiconductor double heterojunction interface made of the same epitaxial crystal can be used as an active layer of a field effect transistor, a base layer of a heterobipolar transistor, or a base layer of a heterobipolar transistor. an active layer of a light emitting device that controls light emission in the base region by controlling the overlap of wave functions of electrons and holes in the base region by controlling an electric field applied to the base region through the collector electrode of the transistor; There is also provided a semiconductor device which is shared by at least two types of elements selected from the group of elements in which the active layer of the field effect transistor is the active layer of the light receiving element. Such a semiconductor device is disclosed in the above-mentioned invention (Japanese Unexamined Patent Publication No. 63-23
6358, JP-A No. 63-236359), a p''-AIGaAs collector layer is provided between the corephthal+ to eliminate absorption of light from the light emitting element, and the two-dimensional electron gas layer is formed into an IN or 2M heterojunction. (hereinafter referred to as a two-dimensional carrier in the present invention), this two-dimensional carrier is used as an active layer of an FET, a base layer of a pipera, and a field-effect LED. Commonly used for light emitting layers, FET type light receiving elements, etc. According to another aspect of the present invention, there is provided a semiconductor laminate formed on a single substrate and having a double heterojunction structure, wherein the double heterojunction A light-emitting element portion and an active element portion each having a single region or a plurality of regions of a two-dimensional carrier formed near the structure as a light-emitting region and an active region;
There is provided a semiconductor device having means for controlling the recombination of the two-dimensional carrier with a carrier of an opposite conductivity type and the movement of the two-dimensional carrier within the region. According to one limited aspect of the present invention, there is provided a semiconductor device characterized in that the light emitting element section and the active element section have a vA edge with each other. According to another limited aspect of the present invention, the semiconductor stack constituting the light emitting element portion includes a first semiconductor region having an impurity of a first conductivity type, and a first semiconductor region having an opposite sign. a second semiconductor region having a second conductivity type impurity, and a semiconductor region located between these two semiconductor regions and forming a heterojunction surface at a junction interface with the first semiconductor region, the semiconductor region having a second conductivity type impurity; a third semiconductor region that does not substantially contain conductivity type impurities in the sense that it does not inhibit the mobility of the two-dimensional carrier; A semiconductor device is provided in which a region of the two-dimensional carrier is formed in a region near the junction interface and is formed based on a difference in band edge energy value between the first and third semiconductor regions. [Operation] In order to further explain the present invention, as an example, GaAs
The essential part of the present invention will be explained using an energy band diagram when a /AlGaAs heterojunction system is used. FIGS. 1(a), 1(b) and 1(C) show a case where the present invention is realized using one layer of two-dimensional electron gas. Carrier supply layer type AlGaAs layer 4 for forming two-dimensional electron gas 50 in high purity GaAs layer 10 of about 15rv+, undoped Al
A GaAs layer 5 is arranged (modulation doped quantum well structure). Further, a potential barrier layer p-AIGaAs JIF11, p for temporarily localizing the hole injection current lOO from the emitter p-AlGaAs layer 3 is provided.
"-AI GaAs collector layer 12 is formed. In this way, the p-type GaAs collector layer 12, which has a wider band gap than the undoped GaAs
The reason for using the +-AIGaAs collector layer 12 is to prevent light generated in the base region from being absorbed in the collector layer. It is important to design the thickness of the collector layer 11.12 in accordance with the thickness of the light emitting region 10 and the A1 composition of the collector layer 11.12 so as to prevent absorption of light. On the other hand, p-Al with a large A1 composition corresponding to the emitter layer
GaAs layer 3, as an electronic device, n-AlGaA
The emitter-based p layer 4 is completely depleted.
It is important to determine the crystal specifications so as to form an n-junction. In operation as a light emitting device, holes 10 are emitted from the emitter side.
Emitter base voltage Vbe = 1.5 with appropriate injection of 0
V, the collector current density Jc is 1
02 to 10'A/co+"), by applying a collector bias, the electrons in the base (
The overlap of the wave functions (generally distribution functions at a finite temperature) of the holes (51 in FIG. 1(b)) and the holes (51 in FIG. 1(b)) can be controlled. As a result, the recombination time of electrons and holes in the base region can be extremely shortened, and the light emission operation lifetime can be controlled, so that light emission from the base region can be controlled extremely quickly. Figure 1 (c) from the balance between bipolar operation and light emitting operation
As shown in the band diagram, a p-AlGaAs layer 11' may be used as a potential barrier layer for holes having a large Al composition. pAIGaAsAlGaAs layer 11A
It goes without saying that the composition and film thickness of M1 are designed to optimize the speed of bipolar operation and light emitting operation according to the specifications of the system (m1 product). On the other hand, the light receiving element that converts the optical signal into an electrical signal is
It has been reported that by irradiating the gate region of a 2DEGFET with an lGaAs buffer layer, it operates as an extremely high-speed light receiving element (T. Uhoda et al, Summaries
of 6th ICUP (International
onal Conference of Ultrah
igh5peed Phenomena), pP212
-213, or Norio Umeda, Yoshio Hari; Journal of the Institute of Electronics and Communication Engineers Vol. J68-C, No. 12, pp1132-11
34: Same Vol1. J68-C, No. 4, pp263
In this case, increasing the speed of the light receiving element and increasing the speed of the electronic device are consistent with each other.In particular, by applying a potential to the p''-AIGaAs collector layer 12, Gate area 2DE
Among the electron-hole pairs formed in the G layer, it becomes possible to suck out holes to the collector electrode side, resulting in a significant improvement in switching characteristics. By using the p''-AIGaAs collector layer 12, problems such as an increase in collector resistance are expected, but this can be solved by forming a thin p''-GaAs layer at the bottom and optimizing the film thickness and doping level. This can be avoided and does not degrade the performance of bipolar transistors. Furthermore, since 2DEG is formed in a high purity layer, the mobility of generated holes can also be increased, and holes can be removed more quickly. In an optimal form of the present invention, the second generation 0EI
Features as an opto-electronic fusion device as C Zl, Z
2, A, B, C, and D, and with the same shrimp structure (crystal structure), the planar shape, electrode structure, and shape can be designed according to the purpose, and can be used for 2DEGFETs, 2DEGHBTs, ultrahigh-speed light emitting devices, and light receiving devices. Can be formed into seven shapes. Further, the optoelectronic fusion device of the present invention has p-AlGaA
By removing the s-layer 3 and forming an n-AlGaAs layer 20 with a high A1 composition by a method such as selective growth (FIG. 1(d)), this two-dimensional electron gas can be used as the active layer of a semiconductor laser or LED. 50 can also be used. , an n-AlGaAs layer 20 with a large A1 composition in the optical device portion. Furthermore, since the collector layers 11 and 12 can have a structure as shown in FIG. 1(d), it is suitable for the structure of modulation doped SGW (single quantum well) lasers and LEDs. In this way, the active layer of FET, the base layer of bipolar, H
Because a BT type ultra-high-speed light emitting element and a light receiving element can be formed in the same structure, or a normal light receiving element and the active layer of a semiconductor laser can be formed in the same structure, it performs logical operation as a second generation 0RIC. We can provide a new device principle and structure that completely integrates light and electrons, where individual electronic elements simultaneously receive light and emit light.
We can provide a new system technology called I.

【Example】

Hereinafter, the present invention will be explained in more detail through Examples. Example 1 An example of the present invention in which one layer of two-dimensional electron gas is used will be described with reference to FIGS. 3(a), (b), and (C). In this case, a single quantum well (SQw; Single Q
Ultrafast light-emitting device (A) using 2DEGFET-type light-receiving element (D), 2DEGFET type light-receiving element (D),
When GHBT (C) and 2DECFET (B) are formed using the same shrimp layer (Fig. 3 (a), (b), (C
)) and an SQv semiconductor laser are also formed on the same substrate (FIG. 3(d)). As shown in FIG. 3(a), metal organic pyrolysis (MOCVD) is applied on a semi-insulating GaAs substrate 14.
Crystal growth was performed using a nic VaporPhase Epitaxy. A specific example of the shrimp structure shown in FIG. 3(C) is p"GaGaAs3513 (10
10"cm-", thickness 600nm), p"-Al
xGa1-xAsN 12 (A1 composition X is 0.4, 0
．． It is best to choose from 35 to O or S. The Mg concentration is 4
It contains 10"cm-'. It is better to choose 5 x 10"am-' or more. The thickness is 3
00nm, but it is preferable to design within the range of 1100n to 11000n. ), undoped or p-Aly
Gat-yAsMll (A1 composition y is 0.4, 0.
It is best to choose between 15 and 0.50. The doping level of Mg is IXIO"Cl1l-', 5X
It is best to choose 10"cm-" or less. Thickness is 150nm
So, it is best to choose between 1100n and 300nm.)
, the undoped GaAs layer 10 has a thickness of 15 nm (the thickness is 1
It is preferable to use between 0 nm and 30 ni. Doping level, whether n-type or p-type, is 5 x 10
Select "cm-" or less. ) thickness. This doping level mainly allows an effective electric field to be applied to the base-collector region and makes it possible to effectively overlap the distribution functions of electrons and holes. The undoped A1□Ga1-zAsN5 was introduced so as not to deteriorate the mobility of the two-dimensional electron gas 50.
The film thickness is 2cm. It is used in the range of 0 to 7 nm. The n-AluGa, -uAs layer 4 has a composition of A1 group 0.
．． 25, the film thickness is 30 nm, and the Se doping level is 2X10"cm-'. A111
fAu ranges from 0.24 to 0.45, film thickness is 15 nm
to 45n+m, and the Se doping level is selected in the range of 1 to 8 x 10"cm.p.
The type A1vGal-vAs layer 3 has a composition of A1 group 0.
40. The film thickness is 300 nm, the Mg doping level is 4 x 101'am-3, the AI group V is in the range of 0.30 to 0.45, and the film thickness is 150 nm.
to 450 nm, Mg doping level from 1.0 to 20. OX in the range of 10"am-3.Finally, in order to improve the non-alloy ohmic characteristics of the emitter electrode, 50% of p4+-GaAsil, 2 is selected.
Form n. At that time, the doping level of 1 Mg was 2×102o102o. The doping level of Mg in No. 2 was 4 x 10"cm-3. C (carbon) may be used as a dopant for P-type GaAs/AlGaAs. In that case, MOMB
By E (MBE using organometallic source) method, 2X1
It becomes possible to dope up to 0"Qm-". C(
When using carbon), the diffusion coefficient is 5 compared to Mg.
In the high concentration region of X 10"cm-' or more, it is two to four orders of magnitude smaller, stable even after the heating process, and there is no deterioration of the pn junction. When determining the crystal structure, two-dimensional electron gas 50 is supplied. It is important to design the thickness and doping level of the n-type AlGaAs layer 4 so that it is completely depleted.Hereinafter, FIGS. The manufacturing process will be explained.However, in order to prevent the effect of parasitic capacitance that becomes an obstacle to high-speed operation, p+-AToGa
A case will be described in which the semiconductor layers 11 and above are formed on a substrate in which oxygen is selectively implanted into the knee xAs layer 12 within the wafer plane.
Region 12' is not necessarily required. Ultra high speed light emitting device (A), 2DEGFET type light receiving element (D
), and 2DEGHBT (C) and 2DEGFET (B)
After forming alignment marks, which can be formed by the same process except for the difference in the flat panel shape, mesa-etch the parts other than the FET/bipolar/light emitting and photodetector/semiconductor laser parts to secure a 1-solation area)
, Sin. 2DEGH
Emitter electrode 30 of BT (C), ultrafast light emitting device (A
) emitter electrode 30' or 2DEGFET (
B) and light receiving element (D) nocate electrode 37.37'
ft LeWSi/Wta:. 300 nm sputter deposited. At this time, 20EGHB
The dimensions of the emitter electrode of T were 1 μm×10 μm. This emitter dimension is (0.2 to 5.0 μm)
The dimensions of the gate electrode, which are preferably selected in the range of (0.2 to 2000 μm), were 0.5 μta x 100 μm. Gate dimensions are (0.2 to 5.0 μm)
(Choose in the range of 0.2 to 2000 μ-. Emitter electrode 30.30' or gate electrode 37.37' was processed after photoresist was applied. After removing the resist, emitter electrode 30.30' and gate electrode 37.37' were processed. Using 37' as a mask, parts other than the gate regions of the FET (B) and light receiving element (D), the base collector regions of the bipolar (C) and light emitting element (A), or semiconductors 2 and 3 were removed. Next, after depositing Sin for 100 rv, selective dry etching was performed to form a side wall Sin. The n+ region 24 was formed to have a film thickness of 300 ni.Next, the Sin□ in the semiconductor laser portion was selectively removed and MOCVD n+-Al
wGa, +@As selective growth was used to grow Si to 8X
20 n+ regions containing 10"cn+-3 were formed.A
As one composition, 0.45. Film thickness: 500n+
, as doping level of Si, 2 X 10”
am-” is selected.The A1 composition is from 0.40 to 0.
55, film thickness ranges from 300nm to 11000n, Si doping level from 1 to 8×101c
Furthermore, in order to improve the ohmic characteristics to the n-type layer of the semiconductor laser, the n+-
GaAs selective growth was used to grow Si into 8 x 10” am
-' containing n+ region 22 was demonstrated. The film thickness is 50n
■It was. Next, 110 ni of Sin was deposited on the entire surface, and the Sin in the semiconductor laser portion was selectively removed to form a BH (buried heterostructure) structure semiconductor laser. Layer 23 was formed by N0CVD. At this time, the width of the active layer region and the stripe width are typically 0.5 to 3.0 μm, and the width is 0.0 μm, and the stripe width is 0.5 μm to 3.0 μm. 110 ni of Sin was deposited, and 20 ni was deposited using the lift-off method.
EGFET (B), source drain electrode of light receiving element, 3
5.36.35', 36', bipolar (C), base electrode 31.31' of light emitting element (A), n of semiconductor laser
The 0-order ohmic electrode 34 to the mold layer is formed of AuGe/Ni/Au. 20EGFET (B), substrate bias electrodes 40' and 40 of the light receiving element (D), and 2DEGHBT (C)
, AuZn/Au was deposited and alloyed to form the collector electrodes 32 and 32' of the light emitting element (A) and the ohmic electrode 33 to the p-type layer of the semiconductor laser. Isolation between elements and wiring between elements were performed in the same manner as usual. That is, the trench 45 was formed, and after a planarization process (not shown in the figure), wiring was performed using Au/Mo according to the purpose. The difference from a normal integrated circuit is that the electrical signal input to the collector electrode 32' of one light emitting element (A) is converted into light 41, and the light receiving element (D ), the light is focused between the source and drain, the source-drain current is controlled, and the optical signal is converted into an electrical signal. Of course, the light receiving element 1 can also play the role of receiving optical signals sent from outside the chip and converting them into electrical signals. mainly,
Memory operation and logic operation are performed using 20EGFET (B) and 2
0 light emitting device (A) formed using 0EGHBT (C)
Needless to say, it should be insulated from other elements not only electrically but also optically.Also, the light emitting direction may be toward the back surface of the substrate. It is necessary to hollow out the gate to avoid
The μL gate width was 10μ. A control electrode 40' to the p-type layer 12.13 of the FET portion is formed depending on the purpose. Although not detailed in the explanation of the manufacturing process, the 2DEGHBT type light emitting element (Fig. 3A) and the 2DEGHBT type light emitting element (Fig. 3A)
The FET type light-receiving element (FIG. 3D) has a circular planar shape so that the light emitted from the substrate is efficiently emitted perpendicularly and in order to improve the light-receiving efficiency. That is, the emitter electrode 30
The radius of the inner circle of ' is 50 μm and the width is 5 μm. The light 41 is emitted from within this inner circle in the in-plane vertical direction.In order to eliminate the absorption of light by a p''-GaAs,1.2, the p''-GaAs, 2, within this circle is The radius of the inner circle of the gate electrode 37' of the light receiving element (D), which may be removed, is lOμ, and the width is 0.5μl. Source electrode 35
'The radius of the drain electrode 36' is 8.5μL, the radius of the drain electrode 36' is 11
．． 5μ thick, and the distance between source (drain) and gate is 1
．． The 0-light-emitting element, which had a diameter of 5 μm, may have a comb-shaped electrode instead of a circular shape to improve efficiency. 2DEGF like this
ET (B) and 2DEGFET type photodetector (Figure 3D)
teeth. Since the n+-GaAs layer 24 has extremely low resistance, the source gate resistance R8t is reduced and the device characteristics are extremely good. In fact, as a FET, the mutual conductance G is 400 m5/mm, and the cutoff frequency fT is 45 G.
The Hz was changed. In addition, the bipolar transistor of this embodiment is capable of a 1 psec response as a light receiving element, and a 0.1 psec response when sucking holes generated by the substrate bias electrode 40. 10'A/c+*'', cutoff frequency fT is 160GHz, current amplification factor hF2 is 20
It was 00. Also, extremely high f as a pnp type HBτ
The reason why T is achieved is that the base layer is extremely thin, at 30 nm, and is close to the device structure. In this structure not using the semi-insulating AlGaAs region 12', fT was 90 GHz and current amplification factor hrE was 200. As the ultra-high-speed light-emitting element (A), an ultra-high-speed, low-power light-emitting switch with a power consumption of 500 μV and a switching speed of 1 psec was formed. At this time, it becomes possible to form light emitting elements with hundreds or thousands of values on the same chip. The beauty of the present invention lies in the fact that it is possible to achieve the highest performance of both the optical element and the electronic element. As in the embodiment of the present invention, the AlGaAs collector layer 11
．． The total film thickness of 12 is approximately 300 when the A1 composition is 0.3.
It is necessary to make it more than nm. This is to prevent light from leaking to both sides because the film thickness of the light emitting region 10 is thin and from reaching the p''-GaAs layer 13. The light of p”-
It is no longer absorbed by the GaAs layer 13. The semiconductor laser of this example has an active layer doped with modulation MQ.
Because it has a W structure, it oscillates at a lower carrier density than a normal DH laser, and has a high speed of 1 mA compared to a conventional B laser.
The H laser oscillated at a low threshold current of about 175. Furthermore, when the resonator length was set to 100 μm and the end faces were made to have high reflectance, an extremely low threshold current of about 500 μA was obtained. Furthermore, the relaxation oscillation frequency when the optical output is 5 mW is from 30 to 50 G.
Hz, and was able to obtain high performance that is unparalleled in the world. Further, in this example, since a high resistance layer is used as the buried layer, the parasitic capacitance is low (lpsec), and it was found that there is no problem of roll-off during actual modulation. As described above, the semiconductor laser of the present invention has low power consumption and is excellent in high speed, so it is extremely excellent as a light source for optoelectronic integrated circuits. Although the light emitting and receiving elements are not shown in FIG. 3(d), they can of course be integrated. In this example, an example was shown in which an optical element and an electronic device were formed separately within a plane, but it is also possible to use a 2DEGHBT as a light emitting element, and a 2DEGHBT as a light emitting element, or a 20EGFET as a light receiving element. It is also possible to use the light receiving element as a 20EGFET, and the above Zl, Z2, A as the second generation 0EIC
, B, C, D, and even E elements can be realized. Example 2 An example of the present invention in which two layers of two-dimensional electron gas are used will be described with reference to FIGS. 4(a), (b), and (e). As a semiconductor laser, a modulation doped multiple quantum well structure (M
DMQ%f ; Modulation Doped
This corresponds to the case where a Multiple Quantum Well (in this case two quantum well structures) is used. Only the parts different from the first embodiment will be emphasized and explained. Molecular beam epitaxy (
Molecular Bease Epitaxy;
Crystal growth was performed using MBE). Figure 4 (C)
A specific example of the shrimp structure shown in FIG.
4 x 10"cm-' and thickness 600nII
), P"-AlxGal-xAsM12 (A1 group composition is 0.4, usually selected from 0.35 to 0.4, Be concentration is 4 X 10"cm-' contains 5X10"c
Choose m-3 or more. The thickness is 600 nm, but it is best to design it in the range of 500 nm to 11000 nm), the undoped or p-AlyGai-yAs layer 11 (the At group composition is 0.25, and the thickness should be selected in the range of 0.15 to 0.45). , the doping level of Be is I X 101014a
', select 5X 10110l7' or less. The thickness is 25
0n+i, selected in the range of 50 nm to 300 nm. )
, the undoped GaAs layer 10 has a thickness of 20 nm (the thickness is 1
It is preferable to use between 0 ngr and 30 nm. The doping level is 5X whether it is n-type or p-type.
The thickness of the n-AlzGa, -zAs layer 8 is selected to be less than 10"c++-3).
．． 25, the film thickness is 8 nm, and the Si doping level is 2 x 10" cm. The A1 composition 2 is in the range of 0.24 to 0.30, the film thickness is in the range of 5 rv to 12 nm, Undoped AlzGal-zAsM9.7.5, which is preferably selected as a doping level in the range of 1 to 8 x 10"cm-', is introduced so as not to degrade the mobility of the two-dimensional electron gas 50.50'. The film thickness is 2 nm. The undoped GaAs layer 6 is preferably in the range of 7 nm from O.
A value between 0 nm and 30 on is good. The doping level is 5 X 101sc+++ whether it is n-type or p-type.
−” thickness of e n-AluGal−
The uAs layer 4 has an A1 composition of 0.25, a film thickness of 30 nm, and a Si doping level of 2X.
10"cm-' is selected. The composition of A1 group is in the range of 0.24 to 0.30, the film thickness is in the range of 15r+n+ to 45nm, and the doping level of SL is 8×10 from I.
It is best to choose within the range of "cm-'. p-AlvGa, -v
The As layer 3 has an A1 composition of 0.40 and a film thickness of 3.
00nm, Be doping level 4X
It is better to choose 10"a1'. A1 composition V is in the range of 0.30 to 0.45, film thickness is in the range of 150rv to 450nm, Be doping level is 1 to 20X
A range of 10"c++-' is preferable. Finally, in order to improve the non-alloy ohmic characteristics of the emitter electrode, p"
- GaAs 1.2 was formed into a 50 nm film. At that time, the doping level of 1 Be is 2×10''
It was Qell-'. The doping level of Be in No. 2 was 4×10"cm-' (P-type GaAs/Al
C (carbon) may be used as a dopant for GaAs. In that case, it is possible to dope up to 2X10"c+s-' by the MOMBE (MBE using an organometallic source) method. When C (carbon) is used, the diffusion coefficient is 5X10 compared to Be. ”cm-
The main process of creating a zero-order element in a high concentration region of 3 or more, which is two to four orders of magnitude smaller, stable even after a heating process, and without deterioration of the pn junction will be explained. When determining the crystal structure, two-dimensional electron gas, 50.50
It is important to design the film thickness and doping level of the n-type AlGaAs layer 4.8 that supplies .' to be completely depleted. After forming such a crystal structure and forming alignment marks for proceeding with the lithography process, FET/bipolar/light emitting/receiving element/semiconductor laser were formed in the same manner as in Example 1. In the following, only the parts different from those in the manufacturing process of Example 1 will be described. The semiconductor laser part is formed by S
selectively removing in, MOCVD n+-AlwG
a, -w As selected Kaicho product, Si 8X 10”c
An n+ region 20 containing m-' was formed. 0.45 as A1 composition. The film thickness is 500 nm, and the Si doping level is 2 x 10" cm. The A1 composition is in the range of 0.40 to 0.55, the film thickness is in the range of 300 nm to 11000 nm, and the Si doping level is 2 x 10" cm. A range of 1 to 8 x 10"am-' is preferred. Furthermore, in order to improve the ohmic characteristics of the n-type layer of the semiconductor laser, MOCVD n''-GaAs
An n+ region 22 containing 8×10″1c11 of Sl was formed using selective growth.The film thickness was 50 nm.B
The process for forming a semiconductor laser having an H (buried heterostructure) structure is the same as in the first embodiment. Next, in order to form the gate electrode 37 of the FET, the corresponding portion of the n+-GaAs layer 24 is selectively removed, and then the A
The GaAs layer 4.5 and the GaAs layer 6 were removed, and a gate electrode 37 was formed using A1 using a 500 nm lift-off method. At this time, the gate length was 0.5 μL and the gate width was 100 μL. The bipolar collector electrode 32 and the ohmic electrode 33 to the P-type layer of the semiconductor laser are made of AuZn/
It was formed using Au. P-type layer 12.13 of FET part
The control electrode may be formed in the step of forming the bipolar collector electrode 32 depending on the purpose. Since the semiconductor laser of this example has an active layer having a modulation-doped MQw structure, it has extremely high performance like Example 1. In this example, the gate structure of the FET part adopts a Schottky type. Although we have explained an example in which p
It may be a JFET type using an n junction, in this case,
An advantage is that the gate portion can be formed in the process of forming the bipolar emitter electrode. This is particularly effective when used as a power FET in which a large current needs to flow. In the above explanation, the creation of the light-emitting element and the light-receiving element was omitted, but
For easy analogy, it can be realized by the same process as in Example 1 for forming FET/bipolar. In this example, the case where there are two 2DEGs (two quantum wells) is explained, but three or more 2DEGs can be realized by the same process. In this case, it is effective as a semiconductor laser, but as a bipolar/FET, its performance deteriorates and it has little practical value. In the above embodiments, a composite element including an optical device and an electronic device was described. but. The present invention provides a configuration suitable for controlling the overlap of the wave functions of electrons and holes as a single optical element.
Furthermore, the present invention provides a structure of a particularly suitable opto-electronic composite device in combination with such an optical device. In addition, in the above embodiments, the purpose of the photoelectron double flow side using a buried heterostructure and the same base (channel) collector layer of 2DEGFET and 2DEGHBT as a semiconductor laser is computer application or Local Area NetW.
ork (LAN), etc., since it is related to the input/output interface between LSIs and does not handle long-distance optical transmission, GaAs/AlGaAs lasers are suitable. This is because GaAs is superior in terms of technical proficiency. In addition to the BH tank structure, semiconductor laser structures include
C3P(Channeled 5ubstrate P
lanar La5er) laser, TJS (Tran
sverse Junction 5tripe La
5er) Laser etc. are 2DEGFET, 2DEGHBT
As in Example 1.2, it can be monolithically integrated. For communication-related applications that handle long-distance optical transmission, InPn semiconductor lasers (such as DFB lasers and DBR lasers) are more suitable. Even in this case,
It goes without saying that the optoelectronic composite structure of the present invention is effective. In addition, in this example, only the case of a semiconductor laser is shown as an optical device, but a two-dimensional carrier may also be used as an active layer of an LED.
77K), the present invention may be configured using a two-dimensional hole gas. In that case, in Example 1.2, the n-type semiconductor layer is
It is only necessary to replace the p-type semiconductor layer with the n-type semiconductor layer. Of course, among electronic devices, only FETs
Only bipolar devices may be integrated with optical devices. Furthermore, in all of the above embodiments, examples have been described in which the collector is formed on the substrate side and the emitter is formed on the surface side. However, this configuration is not necessarily essential, and it is also possible to completely reverse the order of the shrimp crystals on the substrate and grow the crystals in the order of the emitter layer, base layer, and collector layer. In this case, the initial configuration of the device structure will be omitted. As can be easily seen, the 2DEGFET is a so-called inverted H type in which a carrier supply layer exists below the 2DEG (two-dimensional electron gas).
EMT ()Iigh Electron Mobile
ity transistor) structure. In this case, in the modulation-doped MQIll laser, the collector layer 11 is left with about 1100n, and the n-
By re-growing the AlGaAs layer, it can be formed by the same method as in the above-mentioned fourth method. Effect of the invention 1 According to the present invention, electronic devices (FET, Bipolar, etc.) and optical devices (
Since we can provide a structure that simultaneously optimizes each of the light-emitting element, light-receiving element, semiconductor laser, photodetector, etc.), we can: 1) design systems and devices that optimize the structure of each electronic device and optical device, even though they have the same structure; can be provided to people. 2) The same device structure can operate as both an optical device and an electronic device. 3) It is possible to realize an opto-electronic integrated integrated circuit that is suitable for integration, has high reliability, and has a high yield. This effect is achieved.

[Brief explanation of drawings]

FIGS. 1(a), (b), (c), and (d) are energy band diagrams for explaining the operating principle of the optoelectronic composite device of the present invention, and FIGS. 2(a), (b), ( c) and (d)
are energy band diagrams for explaining the conventional invention, Figures 3 (a), (b), (c) and (d), and Figure 4.
Figures (a), (b), and (c) are diagrams for explaining embodiments of the optoelectronic composite device of the present invention. Explanation of symbols 1.13.410"・p"-GaAs, 2"・p-Ga
As, 3-.-p-AIGaAs, 4.4', 8,43
0---n-AIGaAs, 5,7,9---undoped AlGaAs, 6.10,420---undoped G
aAs, 11,11', 500.500""P(P-)
-AIGaAs, 12.450...p''-AIGa
As, 14---semi-insulating GaAs substrate, °5o, 50
', 590...Two-dimensional electron gas, 51...Localized hole, 4■...Emission line, 30.30', 140...Emitter electrode, 31°31', 130...Base electrode, 3
2.32', 150...Collector electrode, substrate bias electrode, 40.40', 33...p-type electrode, 34...
N-type electrode, 35.35'...source electrode, 36.36
'...Drain electrode, 37.37'...Gate electrode, 2o, 21"n-AlGaAs, 22.21"n"-
GaAs, 23--high resistance AlGaAs. name / Figure 1-μ / $ / figure (su (b) //I7 /Iσ /20 t3 reunification figure (d) ′''f-E7 (B Nopai Hola (c) ,lf,I!I (c-)

Claims (1)

[Claims] 1. One or two two-dimensional carrier regions formed at the semiconductor double heterojunction interface made of the same epitaxial crystal can be used as the active layer of a field effect transistor, the base layer of a heterobipolar transistor, or the base layer of a heterobipolar transistor. an active layer of the light emitting device, which controls light emission in the base region by controlling the overlap of wave functions of electrons and holes in the base region by controlling an electric field applied to the base region through the collector electrode of the light emitting device; A semiconductor device characterized in that the active layer of a field effect transistor is shared by at least two types of elements selected from a group of elements in which the active layer of a light receiving element is used. 2. In the semiconductor device according to claim 1, a portion of the same epitaxial crystal is selectively removed, and one or two regions of the two-dimensional carrier are formed in common as an active layer of a light emitting element. A semiconductor device characterized by: 3. a first semiconductor region having a first conductivity type impurity;
A second semiconductor region having impurities of a second conductivity type opposite to that of the first semiconductor region, and a heterojunction located between these two semiconductor regions and at the junction interface with the first semiconductor region. a third semiconductor region that does not substantially contain conductivity type impurities in the sense that it does not inhibit the mobility of the two-dimensional carrier; and a carrier is supplied from the outside to the third semiconductor region. a carrier supply means for applying an electric field from the outside between the first and second semiconductor regions; In the vicinity of the junction interface with the semiconductor region, there is a region of the two-dimensional carrier formed based on the difference in band edge energy values of the first and third semiconductor regions, and the region of the two-dimensional carrier is formed based on the difference in band edge energy values of the first and third semiconductor regions, and A semiconductor device characterized in that by changing the overlap of the wave functions of electrons and holes in the third semiconductor region, the probability of recombination of carriers in the third semiconductor region is changed. .