JPH0344715B2 - - Google Patents

Description

[Detailed description of the invention]

INDUSTRIAL APPLICATION FIELD The present invention relates to an RGB signal switching device for a television receiver with an RGB input terminal. BACKGROUND ART Generally, FIG. 6 shows the overall configuration of a switching circuit for switching between RGB signals of a television receiver and RGB signals input from outside. The decoded video signal 12 in FIG. 6 is separated into a luminance signal and a chrominance signal by a demodulator 11 in the television receiver, and the chrominance signal is demodulated to become an RY signal and a BY signal. Furthermore, the matrix circuit in the demodulator 11
-Create Y signal, R-Y signal, B-Y signal, G
-Y signal is matrixed with luminance signal and R, G,
The B signals become 1R, 1G, and 1B. On the other hand, RGB signals 8R, 8G, etc. given from outside the television receiver, such as personal computers or teletext signals,
8B is terminated with terminating resistors 7R, 7G, 7B,
The signals are applied to terminals 22R, 22G, and 22B of the clamp circuit 22 through capacitors 6R, 6G, and 6B. The clamp circuit 22 controls the television signal.
A burst gate pulse 20 is applied to the clamp circuit 22 in order to match the pedestal level of the back porch of the horizontal synchronizing signal of the RGB signals 1R, 1G, 1B with the pedestal level of the external RGB signals 2R, 2G, 2B. External RGB reproduced with DC current by clamp circuit 22
Signals 2R, 2G, 2B are switches 10R, 10
RGB signals 1R, 1G, and 1B are inputted to RGB signals 1R, 1G, and 1B depending on the voltage of the control signal 13. Output 3 of switches 10R, 10G, 10B
R, 3G, and 3B are input to the clamp circuit 17 through the amplitude control device 14. An amplitude control device 14 performs amplitude control of the RGB signal according to a voltage 15 determined by a resistor 16. Resistor 1 in clamp circuit 17
This is a clamp circuit for matching the pedestal level of the back porch of the horizontal synchronizing signal of the RGB signal to the voltage 18 determined by 9, and the clamp pulse 2 applied to the clamp circuit 22 is used as the clamp pulse.
The same pulse as 0 is used. Figure 7 shows the clamp circuit 22 and switch 10R.
The circuit diagram is shown. (Since the three systems R, G, and B are the same circuit, only the R circuit is shown.) The R signal demodulated by the television receiver is sent to the emitter follower 701.
The external R signal is input to the base of the terminal 72.
5 is input. Transistors 706 and 707 are switches, and when transistor 706 is ON and transistor 707 is OFF, differential amplifier 70 is activated.
Only signal 724 is transmitted to amplitude control circuit 721. On the other hand, when the transistor 707 is ON and the transistor 706 is OFF, the differential amplifiers 704 and 70
5 is in operation, and only the external R signal input from the base of transistor 705 is transmitted to the amplitude control circuit. Terminals 719 and 720 have appropriate DC voltages, and switch control is performed using the voltage at terminal 723. A resistor 725 is an output resistor of the amplitude control circuit,
Output 726 is taken. Here, the transistors 708 and 709 are a clamp circuit that charges and discharges the capacitor 717 so that the emitter of the transistor 701 and the base of the transistor 705 match when the burst game pulse 722 is at a high level. For example, when the pedestal level of the R signal at the emitter of the transistor 701 and the pedestal level of the external R signal are different, a charging current flows through the capacitor 717 when the clamp pulse 722 is at a high level. When the base potential of the transistor 702 and the base potential of the transistor 705 become equal, almost no charging/discharging current flows through the capacitor 717. Problems to be Solved by the Invention In the external RGB signal clamp circuit shown in FIG.
When the RGB signals are synchronized, their pedestals are also synchronized, and the difference in pedestal level between the R signal of the television signal and the R signal of the external RGB signal during the period of the clamp pulse 722 is constant, and the potential Vc of the capacitor is Vc =Signal pedestal level - Signal pedestal level is constant, and in a steady state, almost no current flows through the clamp switches 708, 709, so the current does not disturb the signal or the pedestal portion. In recent years, devices with RGB signal output have been increasing. For example, computers, video games, etc.
These signals are asynchronous with the television receiver signal. While these signals are connected to the external RGB input terminal 725, the television receiver shown in Figure 7 is connected.
In order to pass the RGB signal, the voltage of terminal 723 is changed to terminal 7.
When the voltage is lower than the voltage of 20, transistor 706 is turned on and transistor 707 is turned off. in this case,
Since the signals are not synchronized, the DC voltage of the signal during the clamp pulse period synchronized with the pedestal portion of the signal is constantly changing, so various currents always flow through the clamp switches 708 and 709. FIG. 8 shows a case where the signals are synchronized. Since the DC potential difference between the signals and the signal pedestal period is constant, no current flows through the capacitor 717 in a steady state. FIG. 9 shows an asynchronous case. In this case, the potential difference between the signals during the clamp pulse period takes various values depending on the content of the video portion of the signal. That is, Vc ₁ ≠Vc ₂ ≠Vc ₃ . For this reason, the clamp switch 70 in FIG.
Since various currents flow through the terminals 8 and 709, the pedestal portion of the signal waveform is affected by the clamp current as shown in FIG.
6, the pedestal level is different from the original pedestal level. As shown in FIG. 6, since the second clamp circuit 17 also uses the same clamp pulse as the first clamp pulse, the clamp pulse is disturbed by the first clamp circuit 22. Because it is clamped at the pedestal level, accurate clamping is not possible, and horizontal stripes appear on the screen, making it very difficult to see. Means for Solving the Problems The switching device of the present invention applies a clamp pulse to an external RGB signal clamp circuit to match the pedestal level of the external RGB signal and the RGB signal of the television receiver, and controls the DC level at the final output stage. The two clamp pulses of the clamp circuit used for determination are arranged so that they do not exist simultaneously within the pedestal period of the back porch period of the horizontal synchronizing signal. Effect: In the present invention, an asynchronous external RGB signal is applied to the input terminal, and therefore the television receiver receives an asynchronous external RGB signal.
Even if the pedestal of the RGB signal is disturbed by the clamp pulse, the clamp pulse in the clamp circuit of the final output stage clamps the undisturbed stable pedestal portion, so the black level of the output signal will not fluctuate. . Embodiment An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of the present invention. Components that are the same as those in the conventional example shown in FIG. 6 are designated by the same numbers. The first RGB signal input terminals 1R, 1G, 1B and the second capacitively coupled RGB signal input terminal 2R,
2G and 2B, and the first clamp circuit 22 uses the first clamp pulse 20 to output the first RGB signal.
The pedestal level of the signal and the pedestal level of the second RGB signal are made to match. Thereafter, the first RGB signal or the second RGB signal is switched by the switch means 10R, 10G, 10B. The signal passes through the amplitude control device 14, and the output signal 5R,
The signal is input to a second clamp circuit 17 for determining the black level DC voltage of 5G and 5B. The second clamp circuit 17 operates to match the DC voltage controlled by the DC voltage 18 determined by the resistor 19 with the pedestal levels of the inputs 4R, 4G, and 4B of the clamp circuit 17. The clamp pulse 21 for clamping is generated during the back porch period of the horizontal synchronizing signal, and is generated by the pulse generating circuit 23, and the circuit is such that the first clamp pulse and the second clamp pulse do not exist at the same time. FIG. 2 shows the pulse generating circuit 23. Terminal 201 is a burst gate pulse conventionally used as a clamp pulse. A flyback pulse is also input to the terminal 205. T
A type flip-flop 204 divides the frequency of the flyback pulse 205 to produce a pulse 206 for each horizontal period and a pulse 207 with an opposite phase thereof. 202 and 203 are AND circuits whose outputs 20 and 21 become a first clamp pulse and a second clamp pulse, respectively. FIG. 3 shows a time chart of the pulse generating circuit 23. B is RGB of 1R, 1G, 1B in Figure 1
It's a signal. B is a burst gate pulse obtained by differentiating a horizontal synchronizing signal obtained by synchronously separating a composite video signal, and is used as it is as a clamp pulse in the conventional example. C is a flyback pulse 205. D is the Q output 206 of the T-type flip-flop, which is inverted every horizontal period.
The first clamp pulse 20 is given the AND output of the Q output 206 and the burst gate pulse 201, while the second clamp pulse 21 is given the AND output of the Q output 207 and the burst gate pulse 201.
Output is given. In the circuit shown in FIG. 3, the first clamp pulse and the second clamp pulse are applied alternately every horizontal period, so they do not exist at the same time. (T in FIG. 3 indicates one horizontal period.) FIG. 4 shows a pulse generating circuit in another embodiment. A burst gate pulse is applied to terminal 401. 402 and 410 are inverters; 40
9 is a comparator. 411 is an AND circuit.
Transistor 404 is used during the burst gate pulse period.
OFF, and the (+) of the comparator 409 is set by the time constant determined by the resistor R405 and the capacitor C406.
The voltage at the terminal 414 rises and is compared with the voltage 415 determined by the resistors 407 and 408. When the voltage at the terminal 414>voltage 415, a high level pulse is output to the comparator 409. Pulse 21 is inverted in inverter 410;
Burst gate pulse 401 and AND circuit 411
AND output is taken. FIG. 5 shows a time chart of the pulse generating circuit shown in FIG. 4. A is the RGB signal, B is the burst gate pulse, and E is the (+) input terminal of the comparator 409. The dotted line in E is the comparison voltage 415. D is the clamp pulse 20 of the comparator output. E is a clamp pulse 21. Clamp pulse 20
and clamp pulse 21 are pulses that do not exist at the same time. A clamp pulse 20 is applied to the first clamp circuit, and a clamp pulse 21 is applied to the second clamp circuit. It goes without saying that the effects of the present invention will remain the same even if the manner in which the clamp pulses are applied is reversed. Effects of the Invention As described above, in the switching device of the present invention, even if a device with RGB output, which has become popular in recent years, is connected, the final output stage can accurately clamp the undisturbed pedestal. Never give up. Therefore, it is very advantageous in practice.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a switching device according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a pulse generation circuit of the same embodiment, FIG. 3 is a time chart showing the operation of each part of the same embodiment, and FIG. The figure is a circuit diagram of a pulse generating circuit of another embodiment, FIG. 5 is a time chart showing the operation of each part of the other embodiment, FIG. 6 is a block diagram of the conventional example, and FIG. 7 is a diagram of the first embodiment. Clamp circuit, 8th
The figure is a waveform diagram of the first and second RGB signals when they are synchronized, Figure 9 is a waveform diagram of the first and second RGB signals when they are asynchronous, and Figure 10 is a waveform diagram of the first and second RGB signals when they are asynchronous. FIG. 1R, 1G, 1B...TV receiver
RGB output signal, 8R, 8G, 8B...External RGB
Signal, 10R, 10G, 10B...Switch, 1
1... Demodulator, 17... Clamp circuit, 22...
Clamp circuit, 23...Pulse generation circuit.

Claims (1)

[Claims] 1. A second RGB signal input terminal that is input through capacitive coupling with the first RGB signal input terminal, and has a pedestal level of the second RGB input signal and a pedestal level of the first RGB input signal. a first clamp circuit that matches DC voltages at the pedestal level;
and a switch means for switching a second RGB input signal, and a switch output of the first or second RGB input signal.
A second clamp circuit clamps the signal pedestal level to a predetermined DC voltage for the RGB signal, and a first clamp circuit that clamps the signal pedestal level to a predetermined DC voltage.
2. A switching device characterized in that the clamp pulse applied to the second clamp circuit and the second clamp pulse applied to the second clamp circuit are arranged so as not to overlap within a pedestal period of a back porch of a horizontal synchronizing signal. 2 Give a clamp pulse only to the first clamp circuit during the pedestal period of the back porch of the 2nth horizontal synchronization signal, and give a clamp pulse only to the second clamp circuit during the pedestal period of the back porch of the 2n+1st horizontal synchronization signal. A switching device according to claim 1, characterized in that: 3. The pedestal period of the back porch of the horizontal synchronization signal is divided into two, the first clamp pulse is placed at the rear of the pedestal period, and the second clamp pulse is placed at the front of the pedestal period. The switching device according to scope 1.