JPH0342928A - Encoding device - Google Patents

Abstract

PURPOSE:To improve the efficiency of encoding by determining the number of bits to be encoded adaptively with a maximum value and compressing the encoded signal although the number of encoded bits is determined indiscriminately with the maximum value before. CONSTITUTION:An input signal is divided into four bands by a frequency band divider 1 and stored, band by band, in a storage device 2 for a constant time signal. Then a maximum value detector 3 detects maximum values of the signal, band by band, and a 2nd encoder encodes the signal with six bits, band by band, and outputs the encoded signals. A threshold value determination device 6 determines threshold values, band by band, by using constants of the respective bands stored previously in a constant storage device 5 and the maximum values which are detected, band by band, by the maximum value detector 3. Then the signal stored in the storage device 2 for the constant time is encoded by the 2nd encoder 7 by using the threshold values of said bands and outputted. Namely, the 2nd encoder encodes only parts where the maximum values exceed the threshold values, so the efficiency is higher than before.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an encoding device for compressing and transmitting music and audio signals.

Conventional technology In recent years, encoding devices using signal compression technology have been devised to transmit higher quality audio and images using media with limited transmission channel capacity, such as videophones. There is.

An example of the above-mentioned conventional encoding device will be described below with reference to the drawings.

FIG. 4 shows the configuration of a conventional encoding device. In FIG. 4, 41 is a frequency band divider, 42 is a memory, 43 is a maximum value detector, 44 is a constant memory, and 45 is a first
encoder, 46 is a second encoder, connected as shown.

The operation of the encoding device configured as described above when the number of frequency band divisions is 24 will be described below. First, the input signal is divided into 24 bands by the frequency band divider 41, and the signal for each band is stored in the storage unit 42 for a certain period of time.

Next, the maximum value detector 4 detects the signal stored in the memory 42.
3, the maximum value is detected for each band, and the first encoder encodes it with 6 bits for each band and outputs it. Further, the signal stored for a certain period of time in the storage device 42 is encoded by a second encoder 46 for each band using a predetermined number of bits for each band, which is stored in advance in the constant storage device 44. Output.

Note that if the maximum value does not exceed a predetermined value, the signal stored for a certain period of time is not encoded.

(For example, "Low bit-rate coding of high-quality audio signals"
ighquality audi.

signals An introduction to the
MASCAM 5ystea+) J,
Ebenee Review Technical Number 230
(E B U Review Technical,
No, 230) See, Taiy See, Stru M, Link (G, Theile.

G, 5La11. (Co-authored by M, Link) pp. 71-94) Problems to be Solved by the Invention However, in the above configuration, if the maximum value exceeds a predetermined constant value, the number of bits determined by the constant memory However, even if the maximum value slightly exceeds a certain value, the number of encoding bits is fixed uniformly, resulting in poor compression efficiency.

In view of the above problems, the present invention provides an encoding device that adaptively determines the number of bits to be encoded based on the maximum value and performs compression encoding efficiently.

Means for Solving the Problems In order to solve the above problems, the encoding device of the present invention includes a frequency band divider that divides an input signal into a plurality of bands, a memory that stores the output signal for a certain period of time, a maximum value detector that detects the maximum value of the stored signal; a constant memory that stores a predetermined constant for each band;
Using that constant and maximum value, in the lowest frequency band, divide the maximum value of the own band by the constant determined for the lowest frequency band, and in other frequency bands, divide the maximum value of the frequency band one band lower than each band for each band. a threshold determiner that determines a threshold value for each band by dividing by a predetermined constant; a first encoder that encodes the maximum value and outputs an encoded signal; and a signal that is stored for a certain period of time. and a second encoder that encodes the code using a threshold value and outputs a coded signal.

According to the above-described configuration, the present invention adaptively determines the number of bits to be encoded based on the maximum value and compresses the encoded signal, whereas conventionally the number of encoded bits is uniformly determined based on the maximum value. This will improve encoding efficiency.

Embodiment Hereinafter, an encoding apparatus according to a first embodiment of the present invention will be explained with reference to the drawings.

FIG. 1 shows the configuration of an encoding device in a first embodiment of the present invention. In FIG. 1, l is a frequency band divider, 2 is a memory, 3 is a maximum value detector, 4 is a first encoder, 5 is a constant memory, 6 is a threshold value determiner, and 7 is a maximum value detector. Two encoders are connected as shown.

The operation of the encoding device configured as described above when the number of frequency divisions is 4 will be described below.

First, an input signal is divided into four bands by a frequency band divider 1, and the signal is stored for a certain period of time in a storage device 2 for each band. Next, a maximum value detector 3 detects the maximum value for each band from the signal stored in the memory 2, and a second encoder encodes the signal with 6 bits for each band and outputs it.

Next, the threshold determiner 6 uses the constant for each band prestored in the constant storage 5 and the maximum value detected for each band by the maximum value detector 3. The maximum value is divided by the constant determined for the lowest frequency band, and for other frequency bands, the maximum value of the frequency band one band lower than each band is divided by the constant determined for each band. Determine the threshold value. Next, memory device 2
The signal stored for a certain period of time is encoded by the second encoder 7 using the threshold value for each band determined by the threshold value determiner 6 and output.

In the conventional encoder, when the maximum value exceeds a predetermined constant value, it is encoded with the number of bits determined by the constant storage device, whereas the second encoder of this embodiment encodes with the number of bits determined by the constant memory. By encoding only the portion where the maximum value exceeds the threshold value, it is possible to realize a more efficient encoder than in the past.

As described above, according to the first embodiment, there is a frequency band divider that divides an input signal into multiple bands, a memory that stores the output signal for a certain period of time, and a maximum value of the signal that is stored for a certain period of time. a maximum value detector that stores a predetermined constant for each band, and a constant memory that stores a predetermined constant for each band, and uses the constant and maximum value to determine the maximum value of the own band in the lowest frequency band a threshold determiner that determines a threshold value for each band by dividing the maximum value of a frequency band one band lower than each band by a constant determined for each band; A first encoder that encodes a maximum value and outputs an encoded signal; and a second encoder that encodes a signal stored for a certain period of time using a threshold value and outputs an encoded signal. By adaptively determining the number of encoding bits based on the maximum value, an efficient encoder can be realized.

Note that in this embodiment, the number of band divisions is four, but generally any number of divisions may be used. Further, although the first encoder is 6 bits, generally any number of bits may be used.

An encoding device according to a second embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 shows the configuration of an encoding device in a second embodiment of the present invention. In FIG. 2, 21 is an adder;
22 is a subtracter, 23 is a multiplier for sum signal, 24 is a multiplier for difference signal, 25 is a frequency band divider for sum signal, 26 is a frequency band divider for difference signal, 27 is a memory for sum signal, 28 29 is a maximum value detector for sum signals, 30 is a maximum value detector for difference signals, 31 is a first encoder for sum signals, and 32 is a first encoder for difference signals. , 33 is a constant memory,
34 is a threshold value determiner, 35 is a second encoder for sum signals, and 36 is a second encoder for difference signals, which are connected as shown.

The operation of the encoding apparatus configured as described above will be described below when the number of frequency divisions is 4 and the storage time of both the sum signal memory and the difference signal memory is 10 m5.

Two types of input signals are a left channel signal and a right channel signal of a music signal, where the left channel signal is the left channel signal and the right channel signal is R. Next, the adder 21 adds (L+
R) and (LR) by the subtracter 22, and 1 by the sum signal multiplier 23 and the difference signal multiplier 24, respectively.
/2 times L+R)/2. (L-R)/
It becomes 2.

The sum signal and the difference signal are divided into four bands by the sum signal frequency band divider 25 and the difference signal frequency band divider 26, respectively, and the signal is stored in Ion's for each band. It is stored in the memory 27 and the difference signal memory 28.

Next, the maximum value detector 29 for sum signal and the maximum value detector 30 for difference signal are used for each band to calculate the signal for each band stored in the sum signal storage 27 and difference signal storage 28. The maximum value for the sum signal and the maximum value for the difference signal are detected, and encoded with 6 bits for each band by the second encoder 35 for the sum signal and the second encoder 36 for the difference signal and output. .

Next, the threshold value determiner 34 uses the constant for each band prestored in the constant storage 33 and the maximum value detected for each band by the maximum value detector 29 for sum signal and the maximum value detector 30 for difference signal. For the lowest frequency band, divide the maximum value of the own band by a constant determined for the lowest frequency band, and for other frequency bands, divide the maximum value of the frequency band one band lower than each band, and divide it by the constant determined for the lowest frequency band. Compare the threshold value based on the sum signal and the threshold value based on the difference signal for each band, which are calculated by dividing by a constant, and use the larger value as the sum signal and difference signal for each band, respectively. Let a common threshold be.

Next, the sum signal memory 27 and the difference signal memory 28 are 10
The signals stored for 3-3 days are processed by a second encoder 35 for sum signals and a second encoder 36 for difference signals, using threshold values for each band determined by a threshold determiner 34. Each is encoded and output.

While the conventional encoder independently encodes two types of input, one type each, the second encoder for the sum signal and the second encoder for the difference signal of this embodiment , by determining a threshold value using correlation from two types of inputs and performing encoding, a more efficient encoder than before can be achieved.

As described above, according to the second embodiment, there is an adder that inputs two types of signals simultaneously and creates a sum signal from each input signal, a subtracter that creates a difference signal, and the outputs of the adder and subtracter. a sum signal multiplier and a difference signal multiplier that multiply each by a constant,
A sum signal frequency band divider and a difference signal frequency band divider that divide the outputs of the sum signal multiplier and difference signal multiplier into multiple bands on the frequency axis, respectively, and the sum signal frequency band divider A sum signal memory and a difference signal memory each storing the output signals of the frequency band divider for the difference signal and the frequency band divider for a certain period of time, and detecting the maximum value for the sum signal from the signals stored in the sum signal memory. A maximum value detector for the sum signal, a maximum value detector for the difference signal that detects the maximum value for the difference signal from the signal stored in the memory for the difference signal, and a constant predetermined for each band is stored. Using a constant memory, its determined constant, and the respective outputs of the maximum value detector for the sum signal and the maximum value detector for the difference signal, the maximum value of the self band is determined for the lowest frequency band in the lowest frequency band. For other frequency bands, divide the maximum value of the frequency band one band lower than each band by a constant determined for each band, and calculate the larger value for each band as the sum of each band. a threshold value determiner that uses a common threshold value for the signal and the difference signal; and a first threshold value determiner for the sum signal that encodes the maximum value for the sum signal and outputs the encoded signal.
a first encoder for difference signals that encodes the maximum value for difference signals and outputs an encoded signal, and encodes the signal stored in the sum signal storage using a threshold value. a second encoder for the sum signal which encodes the signal stored in the storage unit for the difference signal using a threshold and outputs the encoded signal; By encoding only the portion where the maximum value exceeds the threshold, it is possible to realize compression encoding that is more efficient than conventional methods, and by using the correlation between inputs, An efficient encoder can be realized.

Note that in this embodiment, the number of band divisions is four, but generally any number of divisions may be used. Further, in this embodiment, the signal for obtaining the maximum value is set to 10-8, but the coding efficiency can be similarly improved without being limited to this.

A coding device according to a third embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 shows the configuration of an encoding device in a third embodiment of the present invention. In FIG. 3, 21 is an adder, 22 is a subtracter, 23 is a multiplier for sum signal, 24 is a multiplier for difference signal, 25 is a frequency band divider for sum signal, and 26 is a frequency band divider for difference signal. , 27 is a memory for sum signals, 28 is a memory for difference signals, 31 is a first encoder for sum signals, 32
is a first encoder for difference signals, 35 is a second encoder for sum signals, 36 is a second encoder for difference signals, 37 is an effective upper digit detector for sum signals, and 38 is a difference signal. Effective upper digit detector for
39 is a constant storage device, and 40 is a threshold value determiner, which are connected as shown in the figure.

The operation of the encoding apparatus configured as described above will be described below when the number of frequency divisions is 4 and the storage time of both the sum signal memory and the difference signal memory is 10 m5.

From the two inputs, an adder 21 and a subtracter 22 calculate a sum signal and a difference signal, and a sum signal memory 27 and a difference signal memory 28
The operation is the same as in the second embodiment until the output of is obtained.

Next, the effective upper digit detector 37 for the sum signal and the effective upper digit detector 38 for the difference signal are connected to the sum signal memory 27,
The maximum value for the sum signal and the maximum value for the sum signal are obtained from the signal between 10a+s stored in the storage unit 28 for the difference signal, the effective upper digit of each maximum value is detected, and the encoder of the sum signal cylinder 2 35 and a second encoder 36 for difference signals, each band is encoded and output. Here, if 16-bit data is used as the input signal, it can be encoded with at most 4 bits.

Next, the threshold determiner 40 uses constants for each band prestored in the constant storage 39, the effective upper digit detector 37 for the sum signal, and the effective upper digit detector 38 for the difference signal for each band. Using the effective upper digits for the sum signal of the maximum value for the sum signal and the effective upper digits for the difference signal of the maximum value for the difference signal detected in The sum signal for each band is obtained by subtracting a fixed constant, and for other frequency bands, subtracting the constant fixed for each band from the effective upper digit of the maximum value of the frequency band one band lower than each band. The threshold value based on the difference signal is compared with the threshold value based on the difference signal, and the larger value is set as the common threshold value for the sum signal and the difference signal for each band. The signals stored in the sum signal storage 27 and the difference signal storage 28 for 1On+s are determined by the sign of the sum signal tube 2 using the threshold value for each band determined by the threshold value determination device 40. Maker 3
5 and a second difference signal encoder 36, the bits are shifted to the right by the threshold value, and then encoded and output.

In the conventional encoder, the second encoder divides the signal stored for a certain period of time and then encodes it. The second encoder uses correlation from two types of inputs to determine a threshold value and performs encoding, thereby making it possible to create a more efficient encoder than before. By performing bit shift using a threshold value and encoding a signal stored for a certain period of time, an encoder with a smaller amount of calculation than conventional ones can be realized.

As described above, according to the third embodiment, there is an adder that inputs two types of signals simultaneously and creates a sum signal from each input signal, a subtracter that creates a difference signal, and the outputs of the adder and subtracter. a sum signal multiplier and a difference signal multiplier that multiply each by a constant,
A sum signal frequency band divider and a difference signal frequency band divider that divide the outputs of the sum signal multiplier and difference signal multiplier into multiple bands on the frequency axis, respectively, and the sum signal frequency band divider and a sum signal memory and a difference signal memory that store the output signals of the frequency band divider for the difference signal for a certain period of time, respectively, and the maximum value for the sum signal obtained from the signals stored in the sum signal memory. An effective upper digit detector for the sum signal detects the effective upper digit, and an effective upper digit detector for the difference signal detects the effective upper digit from the maximum value for the difference signal obtained from the signal stored in the difference signal memory. , using a constant memory that stores predetermined constants for each band, the determined constants, and the respective outputs of the effective upper digit detector for the sum signal and the effective upper digit detector for the difference signal, For frequency bands, subtract the constant determined for the lowest frequency band from the effective upper digit of the maximum value of the own band, and for other frequency bands, subtract 1 from each band.
Subtract a constant determined for each band from the effective upper digit of the maximum value of the lower frequency band, and use the larger value found for each band as the common threshold for the sum signal and difference signal for each band. a threshold value determiner for encoding the effective upper digits for the sum signal and outputting an encoded signal, an encoder for the sum signal cylinder 1 that encodes the effective upper digits for the difference signal and outputting the encoded signal. a first encoder for the difference signal, a second encoder for the sum signal that encodes the signal stored in the sum signal storage using a threshold value and outputs an encoded signal, and a second encoder for the sum signal; a second encoder for difference signals that encodes the signal stored in the storage device using a threshold value and outputs a encoded signal;
By encoding only the portion where the maximum value exceeds the threshold, a more efficient encoder than before can be realized, and
An efficient encoder can be realized by utilizing the correlation between two types of inputs. Further, by bit-shifting the signal stored for a certain period of time using a threshold value and then encoding it using the second encoder, it is possible to realize an encoder with a smaller amount of calculation than the conventional encoder.

Note that in this embodiment, the number of band divisions is four, but generally any number of divisions may be used. Further, in this embodiment, the signal for which the maximum value is determined is 10m5, but the encoding efficiency can be similarly improved without being limited to this.

Effects of the Invention As described above, the encoding device of the present invention includes a frequency band divider that divides an input signal into a plurality of bands, a memory that stores the output signal for a certain period of time, and a maximum value of the signal stored for a certain period of time. a maximum value detector that detects the maximum value, a constant memory that stores a predetermined constant for each band, and a constant memory that stores a predetermined constant for each band. For other frequency bands, the maximum value of the signal in a frequency band one band lower than each band is divided by a constant determined for each band to determine the threshold value for each band. a threshold determiner, a first encoder that encodes a maximum value and outputs an encoded signal, and a second encoder that encodes a signal stored for a certain period of time using a threshold and outputs an encoded signal. Since it is equipped with an encoder of
A conventional efficient encoder can be realized by encoding only the portion where the maximum value exceeds the threshold.

The encoding device of the present invention also includes an adder that inputs two types of signals simultaneously and creates a sum signal from each input signal, a subtracter that creates a difference signal, and the outputs of the adder and subtracter are each multiplied by a constant. A frequency band divider for the sum signal and a frequency band divider for the difference signal that divides the outputs of the sum signal multiplier and the difference signal multiplier into multiple bands on the frequency axis, respectively. A frequency band divider, a sum signal memory and a difference signal memory, each storing the output signals of the sum signal frequency band divider and the difference signal frequency band divider for a certain period of time, and the sum signal memory. A maximum value detector for the sum signal detects the maximum value for the sum signal from the signal stored in the storage device for the difference signal, and a maximum value detector for the difference signal detects the maximum value for the difference signal from the signal stored in the storage device for the difference signal. , using a constant memory that stores constants determined in advance for each band, and the outputs of the constants and the maximum value detector for the sum signal and the maximum value detector for the difference signal, the lowest frequency band is determined. Then, divide the maximum value of the own band by a constant determined for the lowest frequency band, and for other frequency bands, divide the maximum value of the frequency band one band lower than each band by a constant determined for each band, A threshold determiner that uses the larger value obtained for each band as a common threshold for the sum signal and difference signal for each band, and a sum signal that encodes the maximum value for the sum signal and outputs the encoded signal. a first encoder, a first encoder for a difference signal that encodes the maximum value for a difference signal and outputs an encoded signal, and a signal stored in a memory for a sum signal using a threshold value; a second encoder for the sum signal that encodes the signal stored in the storage unit for the difference signal and outputs the encoded signal; and a second encoder for the difference signal that encodes the signal stored in the storage unit for the difference signal using a threshold value and outputs the encoded signal. Since it is equipped with two encoders,
By encoding only the part where the maximum value exceeds the threshold, it is possible to realize compression encoding that is more efficient than before, and it also realizes an efficient encoder by using the correlation between two types of inputs. be able to.

Furthermore, the encoding device of the present invention includes an adder that inputs two types of signals simultaneously and creates a sum signal from each input signal, a subtracter that creates a difference signal, and multiplies the outputs of the adder and subtracter by a constant. A frequency band divider for the sum signal and a frequency band divider for the difference signal that divides the outputs of the sum signal multiplier and the difference signal multiplier into multiple bands on the frequency axis, respectively. A frequency band divider, a sum signal memory and a difference signal memory, each storing the output signals of the sum signal frequency band divider and the difference signal frequency band divider for a certain period of time, and the sum signal memory. A sum signal effective upper digit detector that detects the effective upper digits from the maximum value for the sum signal calculated from the signal stored in the memory, and an effective upper digit detector for the sum signal that detects the effective upper digit from the maximum value for the difference signal calculated from the signal stored in the memory for the difference signal. An effective high-order digit detector for difference signals that detects high-order digits, a constant memory that stores predetermined constants for each band, the determined constants, an effective high-order digit detector for sum signals, and a difference signal. Using the respective outputs of the effective upper digit detectors, in the lowest frequency band, subtract a constant determined for the lowest frequency from the effective upper digit of the maximum value of the own band, and for other frequency bands, subtract one band lower than each band. Subtract a constant determined for each band from the effective upper digit of the maximum value of the frequency band, and use the larger value found for each band as the common threshold for the sum signal and difference signal for each band. a threshold determiner, a first encoder for the sum signal that encodes the effective upper digits for the sum signal and outputs the encoded signal, and a first encoder for the difference signal that encodes the effective upper digits for the difference signal and outputs the encoded signal. A first encoder, a second encoder for sum signal which encodes the signal stored in the memory for sum signal using a threshold value and outputs an encoded signal, and a memory for difference signal. Since it is equipped with a difference signal encoder 2 that encodes the stored signal using a threshold value and outputs an encoded signal, only the part whose maximum value exceeds the threshold value is encoded. By doing so, it is possible to realize a more efficient encoder than in the past, and it is also possible to realize a more efficient encoder by using the correlation between inputs. Also, the second
By performing bit shifting using a threshold value and encoding a signal stored for a certain period of time, it is possible to realize an encoder with a smaller amount of calculation than conventional encoders.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an encoding device in a first embodiment of the present invention, FIG. 2 is a block diagram of an encoding device in a second embodiment of the present invention, and FIG. 3 is a block diagram of a coding device in a third embodiment of the present invention. FIG. 4 is a block diagram of a conventional encoding device. 1.41...Frequency band divider, 2,42...
...Memory device, 3,43... Maximum value detector,
4.45...first encoder, 5...
Constant storage device, 6...Threshold value determination device, 7, 46
... Second encoder, 21 ... Adder, 22 ... Subtractor, 23 ... Multiplier for sum signal, 24 ... ...Difference signal multiplier, 25...
. . . frequency band divider for sum signal, 26 . . . band divider for difference signal, 27 . . . storage unit for sum signal,
28... Memory for difference signal, 29... Maximum value detector for sum signal, 30... Maximum value detector for difference signal, 31... first encoder for sum signal, 3
2...Encoder of difference signal brush 1, 33.39.
44...Constant memory, 34.40...
Threshold detector, 35...Second encoder for sum signal, 36...Brush 2 encoder for difference signal, 37
...Effective upper digit detector for sum signal, 38...
...Effective upper digit detector for difference signal.

Claims (3)

[Claims] (1) A frequency band divider that divides the input signal into multiple bands on the frequency axis, a memory that stores the output signal of the frequency band divider for a certain period of time, and detects the maximum value of the signal stored for the certain period of time. a constant storage device storing a predetermined constant for each band; and determining a threshold value for each band using the predetermined constant and the maximum value. a threshold value determiner, a first encoder that encodes the maximum value and outputs an encoded signal, and encodes the signal stored for a certain period of time using the threshold value and outputs an encoded signal. a second encoder that outputs an output, and the threshold value determiner divides the maximum value of the own band by the constant determined for the lowest frequency band in the lowest frequency band, and divides the maximum value of the own band by the constant determined for the lowest frequency band, and An encoding device characterized in that the maximum value of a frequency band one band lower than the band is divided by the constant determined for each band to obtain a threshold value for each band. (2) an adder that simultaneously inputs two types of signals and creates a sum signal from the two types of input signals, a subtracter that creates a difference signal, and a sum signal multiplier that multiplies the output of the adder by a constant; , a difference signal multiplier that multiplies the output of the subtracter by a constant, a sum signal frequency band divider that divides the output of the sum signal multiplier into a plurality of bands on the frequency axis, and the difference signal multiplier. a frequency band divider for a difference signal that divides the output of the frequency band divider into a plurality of bands on the frequency axis; a memory for a sum signal that stores the output signal of the frequency band divider for a sum signal for a certain period of time; and a frequency band for the difference signal. a difference signal memory that stores the output signal of the divider for a certain period of time; a sum signal maximum value detector that detects the sum signal maximum value from the signal stored in the sum signal memory;
a difference signal maximum value detector that detects a difference signal maximum value from the signal stored in the difference signal storage; a constant storage that stores a predetermined constant for each band;
a threshold determiner that determines the threshold value for each band using the predetermined constant, the maximum value for the sum signal, and the maximum value for the difference signal, and encodes the maximum value for the sum signal,
a first encoder for a sum signal that outputs an encoded signal; a first encoder for a difference signal that encodes the maximum value for the difference signal and outputs the encoded signal; and a memory for the sum signal. A second encoder for sum signal encodes the signal stored in the storage device using the threshold value and outputs a coded signal; a second encoder for a difference signal that encodes using a value and outputs an encoded signal, and the threshold value determiner includes a maximum value detector for the sum signal and a maximum value detector for the difference signal. For each output of the device,
For the lowest frequency band, divide the maximum value of the own band by the constant determined for the lowest frequency band, and for other frequency bands, divide the maximum value of the frequency band one band lower than each band by the constant determined for each band. , and the larger value obtained for each band is used as a common threshold for the sum signal and the difference signal for each band. (3) an adder that simultaneously inputs two types of signals and creates a sum signal from the two types of input signals, a subtracter that creates a difference signal, and a sum signal multiplier that multiplies the output of the adder by a constant; , a difference signal multiplier that multiplies the output of the subtracter by a constant, a sum signal frequency band divider that divides the output of the sum signal multiplier into a plurality of bands on the frequency axis, and the difference signal multiplier. a frequency band divider for a difference signal that divides the output of the frequency band divider into a plurality of bands on the frequency axis; a memory for a sum signal that stores the output signal of the frequency band divider for a sum signal for a certain period of time; and a frequency band for the difference signal. A difference signal memory that stores the output signal of the divider for a certain period of time, and a sum signal maximum value from the signals stored in the sum signal memory, and an effective upper digit of the sum signal maximum value. an effective upper digit detector for the sum signal, which detects the maximum value for the difference signal from the signal stored in the memory for the difference signal, and detects the effective upper digit of the maximum value for the difference signal; using a high-order digit detector, a constant memory storing a predetermined constant for each band, the predetermined constant, the effective high-order digit for the sum signal, and the effective high-order digit for the difference signal. a threshold value determiner for determining the threshold value for each band; a first encoder for the sum signal that encodes the effective upper digits for the sum signal and outputs an encoded signal; and a first encoder for the sum signal; A first encoder for a difference signal encodes the effective upper digits and outputs an encoded signal, and encodes the signal stored in the sum signal memory using the threshold value and outputs an encoded signal. a second encoder for a sum signal that outputs a sum signal, and a second encoder for a difference signal that encodes a signal stored in the difference signal storage using the threshold value and outputs an encoded signal. the effective upper digit detector for the sum signal,
detecting the effective upper digit for the sum signal from the maximum value for the sum signal;
The effective upper digit detector for the difference signal detects the effective upper digit for the difference signal from the maximum value for the difference signal, and the threshold value determiner detects the effective upper digit for the difference signal from the effective upper digit detector for the sum signal. For each output of the effective upper digit detector, in the lowest frequency band, the constant determined for the lowest frequency band is subtracted from the effective upper digit of the own band, and for other frequency bands, the frequency band is one band lower than each band. The constant determined for each band is subtracted from the effective upper digits of Characteristic encoding device.