JPH0342908A - Digital output interface circuit - Google Patents

Abstract

PURPOSE:To enable exact signal transmission by composing the digital output interface circuit of an output transistor(TR), a receiving relay which is connected in series with the TR and receives its output, a capacitor which is provided between the relay and output TR in series, and a resistance which is provided in parallel to the series circuit of the receiving relay and capacitor. CONSTITUTION:When the output TR 2 is turned on with the output of a com puter, a current flows through the receiving relay 3, capacitor 5, and output TR 2 to excite the receiving relay 3 while the capacitor 5 is charged and when the charging of the capacitor 5 is completed, the receiving relay 3 is unexcited. In this case, the output TR 2 is turned on and off at a shorter period than the charging and discharging of the capacitor 5 and then the relay 3 can continu ously be excited. Further, even it a computer main body or computer software is abnormal, the receiving relay 3 is not excited after the charging of the capaci tor 5 is finished to constitute a fail-safe circuit similarly.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a digital output interface circuit of an input/output device of a computer, and in particular, the present invention relates to a digital output interface circuit of a computer input/output device. The present invention relates to a fail-save digital output interface circuit that can reliably bring the device into a non-excited state.

(Prior Art) FIG. 2 is a diagram showing an example of the configuration of a digital output interface circuit of an input/output device of this type of computer. In FIG. 2, the collector side of the output transistor 2 in the input/output device 1 of the computer 1 is connected to one end of the receiving relay 3 outside the input/output device 1, and the emitter side of the output transistor 2 is connected to the input/output device 1. Externally, the output device 1 is connected to the other end of the receiving relay 3 via a constant voltage source 4 which is a DC power source.

In such a digital output interface circuit, when the output transistor 2 is turned on by the output from the computer, the receiving relay 3 . A current flows through the output transistor 2, and the receiving relay 3 is energized. Further, when the output transistor 2 is turned off by the output from the computer, no current flows and the receiving relay 3 is in a non-excited state. Therefore, by turning on and off the output transistor 2, an output signal (hereinafter simply referred to as a signal) from the computer is transmitted.

However, in such a digital output interface circuit, if the output transistor 2 breaks down and becomes abnormal, causing a short circuit, the receiving relay 3
is always in an excited state, making accurate signal transmission impossible. In addition, especially if the receiving relay 3 is energized when it should not be energized, it will malfunction and spread the accident to other systems (for example, in power distribution systems, etc.)
This can lead to power outage accidents due to breaker tripping. Note that such a problem may occur when the output transistor 2
This problem occurs not only when the computer becomes abnormal, but also when the computer itself or the computer software becomes abnormal.

(Problem to be Solved by the Invention) As described above, in the conventional digital output interface circuit, when an abnormality occurs in the output transistor of the input/output device of the computer or in the computer, the receiving relay becomes energized and outputs an accurate signal. There was a problem that communication could not be carried out.

An object of the present invention is to provide a fail-safe digital output that can reliably de-energize the receiving relay and perform accurate signal transmission even in the event of an abnormality in the output transistor of the input/output device of the computer or in the event of an abnormality in the computer. The purpose is to provide an interface circuit.

[Structure of the Invention] (Means for Solving the Problems) In order to remotely achieve the above object, the present invention provides a digital output interface circuit of an input/output device of a computer that is connected to a DC power supply and that uses output from the computer. An output transistor that is turned on and off, a reception relay that is connected in series with the output transistor to receive the output, a capacitor that is connected in series between the output transistor and the reception relay, and a connection between the reception relay and the capacitor. The resistor is configured to include a series circuit and a resistor provided in parallel.

(Function) Therefore, in the digital output interface circuit of the present invention, when the output transistor is turned on by the output from the computer, current flows through the receiving relay capacitor and the output transistor, and the receiving relay is excited while the capacitor is being charged. When charging of the capacitor is completed, the receiving relay becomes de-energized. Next, when the output transistor is turned off by the output from the computer, the charge stored in the capacitor flows through the receiving relay and the resistor, and the receiving relay is energized while the capacitor is discharging, and when the capacitor is finished discharging, the receiving relay is disabled. It becomes an excited state. On the other hand, for example, when the output transistor becomes abnormal and becomes short-circuited, the reception relay becomes de-energized after the capacitor is charged, resulting in a fail-safe circuit. Therefore, when you want to energize the receiving relay, turn the output transistor on and off at a faster cycle than the charging and discharging of the capacitor, and when you want to de-energize the receiving relay, turn off the output transistor. By interfacing, signals can be transmitted accurately.

(Implementation full) Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a configuration example of a digital output interface circuit of a computer input/output device according to the present invention. The same parts as in FIG. Only the different parts will be described.

That is, in the digital output interface circuit of this embodiment, a capacitor 5 is provided in series between the output transistor 2 and the receiving relay 3 in FIG. The configuration includes a resistor 6.

Next, the operation of the digital output interface circuit configured as above will be explained.

First, when the output transistor 2 is turned on by the output from the computer, the receiving relay 3. A current flows through the capacitor 5 and the output transistor 2, and the receiving relay 3 is energized while the capacitor 5 is being charged, and when the capacitor 5 is completely charged, the receiving relay 3 is de-energized. Next, when the output transistor 2 is turned off by the output from the computer, the charge stored in the capacitor 5 is transferred to the receiving relay 3. The current flows through the resistor 6, and the receiving relay 3 is energized while the capacitor 5 is discharging, and when the capacitor 5 is finished discharging, the receiving relay 3 is energized.
becomes a non-excited state.

In this case, by repeatedly turning on and off the output transistor 2 at a faster cycle than the charging and discharging of the capacitor 5, the receiving relay 3 can be continuously excited. Further, unless the output transistor 2 is repeatedly turned on and off, the reception relay 3 is in a non-excited state. Therefore, when it is desired to energize the reception relay 3, the output transistor 2 is repeatedly turned on and off by the output of the computer, and when it is desired to de-energize the reception relay 3, the output transistor 2 is turned off. On the other hand, at this time, even if the output transistor 2 is broken and becomes abnormal and short-circuited, the receiving relay 3 becomes de-energized after charging of the capacitor 5 is completed, and a fail-safe circuit is constructed. Further, even when the computer main body or computer software becomes abnormal, the receiving relay 3 becomes de-energized after charging of the capacitor 5 is completed, and a fail-safe circuit is similarly constructed. This ensures accurate signal transmission.

As described above, the digital output interface circuit of this embodiment includes a receiving relay 3 for receiving an output in series with the output transistor 2 which is turned on and off by the output from the computer, and also connects the output transistor 2 and the receiving relay. A capacitor 5 is provided in series between the receiving relay 3 and the receiving relay 3.
A resistor 6 is provided in parallel to a series circuit of a capacitor 5 and a capacitor 5.

Therefore, the output transistor 2 of the input/output device 1 of the computer
Even when the computer is broken and becomes abnormal, or when the computer itself or computer software becomes abnormal,
The reception relay 3 can be reliably brought into a non-excited state, and accurate signal transmission can be performed, resulting in a fail-safe digital output interface circuit.

In the above embodiment, by making the reception relay 3 on-delay, it is possible to construct a more reliable fail-safe circuit.

In addition, receiving relay 3. Capacitor 5. The resistor 6 may be housed in the input/output device 1 of the computer to provide a fail-safe input/output device.

[Effects of the Invention] As explained above, according to the present invention, even when there is an abnormality in the output transistor of the input/output device of the computer or when the computer is abnormal, the receiving relay can be reliably de-energized to ensure accurate signal transmission. A fail-saving and extremely reliable digital output interface circuit that can perform

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a digital output interface circuit according to the present invention, and FIG. 2 is a block diagram showing an example of a conventional digital output interface circuit. 1... Input/output device, 2... Output transistor, 3
...Receiving relay 4... Constant voltage source, 5... Capacitor, 6... Resistor.

Claims (1)

[Scope of Claims] A digital output interface circuit for an input/output device of a computer, comprising: an output transistor connected to a DC power supply and turned on and off by an output from the computer; and an output transistor provided in series with the output transistor. A receiving relay that receives the output; a capacitor provided in series between the output transistor and the receiving relay; and a resistor provided in parallel to a series circuit of the receiving relay and the capacitor. A digital output interface circuit featuring: