JPH034278U - - Google Patents
Info
- Publication number
- JPH034278U JPH034278U JP8078689U JP8078689U JPH034278U JP H034278 U JPH034278 U JP H034278U JP 8078689 U JP8078689 U JP 8078689U JP 8078689 U JP8078689 U JP 8078689U JP H034278 U JPH034278 U JP H034278U
- Authority
- JP
- Japan
- Prior art keywords
- measuring device
- ecl
- bias voltage
- under test
- circuit under
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 9
Landscapes
- Tests Of Electronic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8078689U JPH034278U (en:Method) | 1989-02-10 | 1989-07-11 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1475189 | 1989-02-10 | ||
JP8078689U JPH034278U (en:Method) | 1989-02-10 | 1989-07-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH034278U true JPH034278U (en:Method) | 1991-01-17 |
Family
ID=31717298
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8078689U Pending JPH034278U (en:Method) | 1989-02-10 | 1989-07-11 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH034278U (en:Method) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55121157A (en) * | 1979-03-13 | 1980-09-18 | Fujitsu Ltd | Print board test unit having universal external terminal resistance |
-
1989
- 1989-07-11 JP JP8078689U patent/JPH034278U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55121157A (en) * | 1979-03-13 | 1980-09-18 | Fujitsu Ltd | Print board test unit having universal external terminal resistance |