JPH0342726B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an AC amplification circuit using an operational amplifier that can obtain a low DC offset voltage.

(Prior Art) A conventional AC amplifier circuit of this type is shown in FIG. 1st
In the figure, 1 is a signal input terminal connected to the non-inverting input terminal of the operational amplifier OP via a capacitor C ₁₁ , the non-inverting input terminal is connected to signal ground via a resistor R ₁₁ , and 2 is a signal output terminal. operational amplifier
is connected to the output terminal of OP and to the inverting input terminal of operational amplifier OP via resistor _R12 ,
The inverting input terminal is also connected to signal ground via resistor _R13 .

For an AC amplifier circuit configured in this way, normally an AC voltage signal on which a DC voltage is superimposed is applied to the signal input terminal 1, and the DC voltage component at the signal input terminal 1 is blocked by the capacitor _C11 .
Since the signal ground potential is applied to the non-inverting input terminal of the operational amplifier OP as a new DC voltage through the resistor _R11 , the AC voltage component of the voltage signal component at the signal input terminal 1 is only reaches the non-inverting input terminal of the operational amplifier OP. As a result, the negative feedback amplifier circuit composed of the operational amplifier OP and resistors _R12 and _R13 has
If the open circuit voltage gain of OP is extremely large, resistor R ₁₂
It operates as an AC amplifier circuit with a voltage gain determined by the ratio of R13 and _R13 .

However, when this AC amplifier circuit is used in a relatively low frequency region such as the audio band, unless the CR product determined by the capacitor _C11 and the resistor _R11 is increased, a frequency characteristic will occur in the amplification degree. It is extremely difficult to implement a capacitor and a resistor with a CR product in an integrated circuit to obtain characteristics with negligible frequency characteristics in terms of their dimensions and stability of element values.

In addition, an input DC offset voltage exists in the actual operational amplifier OP, and as a result, the DC voltage at the output terminal 2 is reduced by the input DC offset voltage due to the negative feedback effect constituted by resistors _R12 and _R13 . The value is multiplied by the amplification factor and shifted from the signal ground potential.

In general, the power supply voltage of the operational amplifier OP is equal to two positive and negative voltages with respect to the signal ground potential.
When the DC voltage at output terminal 2 shifts from the potential of the signal ground, which is given by the power supply, when processing only AC voltage signals as information, the AC signal is extracted from output terminal 2 via a DC blocking circuit. I have to. In addition, when the AC signal at output terminal 2 has a relatively large voltage amplitude, the half-cycle waveform in the direction in which the DC voltage at output terminal 2 is shifted is compared to the remaining half-cycle waveform when viewed from the potential of the signal ground. When the circuit becomes susceptible to distortion and has a larger voltage amplitude and operates as a so-called limiter amplifier circuit, the duty ratio of the AC voltage signal at output terminal 2 deviates from 50%, which may make it unusable depending on the processing method. There were some shortcomings.

OBJECTS OF THE INVENTION The object of the present invention is to provide an AC amplifier circuit in an integrated circuit having a low output DC offset voltage, which eliminates these conventional drawbacks. The present invention will be explained in detail below using one example.

(Structure of the Invention) FIG. 2 is a circuit diagram showing an embodiment of the AC amplifier circuit of the present invention. In the figure, 1 is a signal input terminal, which is connected to one terminal of a capacitor _C3 , and the other terminal is connected to a non-inverting input terminal of an operational amplifier _OP1 , and a switch _S5 whose opening/closing is controlled by a clock _φ2. One terminal of switch S 6 is connected to one terminal of switch S 6 whose opening/closing is controlled by clock ₂ which has a phase inversion relationship with clock φ ₂ , and the other terminal of switch S ₅ is connected to one terminal of switch S ₆ whose opening/closing is controlled by clock ₂ . One terminal of switch _{S 7} is connected to one terminal of capacitor C ₄ , and the other terminal of switch S ₆ is connected _to one terminal of switch S ₈ whose opening/closing is controlled by clock ₂ and one terminal of capacitor C ₅ . , S ₈ and capacitor
All other terminals of C ₄ and C ₅ are connected to signal ground.

The output terminal of the operational amplifier OP ₁ is the signal output terminal 2 of this circuit, and is connected to the inverting input terminal of the operational amplifier OP ₁ via the resistor R ₁ , and is connected to the switch S ₁ whose opening/closing is controlled by the clock φ ₁ . One terminal of switch _S2 whose opening/closing is controlled by clock ₁ , which has a phase inversion relationship with clock _φ1 , and capacitor _C1
The other terminal of capacitor C ₁ is connected to one terminal of switch S ₃ whose opening/closing is controlled by clock φ ₁ ,
It is connected to one terminal of switch S ₄ whose opening/closing is controlled by clock φ ₁ , and the other terminal of switch S ₄ is connected to one terminal of capacitor C ₂ and the non-inverting input terminal of operational amplifier OP _{2 .} , S ₃ and capacitor
All other terminals of C ₂ are connected to signal ground.

The inverting input terminal of the operational amplifier OP ₂ is connected to the output terminal and via the resistor R ₂ to the inverting input terminal of the operational amplifier OP ₁ .

Next, the operation of this circuit will be explained.

The DC signal component of the input signal from the signal input terminal 1 in the input circuit is blocked by the capacitor _C3 , and is further composed of switches _S5 , _S6 , _S7 , _S8 , and capacitors _C4 and _C5. The switched capacitor makes the DC potential at the non-inverting input terminal of operational amplifier OP ₁ equal to the potential of signal ground. In addition, the equivalent resistance value of the switch capacitor is
If the capacitance values of capacitors C ₄ and C ₅ are equal to C ₄ (farad) and the period of clocks φ ₂ and ₂ is T ₁ (seconds), approximately (T ₁ /2C ₄ ) ohm is obtained, and capacitor C ₃ If the capacitance value of is C ₃ (farad), the voltage transfer frequency characteristic from signal input terminal 1 to the non-inverting input terminal of operational amplifier OP ₁ becomes a first-order high-pass function, and its 3 dB down frequency is approximately ( C ₄ /C ₃ )·(πT ₁ ) ^-1 Hertz, and if this frequency is kept sufficiently lower than the lower limit of the signal frequency band used, no signal level loss will occur.

Next, in order to amplify the AC voltage signal obtained in this way with the AC amplifier circuit of the present invention and obtain a signal with a small DC offset voltage as an output signal, a circuit configuration in which full voltage feedback is applied to the DC current is used. good.

That is, switches S ₁ , S ₂ , S ₃ , S ₄ , capacitors
The switch capacitor composed of C ₁ is approximately (T ₂ /C ₁ ) if the capacitance value of capacitor C ₁ is C ₁ (farad) and _the period of clock φ _1,1 is T ₂ (seconds). The equivalent resistance has a value of ohm, and if the capacitance value of capacitor C ₂ is C ₂ (farad), then
The voltage transfer frequency characteristic from the signal output terminal 2 to the non-inverting input terminal of the operational amplifier OP ₂ is a first-order low-pass function, and its 3 dB down frequency is approximately (C ₁ /C ₂ )・(2πT ₂ ) ^{- 1} hertz, and if this frequency is set sufficiently lower than the lower limit of the signal frequency band used, the AC voltage component of the signal at signal output terminal 2 will be attenuated, and the output terminal of operational amplifier OP ₂ will be On the other hand, the DC voltage component will appear as is.

As a result, the output signal component of operational amplifier OP ₂ is
There is only a DC voltage equal to the DC voltage of signal output terminal 2, and the resistance values of resistors R ₁ and R ₂ are respectively R ₁ and R ₂
(ohm), and then set the value of (1+R ₁ /R ₂ ) to K
Then, the voltage transfer characteristic from signal input terminal 1 to signal output terminal 2 is approximately K in the frequency band used.
It becomes an AC amplifier circuit with twice the voltage gain.

In addition, the input-referred DC offset voltage of operational amplifier OP in Fig. 1 is V _ps1 (volt), and the input-referred offset voltage of operational amplifiers OP ₁ and OP ₂ in Fig. 2 are V _ps2 (volt) and V _ps2 (volt), respectively. Further, assuming that the AC amplifier circuits in Figures 1 and 2 are designed to have an equal voltage gain of K times, in the case of Figure 1, the DC offset of K·V _ps1 (volts) at output terminal 2 is However, in the case of Figure 2, at output terminal 2, {V _ps2 -K/(1+K)×V _ps3 } (volts), and if K becomes very large compared to 1, the two operational amplifiers OP ₁ , _OP2 is approximated as the difference between the input-referred offset voltages of OP2, that is, (V _ps2 - V _ps3 ) (volts).

Therefore, the input equivalent offset voltage of an operational amplifier in an integrated circuit is normally about 10 millivolts, and in the circuit configuration shown in Figure 1, it reaches as much as 1 volt when the voltage gain is multiplied by 100. With the circuit configuration shown in the figure, even the worst value is only approximately twice the input equivalent offset voltage.

In this way, the high-pass function circuit in the audio frequency band, that is, the DC blocking circuit, and the low-pass function circuit, that is, the AC blocking circuit, are realized using switched capacitors, and there is no need to use a large capacitor or a large resistor. It has the advantage that it can be realized with high precision and easily manufactured in an integrated circuit.

In addition, in this embodiment, when the voltage gain is made very large compared to 1, the output DC offset voltage is the difference between the input-referred offset voltages of the two operational amplifiers used, but if the operational amplifier is configured with an integrated circuit, Since the values are likely to match, that is, the polarity and absolute value of the input equivalent offset voltage are likely to be the same, there is an advantage that the output DC offset voltage is small.

Note that a high-pass function circuit, that is, a DC blocking circuit may be provided separately if necessary. Also Switch S ₅ ,
DC blocking is possible with only one of _S7 and capacitor _C4 or switches _S6 , _S8 and capacitor _C5 , and to simplify the circuit configuration, clocks _φ1 and _φ2 and ₁ and ₂ are made the same. Alternatively, it is also possible to use the same clock for clocks _φ1 and ₂ and _{clocks φ1} and _φ2 .

(Effects of the Invention) As explained in detail above, the present invention has the advantage that an AC amplification circuit in the audio frequency band can be configured in an integrated circuit without using external components because all the circuit elements used can be realized in an integrated circuit. There is.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional AC amplifier circuit, and FIG. 2 is a circuit diagram showing an embodiment of the AC amplifier circuit of the present invention. 1...Signal input terminal, 2...Signal output terminal,
OP ₁ , OP ₂ ... operational amplifier, C ₁ , C ₂ , C ₃ , C ₄ , C ₅
... Capacitor, R ₁ , R ₂ ... Resistor, S ₁ , S ₂ , S ₃ ,
S ₄ , S ₅ , S ₆ , S ₇ , S ₈ ... switch.

Claims (1)

[Claims] 1. A non-inverting input terminal of a first operational amplifier is used as a signal input, an output of this operational amplifier is connected to an inverting input terminal of the operational amplifier via a first resistor, and One terminal of the second switch was connected to signal ground through the switch, and the other terminal of the first capacitor was connected to one terminal of the first capacitor, and one terminal of the other terminal of the first capacitor was connected to signal ground. The other terminal of the third switch is connected to one terminal of the fourth switch, and the other terminal of the fourth switch is connected to the other terminal of the second capacitor, one terminal of which is connected to signal ground, and the second operational amplifier. the output of the operational amplifier is connected to the inverting input terminal of the operational amplifier and connected to the inverting input terminal of the first operational amplifier via a second resistor; A fourth switch opens and closes according to the first clock;
the second and third switches open and close according to a second clock that is in a phase-inverted relationship with the first clock;
An AC amplifier circuit that uses the output terminal of the first operational amplifier as a signal output. 2. The non-inverting input terminal of the first operational amplifier is used as a signal input, and the output of this operational amplifier is connected to the inverting input terminal of the operational amplifier via the first resistor, and The other terminal of the second switch whose terminal is connected to signal ground is connected to one terminal of the first capacitor, and the other terminal of the first capacitor is connected to the other terminal of a third switch whose one terminal is connected to signal ground. terminal is connected to one terminal of a fourth switch, and the other terminal of the fourth switch is connected to the other terminal of a second capacitor, one terminal of which is connected to signal ground, and to the non-inverting input terminal of a second operational amplifier. The output of this operational amplifier is connected to the inverting input terminal of the operational amplifier and the inverting input terminal of the first operational amplifier via a second resistor, and the first and fourth switches are connected to the inverting input terminal of the first operational amplifier. Open and close according to the first clock,
the second and third switches open and close according to a second clock that is in a phase-inverted relationship with the first clock;
A third capacitor in which one terminal is a signal input and the other terminal is connected to the signal input of the non-inverting input terminal of the first operational amplifier in an AC amplifier circuit in which the output terminal of the first operational amplifier is used as a signal output; , the other terminal of the third capacitor is connected to one terminal of the fifth switch, the other terminal of the fifth switch is connected to the signal ground via the seventh switch, and the signal is connected via the fourth capacitor. An alternating current amplifier circuit comprising at least one switch and a capacitor connected to ground, the fifth switch and the seventh switch opening and closing according to a clock whose phase is inverted to each other. 3. The AC amplifier circuit according to claim 2, comprising two of said switches and two capacitors, and said fifth switch and said capacitors open and close in accordance with a clock whose phase is inverted with respect to each other.