JPH0341948U - - Google Patents

Info

Publication number
JPH0341948U
JPH0341948U JP1989102181U JP10218189U JPH0341948U JP H0341948 U JPH0341948 U JP H0341948U JP 1989102181 U JP1989102181 U JP 1989102181U JP 10218189 U JP10218189 U JP 10218189U JP H0341948 U JPH0341948 U JP H0341948U
Authority
JP
Japan
Prior art keywords
semiconductor element
lead frame
semiconductor
utility
registration request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989102181U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989102181U priority Critical patent/JPH0341948U/ja
Publication of JPH0341948U publication Critical patent/JPH0341948U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H10W72/07554—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP1989102181U 1989-08-31 1989-08-31 Pending JPH0341948U (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989102181U JPH0341948U (en:Method) 1989-08-31 1989-08-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989102181U JPH0341948U (en:Method) 1989-08-31 1989-08-31

Publications (1)

Publication Number Publication Date
JPH0341948U true JPH0341948U (en:Method) 1991-04-22

Family

ID=31651092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989102181U Pending JPH0341948U (en:Method) 1989-08-31 1989-08-31

Country Status (1)

Country Link
JP (1) JPH0341948U (en:Method)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5867057A (ja) * 1981-10-16 1983-04-21 Nec Corp 半導体装置
JPS6290937A (ja) * 1985-10-17 1987-04-25 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS6290957A (ja) * 1985-10-17 1987-04-25 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH0252455B2 (en:Method) * 1986-02-03 1990-11-13 Nippon Electric Co

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5867057A (ja) * 1981-10-16 1983-04-21 Nec Corp 半導体装置
JPS6290937A (ja) * 1985-10-17 1987-04-25 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS6290957A (ja) * 1985-10-17 1987-04-25 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH0252455B2 (en:Method) * 1986-02-03 1990-11-13 Nippon Electric Co

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