JPH0340534B2 - - Google Patents

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a variable delay time equalizer used in a satellite equalizer, etc., which requires a wide variable range of group delay time characteristics. It is.

(Prior Art) Various variable delay time equalizers have been considered so far.

FIG. 3 shows an example of a conventionally used variable delay time equalizer. A delay is caused in a series resonant circuit consisting of a variable coil 24 and a variable capacitor 25. The Q of the resonance curve of the group delay time characteristic can be varied by the variable coil 24, and its center frequency can be varied mainly by the variable capacitor 25.

(Problem to be Solved by the Invention) In a variable delay time equalizer, when a large amount of group delay time equalization is required, it is difficult to flatten it using methods such as amplitude frequency characteristics. This is the biggest problem. In the circuit example of FIG. 3 as well, when the Q of the series resonant circuit is not large, it is possible to adjust the amplitude frequency characteristic to be flat using the variable resistor 22, but when trying to obtain a large group delay time equalization amount, If Q is increased, unless the isolation between the outputs of the power splitter 21 is particularly good, it will have an adverse effect on the amplitude frequency characteristics, and there is a drawback that the amplitude frequency characteristics cannot be flattened.

(Means for Solving the Problems) In consideration of the problems of the conventional variable delay time equalizer, the present invention provides a method for adjusting the variable range of the group delay time equalization amount without adversely affecting the amplitude frequency characteristics. It is an attempt to provide a wide variable delay time equalizer.

The present invention has the following configuration to achieve the above object.

That is, a power splitter that branches an input signal into two, a variable attenuator, a high isolation amplifier, a parallel resonant circuit with one end grounded consisting of a variable inductance and a capacitor, a variable resistor, a low input impedance amplifier, and a first signal path in which variable amplitude equalizers are cascaded; a second signal path including an amplitude equalizer having an amplitude frequency characteristic opposite to that of the variable amplitude equalizer; and two inputs. a power combiner for combining signals; the first signal path is connected between one output end of the power splitter and one input end of the power combiner; The second signal path is connected between the other output terminal and the other input terminal of the power combiner.

(Example) Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. 1 is the input terminal, 7 is the output terminal, 2
is a power splitter, 6 is a power combiner, 16 and 9 are variable attenuators, 4 is an attenuator, 15 is a high isolation amplifier, 11 is a low input impedance amplifier, 1
4 is a variable coil, 3 and 10 are coils, 5, 8 and 1
3 is a capacitor, and 12 is a variable resistor.

Figure 2 shows the vector locus of the transfer function, with 1
9 is the vector locus of the transfer function of the second signal path from input terminal 1 to output terminal 7 via point A in FIG. 18 is the vector locus of the transfer function of the entire circuit from the input terminal 1 to the output terminal 7. The case where the frequency is changed from 0 to twice the resonant frequency of the parallel resonant circuit consisting of the variable coil 14 and the capacitor 13 at regular intervals is shown.

The signal path is branched into two paths by the power splitter 2, and one of the signal paths (the first signal path) is provided with a group delay characteristic that forms a resonance curve. , a resonant circuit consisting of a variable coil 14 and a capacitor 13, and a variable amplitude equalizer having a first-order slope amplitude frequency characteristic.

In FIG. 1, capacitor 8, variable attenuator 9, and coil 10 constitute a variable amplitude equalizer. The other signal path (second signal path) includes an amplitude equalizer that includes a coil 3, an attenuator 4, and a capacitor 5 and has an amplitude frequency characteristic opposite to that of the variable amplitude equalizer in the first signal path. A container is provided. The vector locus of the transfer function from the input end 1 to the output end 7 when the respective output ends of the first signal path and the second signal path are connected to the two input ends of the power combiner 6 is shown below. The result will be a locus 18 in FIG.

A locus 18 indicates that an output signal having a constant amplitude and a group delay time characteristic forming a resonance curve is obtained at the output end 7.

The center frequency of the group delay time characteristic is determined by the variable coil 14.
The Q can be adjusted by changing the inductance of the variable resistor 12 provided between the parallel resonant circuit consisting of the variable coil 14 and the capacitor 13 and the low input impedance amplifier 11.
can be adjusted arbitrarily by changing the degree of coupling between the parallel resonant circuit and the low input impedance amplifier. By adjusting the group delay time characteristic, the amplitude-frequency characteristic has a large undulation, but by changing the amplitude and phase of the locus 17 in Fig. 2, the amplitude of the locus 18 when combined with the locus 19 changes relative to the frequency. It can be corrected to a constant or linear slope, and in the case of a linear slope, it is easy to equalize the characteristic deterioration.

In the embodiment of FIG. 1, a variable attenuator 16;
A variable amplitude equalizer composed of a coil 10, a capacitor 8, and a variable attenuator 9 is used to adjust the amplitude and phase of the transfer function represented by the locus 17.
Since the variable attenuator and the variable amplitude equalizer are made equal to the characteristic impedance of the signal path, it is possible to adjust the amplitude frequency characteristic without being affected by impedance mismatch. Further, since the adjustment of the amplitude frequency characteristic does not affect the group delay time characteristic, it is easy to adjust the equalization amount.

This variable delay time equalizer utilizes the fact that the amplitude frequency characteristics become constant when two waves are combined using a power splitter, as shown in Figure 2, so the circuit example shown in Figure 3 is used. A particularly good isolation amount of the power splitter is not required as in the above example.
Furthermore, since the Q of the group delay time characteristic is varied by changing the degree of coupling between the resonant circuit and the next stage with low input impedance using a variable resistor, it does not affect the resonant frequency of the resonant circuit in any way.

(Effects of the Invention) As explained above, the present invention provides a power splitter that branches a high-frequency signal transmission line into two paths, and a CL parallel resonant circuit and a variable amplitude equalizer on one of the branched transmission lines. , by providing an amplitude equalizer opposite to the variable amplitude equalizer on the other path and using a power splitter to combine the two transmission lines, excessive isolation between the outputs of the power splitter is required. It has the advantage of being able to obtain a group delay time characteristic with a flat amplitude frequency characteristic and a resonance curve with a large Q. Furthermore, the center frequency of the group delay time characteristic is controlled by a variable coil, and the Q is controlled by a parallel LC. By using a variable resistor sandwiched between the resonant circuit and the low input impedance amplifier, each can be easily adjusted by changing the degree of coupling between the LC parallel resonant circuit and the low input impedance amplifier. By using a variable attenuator and variable amplitude equalizer that are made equal to the characteristic impedance of the transmission line, the amplitude-frequency characteristics can be compensated for without affecting the impedance mismatch and without changing the group delay time characteristics. , it has the advantage that desired equalization characteristics can be easily obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of an embodiment of the variable delay time equalizer of the present invention, and FIG. 2 is a vector locus of the transfer function of the circuit in FIG. FIG. 3, which is a plot diagram when the frequency is changed at constant frequency intervals up to twice the frequency, is a diagram showing an example of the configuration of a conventional variable delay time equalizer. 1, 20...Input terminal, 6...Power combiner,
7, 23... Output terminal, 2, 21... Power brancher, 16, 9... Variable attenuator, 4... Attenuator, 1
5... High isolation amplifier, 11... Low input impedance amplifier, 14, 24... Variable coil, 3, 10... Coil, 25... Variable capacitor, 5, 8, 13... Capacitor, 12, 22
...Variable resistor, 19...Vector locus of transfer function between input terminal 1 and output terminal 7 via point A in Fig. 1, 17...Input terminal 1 and output terminal 7 via point B in Fig. 1 Vector locus of transfer function between, 18...
A vector locus of the overall transfer function between input terminal 1 and output terminal 7 in FIG.

Claims (1)

[Claims] 1. A power splitter that branches the input signal into two, a parallel resonant circuit with one end grounded consisting of a variable attenuator, a high isolation amplifier, a variable inductance and a capacitor in sequence from the input side, a variable resistor, a low input impedance amplifier, and a variable a first signal path in which variable-type amplitude equalizers are connected in cascade; a second signal path including an amplitude equalizer having an amplitude-frequency characteristic opposite to that of the variable-type amplitude equalizer; and two input signals. the first signal path is connected between one output end of the power splitter and one input end of the power combiner; A variable delay time equalizer, characterized in that the second signal path is connected between the output terminal of the power combiner and the other input terminal of the power combiner.