JPH0339738Y2 - - Google Patents

Description

[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to a duty ratio discrimination circuit that sends out a discrimination signal when the width of a pulse input at a constant period changes and becomes larger than a predetermined width.

[Prior art and its problems]

For a rectangular wave whose peak value is always the same and a constant period pulse, the greater the width, the greater the integral value.By comparing these integral values, the duty ratio can be determined, and if this duty ratio is a predetermined value The purpose can be achieved by sending out a discrimination signal when the limit is exceeded. An example of such a conventional duty ratio discrimination circuit is shown in FIG. In FIG. 3, the duty ratio discrimination circuit includes an integrating circuit 1 and a comparing circuit 2. A pulse signal inputted from a pulse input circuit 3 is integrated by the integrating circuit 1, compared by the comparing circuit 2, and the result is Then, a discrimination signal V ₀ is sent out from the output terminal 4. In the pulse input circuit 3, the output of the pulse generator 5 is connected to a light emitting diode 6a of a photocoupler 6. The phototransistor 6b of the photocoupler 6 is connected to the voltage E via the current limiting resistor 7.
is connected to a DC power supply 8. The integrating circuit 1 is a series circuit of a resistor 9 and a capacitor 10, and is connected to both ends of the phototransistor 6b. The comparison circuit 2 mainly includes a comparator 11, and the voltage E of the power supply 8 is connected to the negative input terminal of the comparator 11 through two voltage dividing resistors 12 and 13.
A predetermined voltage _{V a} divided by is applied, and the connection point between the resistor 9 and the capacitor 10 of the integrating circuit 1 is connected to the positive input terminal via the input resistor 14 . 1
5 is a feedback resistor connected between the output terminal and the positive input terminal of the comparator 11;
The output terminal 1 is the output terminal 4 of this determination circuit.

When the high level time of the pulse width of the input pulse signal Es is 50% of the time of one cycle (duty ratio is 0.5), the waveform of the voltage V _i appearing at the collector of the phototransistor 6b is as shown in FIG. 4A. The duty ratio is 0.5 with the power supply voltage E being the maximum value.
The average voltage V _c charged (integrated) in the capacitor 10 by this rectangular wave is the height shown by the broken line. Since this voltage V _c is lower than the predetermined voltage V _a shown by the dashed line that is applied to the negative input terminal of the comparator 11, the signal voltage at the output terminal of the comparator 11 is zero. Here, if the high level time of the pulse width of the pulse signal E _s is 20% of the time of one cycle (duty ratio is 0.2), the waveform of the voltage V _i appearing at the collector of the phototransistor 6b is as shown in FIG. 4B. As shown, the pulse width is 80% of one cycle time (duty ratio 0.8)
This is a rectangular wave, and the average voltage V _c charged in the capacitor 10 by this rectangular wave exceeds the predetermined voltage V _a as shown by the broken line. Therefore, comparator 1
A discrimination signal V ₀ is sent to the output terminal of 1. That is, when the duty ratio of the pulse signal E _s falls below a predetermined value, the determination signal V ₀ is sent to the output terminal 4 of the determination circuit.

By the way, with the above settings, when the signal E _s with a duty ratio of 0.5 is input to the photocoupler 6, naturally no discrimination signal is sent to the output terminal 4. However, if the pulse signal E _s at time t ₁ as shown in FIG.
When the generation of the phototransistor 6b stops, the phototransistor 6b becomes non-conductive. Therefore, the capacitor 10 is charged with the power supply voltage E, and each voltage becomes V _i =V _c =E, so this voltage V _c exceeds the predetermined voltage E _a of the comparator 11, and the output terminal of the comparator 11, That is, the discrimination signal V ₀ is sent to the output terminal 4 of the discrimination circuit. This is clearly a malfunction of this duty ratio discrimination circuit. In other words, in this duty ratio discrimination circuit, when the signal generated by the pulse generator stops for some reason or the input circuit is disconnected, the comparator circuit outputs a discrimination signal indicating that the duty ratio has exceeded a predetermined value. For example, when operating a memory circuit such as a flip-flop, the memory circuit must be reset every time the pulse generator stops.

[Purpose of invention]

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a duty ratio determination circuit that does not malfunction even when no pulse signal is input.

[Key points of the idea]

The present invention is provided with an integrating circuit and a comparator circuit consisting of a resistor and a capacitor, and a periodically input pulse signal is integrated by the integrator circuit, and this integrated value is compared by the comparator circuit, and this integrated value is compared with a reference value. In the duty ratio discrimination circuit which sends out a discrimination signal when the duty ratio is exceeded, a signal detection circuit is provided to detect the presence or absence of the pulse signal, and the output of this signal detection circuit is connected between the resistor and the capacitor of the integrating circuit, and the duty ratio is detected by When the circuit detects the absence of the pulse signal, the signal detection circuit short-circuits the capacitor of the integration circuit.

[Example of idea]

An embodiment of the present invention will be described in detail based on FIG. Note that parts and circuits having the same functions as those shown in FIG. 3 are given the same reference numerals to avoid duplication of explanation. In Figure 1,
Integrating circuit 1, comparator circuit 2, and pulse input circuit 3 are completely the same as the conventional ones, so their explanation will be omitted. This circuit differs from conventional ones in that a signal detection circuit 16 is connected between the pulse input circuit 3 and the integration circuit 1.
is provided. This signal detection circuit 16 has a series circuit of a resistor 17 and a capacitor 18 connected to a power supply 8.
A series circuit of a diode 19 and a resistor 20 is connected between the connection point of the pulse input circuit and the output end of the pulse input circuit, in other words, the collector of the phototransistor 6b. Further, a series circuit of two resistors 21 and 22 and a Zener diode 23 is connected in parallel with the capacitor 18. The collector of the transistor 24 is connected to the connection point between the capacitor 10 and the resistor 9, and the emitter is connected to the connection point between the resistor 22 and the Zener diode 23. Also, the base has two resistors 2
It is connected to connection points 1 and 22. The capacitor 18 is always charged with the power supply voltage E via the resistor 17, but when the phototransistor 6b is turned on by the input of the pulse signal _Es , current flows to the phototransistor 6b via the diode 19 and the resistor 20. The voltage will drop. When a pulse signal is input to the photocoupler 6 and the phototransistor 6b is turned on or off, the charging voltage of the capacitor 18
V _b is set using two resistors 17 and 20 and a capacitor 1 so as not to exceed the zener voltage of the zener diode 23.
8 constants are set. Further, the Zener voltage _Vz of the Zener diode 23 is set lower than the predetermined voltage Va of the comparator 11.

When a pulse signal E _s with a duty ratio of 0.5 is input to the photocoupler 6, the waveform of the voltage V _i appearing at the collector of the phototransistor 6b is a rectangular wave with a duty ratio of 0.5 with the maximum value at the power supply voltage E, as shown in FIG. 2A. It is. At this time, since the charging voltage V _b of the capacitor 18 does not exceed the Zener voltage V _z of the Zener diode 23, the Zener diode 23 is not conductive and the transistor 24 is in an off state. Therefore, the capacitor 10 is connected to the output voltage of the photocoupler 6.
It is charged (integrated) by V _i and its average voltage V _c is the height indicated by the dashed line. Since this voltage V _c is lower than the predetermined voltage V _a shown by the dashed line that is applied to the negative input terminal of the comparator 11 , no determination signal is sent to the output terminal of the comparator 11 . Next, when the duty ratio of the pulse signal E _s is 0.2, the waveform of the voltage V _i appearing at the collector of the phototransistor 6b is a rectangular wave with a duty ratio of 0.8, as shown in FIG. 2B. At this time as well, the charging voltage V _b of the capacitor 18 is the Zener voltage V _z of the Zener diode 23
, the Zener diode 23 is not conductive and the transistor 24 is in an off state. Therefore, the capacitor 10 is connected to the output voltage of the photocoupler 6.
Since it is charged (integrated) with V _i and its average voltage V _c exceeds the predetermined voltage V _a , a discrimination signal V ₀ is sent to the output terminal of the comparator 11 . Next, as shown in Figure 2C, a pulse signal E _s with a duty ratio of 0.5 is applied.
is being input, when the pulse signal E _s stops at time t ₁ , the charging voltage V _b of the capacitor 18 starts to rise and at time t ₂ the Zener voltage of the Zener diode 23 increases.
V exceeds _z . Then, the Zener diode 23 becomes conductive, the transistor 24 becomes conductive, and the capacitor 1
The charging voltage _Vc of 0 is suppressed by the Zener voltage _Vz of the Zener diode 23, and similarly when the duty ratio of the pulse signal Es is 0.2, when the pulse signal Es stops, the charging voltage Vc is suppressed by the Zener voltage Vz. Therefore, this charging voltage V _c is equal to the predetermined voltage V _a
V
is not sent. In this way, this duty ratio discrimination circuit does not send out a discrimination signal if the input signal stops.

[Effect of idea]

As described above, the duty ratio discrimination circuit according to the present invention is provided with a signal detection circuit, and when this signal detection circuit is checking the input pulse signal, the signal detection circuit is integrated by the integrator circuit as usual, and the comparison circuit When the pulse signal stops, the signal detection circuit suppresses the integration circuit to prevent the integrated value from exceeding the reference value, so that no malfunction occurs.

[Brief explanation of the drawing]

Fig. 1 is a wiring diagram showing an embodiment of the duty ratio discrimination circuit according to the present invention, Fig. 2 is a time chart showing the operation of Fig. 1, and Fig. 3 is a wiring diagram showing an example of a conventional duty ratio discrimination circuit. , FIG. 4 is a time chart showing the operation of FIG. 3. 1...Integrator circuit, 2...Comparison circuit, 3...Signal detection circuit.

Claims (1)

[Scope of utility model registration request] An integrating circuit and a comparing circuit consisting of a resistor and a capacitor are provided, and the periodically input pulse signal is integrated by the integrating circuit, and the integrated value is compared by the comparing circuit. If this integrated value exceeds the reference value, a discrimination signal is issued. In the duty ratio discrimination circuit that sends out the pulse signal, a signal detection circuit that detects the presence or absence of the pulse signal is provided, and the output of this signal detection circuit is connected between the resistor and the capacitor of the integrating circuit, and the signal detection circuit detects the pulse signal. A duty ratio discrimination circuit characterized in that when detecting no signal, the signal detection circuit short-circuits a capacitor of the integrating circuit.