JPH0338795B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a helical scan type video tape recorder.

A helical scan type video tape recorder (hereinafter simply referred to as H-VTR) is capable of making the length of each individual track that is sequentially and discontinuously recorded on a magnetic tape (hereinafter simply referred to as tape) as relatively long. This makes it easy to perform so-called non-segment type recording in which one field of television signals is accommodated in one track.As a result, trick playback such as slow, still, and search can be performed at a speed that is faster than the tape running speed. Not only can this be done by simply making changes, but it also has the advantage of being able to monitor the image even when the tape is being fast-forwarded or rewound.

By the way, when performing trick playback or image monitoring as described above on such an H-VTR, it is natural that the playback operation will be performed at a tape running speed different from that during recording. As a result, the relative speed between the magnetic head and the tape becomes different during recording and during playback.

For this reason, conventional H-VTRs have had the disadvantage that image quality tends to deteriorate during trick playback, fast forwarding or rewinding of the tape.

The reason for this will be explained below.

First, in general analog H-VTRs, the FM modulation recording method is usually adopted, so the reproduction signal processing circuit is equipped with a reproduction equalizer and an FM demodulator. The equalization characteristics and carrier frequency, etc., are set so that optimal results can be obtained when there is no change in relative speed. Therefore,
If a shift occurs in the frequency axis of the reproduced signal due to the change in relative speed as described above, the S/N ratio will decrease due to improper equalization, the frequency characteristics will change, and the output will be proportional to the frequency in FM demodulation. This results in saturation of the demodulated output due to deviation of the pulse width from the optimum value, or change in the gain of the demodulated output due to deviation of the frequency axis, resulting in deterioration of image quality.

In addition, the shift in the frequency axis at this time also causes a change in the time axis of the reproduced signal, which appears as a change in the horizontal and vertical synchronization periods. The synchronization signal will be tied to the gate pulse for

Next, the same applies to H-VTR (PCM VTR), a digital recording system that has come into use in recent years. Changes in relative speed cause the equalization characteristics to become inconsistent, resulting in a drop in S/N, and at the same time, the reproduced waveform changes, so the eye pattern after detection also changes. Furthermore, since the data will be judged using the same time slot,
As a result of making a determination at a position shifted from the maximum aperture of the eye pattern, the error rate naturally deteriorates. In addition, filters for clock extraction also tend to have the same characteristics, which increases clock jitter. Therefore, in this case as well, the quality of the reproduced signal deteriorates and the image quality deteriorates.

SUMMARY OF THE INVENTION An object of the present invention is to provide an H-VTR which eliminates the above-mentioned drawbacks of the prior art and allows image reproduction of sufficient image quality to be obtained even when monitoring is performed during trick playback, fast forwarding, or rewinding. be.

In order to achieve this object, the present invention detects changes in the relative speed between the magnetic head and the tape due to changes in tape running speed, and uses a playback signal processing circuit such as a playback equalizer in response to the change in relative speed. The feature is that the characteristics of the system are automatically changed.

Embodiments of the magnetic recording and reproducing apparatus according to the present invention will be described below with reference to the drawings.

FIG. 1 shows the present invention in a digital recording system H-
In one embodiment applied to a VTR, 1 is a preamplifier;
2 is an equalizer, 3 is an echo synthesis filter, 4 is a data discriminator, 5 is a BPF (band pass filter),
6 is PLL (phase locked loop), 7 is microcomputer, 8 is D/A
(digital to analog converter).

Also, a is the playback signal from the tape, b is the CTL
signal, c is a speed detection pulse, d is a time code signal, e is a mode signal, f is a control signal, g is a switching signal, h is a tape timer display signal, i is a control voltage, j is an equalized playback signal, k represents data (image signal) and p represents a clock, respectively.

The preamplifier 1 functions to amplify the reproduced signal a to a predetermined level.

The equalizer 2 is capable of controlling equalization characteristics using a control voltage i.

The echo synthesis filter (hereinafter simply referred to as a filter) 3 has a configuration such that its delay amount is controlled by a control voltage i.

The data discriminator 4 uses the clock p supplied from the PLL 6 as a detection window, and determines whether the data is at the "1" level depending on whether the amplitude of the input data signal supplied from the filter 3 exceeds a threshold during this detection window. It determines the "0" level and generates data k as an output. The threshold level at this time is controlled by the control voltage i.

The BPF 5 extracts the clock component from the equalized reproduction signal j and supplies it to the PLL 6, but the center frequency of its passband is equal to the control voltage i.
It is configured to be controlled by. or,
The center potential (frequency) of PLL 6 is similarly controlled.

The microcomputer 7 outputs a CTL signal b obtained by pulse-forming a signal reproduced from a control track recorded along the longitudinal direction of the tape, a speed detection pulse c representing the tape running speed obtained from the tape timer roller, and editing. Inputs are a time code signal d used for the purpose of the H-VTR, a mode signal e indicating the state in which the tape running speed of the H-VTR is being controlled, and a control signal f corresponding to the relative speed. In addition to calculating and outputting the
Optimize the loop filter parameters of
Even at speeds other than the normal tape running speed.
It functions to generate a switching signal g to ensure that the PLL 6 is always pulled in in the shortest possible time, and a tape timer display signal h (pulse) that corrects errors due to tape timer roller slip.

Since the control signal f output from the microcomputer 7 is a digital signal, the D/A 8 functions to convert it into a control voltage i which is an analog signal.

Therefore, according to this embodiment, when the H-VTR is in playback mode, controlled to trick playback states such as slow, still, and search, or when monitored during fast forwarding, rewinding, etc., the tape Even when the traveling speed becomes different from that during normal reproduction and the frequency axis of the reproduced signal a fluctuates, the equalization characteristics of the equalizer 2, the delay characteristics of the filter 3, and the discrimination threshold of the data discriminator 4 will remain unchanged. Both are always controlled to the optimum state by the control signal f output from the microcomputer 7 according to changes in relative speed, and at the same time, the BPF5
The center frequency of the clock, the pull-in characteristic of the PLL 6, and the pull-in center frequency are each controlled to the optimum state by the control signal f and the switching signal g, and the clock p in the best state is supplied from the PLL 6 to the data discriminator 4. At its output, data k can be reproduced in exactly the same state as at normal tape running speed, and high-quality images can be monitored during trick playback or fast forward/rewind.

Next, the calculation of the control signal f by the microcomputer 7 will be explained.

In Figure 2, the tape running speed vector during normal playback is v→, and the tape running speed multiple is n (however, n=0, ±
1, ±2...) and the scanning vector (i.e., relative velocity vector) by the magnetic head is l _o →.
As is clear from this figure, there is a relationship of relative velocity vector l _o →=l ₀ →+nV→ at n times speed.

Here, if the tape running speed is 0, that is, n = 0, and the angle between the vector l ₀ → and the tape running direction, which represents when the tape is stationary, is θ ₀ , then the angle between the vector l ₀ → and the vector v→ is π Since −θ is ₀ , the following formula holds true.

｜l ₀ ｜ ² +n ² nv→｜ ² −2n｜l ₀ →｜・｜v｜cos(π
-θ ₀ ) = |l _o → | ^2where , |l ₀ |=L ₀ , |v→|=V, |l _o →|=L _o
Then, Ln=√ ² ₀ + ^{2 2} + 2 _{0 0} .

Here, if the relative speed at n times speed is L _o , the frequency of the corresponding reproduction signal is f _o , and those at normal speed are L ₁ and f ₁ , these ratios are as follows.

However, A=L ₂ ⁰ +V ² +2L ₀ Vcosθ ₀ /V ² B=2L ₀ cosθ ₀ /V C=L ² ₀ /V ² .

Therefore, since θ ₀ , l ₀ →, and v→ mentioned above are constants determined by the tape format of the H-VTR, the relative speed ratio fn/f ₁ is related only to the multiple n of the tape running speed. It can be seen that the calculation can be easily performed using the microcomputer 7 (FIG. 1).

Many H-VTRs are known in which the tape running and tape timer are controlled by a microcomputer, and in this case, the free processing time of the microcomputer is utilized to 1)
If the formula is calculated, there is no need to add any hardware at all, and there is almost no increase in cost.

In addition, in H-VTR, the above θ ₀ is generally an extremely small value, and V is L ₀
is sufficiently small compared to That is, cosθ ₀ ≒1, L ₀ ≫
Most of them are marked V.

Therefore, using this relationship, it is possible to make various approximations for the calculation of equation (1), and one example will be explained with reference to Figure 3. Because of the above relationship, the illustration in Figure 3 can be made. Regarding , b, ha, and d,
In both cases, A≒V, B≒V, C≒V, and D≒V, so, =L ₀ +nV/L ₀ +V... (2) holds true, and fn/f ₁ can be easily calculated.

If we apply numerical values to this equation (2), we get, for example,
In the type C format H-VTR,
L ₁ /V=252.5/2.5, and on the other hand, the following formula holds from Figure 3, L ₁ /L ₀ =f ₁ /f ₀ =L ₀ +V/L ₀ +V/L ₀ /L ₀ +V=L ₀₊
V/L ₀ As a result, L ₁ =L ₀ +V, and the following formula is obtained.

L _o /L ₁ = f _o /f ₁ = L ₀ +nV/L ₀ +V=L ₀ +V+(n-1)
V/L ₀ +V=252.5+(n-1)×2.5/252.5=100+n
/101...(3) This equation (3) is an extremely simple function and can be easily calculated. For example, using an operational amplifier,
It is sufficient to set the gain to 1/101, give an offset of 100/101, and input a voltage proportional to the speed multiplier n.

Incidentally, in the above, the relative speeds Ln, _L1 , etc. are expressed by the corresponding frequencies fn, _f1 , but they may be expressed by the period.

That is, if the period at n times speed is T _o and the period at normal speed is T ₁ , the ratio of these is or Alternatively, it can be expressed as either T _o /T ₁ ≈L ₀ +V/L ₀ +nV.

Next, an equalizer 2 that can control the optimum equalization characteristics according to the control voltage i (Fig. 1)
An example of this is shown in FIG. In FIG. 4, 40 is an input terminal for a reproduction signal to be equalized, 41 is an output terminal for an equalized reproduction signal j, 42 is a control terminal to which a control voltage i is supplied, and 4
3 and 44 are resistors, 45 and 46 are field effect transistors (FET), and 47 to 49 are capacitors.

Now, set the resistance values of resistors 43 and 44 to R, FET4
When the gate voltage of 5 and 46 is vi, the resistance value between the source and drain is R(vi), and the capacitor 47
If the capacitance value of .about.49 is _C1 , the cutoff frequency _fc of the equalizer 2 is expressed by the following equation.

f _c =1/2πC ₁ (R+R(vi)) Here, the gate voltage at the center of the dynamic range of FETs 45 and 46 is m, and the source-emitter resistance at this time is R(m), and then,
The resistance value R(vi) changes by 1/K (however, K is a constant determined by the tape format; for example, in the above-mentioned type C format, K = 100) with respect to the sum of R(m) and R. The voltage to be
By adding to or subtracting from the control voltage i each time the relative speed changes, the equalization characteristic is controlled according to the change in relative speed as described above, and the reproduced signal j appearing at the output terminal 41 is always in an optimal state. is equalized.

As another example, the resistors 43 and 44 and FETs 45 and 46 in FIG. 4 are fixed inductance elements, and the capacitors 47 and 4 are fixed inductance elements.
8 and 49 may be replaced with variable capacitance diodes, and the capacitances of these variable capacitance diodes may be controlled by the control voltage i.

In this case, if the inductance value of the above inductance element is Q and the capacitance value of the variable capacitance diode is C(vi), then If the capacitance value of the variable capacitance diode at normal speed is C ₁ , then the capacitance C _o at n times speed is C _o =A/n ² +Bn+C×C ₁ .

Furthermore, a primary CR consisting of a resistor and a capacitor
Some of the capacitors in the filter may be replaced with variable capacitance diodes.

In this case, f _c =1/2πC(vi)R, and this cutoff frequency f _c is calculated by the frequency ratio
Since it is sufficient to change it in proportion to f _o /f ₁ = n + 100/101, the capacitance of the variable capacitance diode at f _o is C _o , the resistance value of the resistor is R _o , and the value at f ₁ is _C1 ,
If R ₁ , then 1/2πC _o R _o /1/2πC ₁ R ₁ = n+100/101 C ₁ R ₁ /C _o R _o = n+100/101, and here, since R ₁ = R _o = R, Therefore, C _o =101×C ₁ /100+n, and furthermore, in the range where n satisfies (100≫n), C _o =1−n−1/100+n≈101−n/100.

Therefore, the fixed capacitor and the variable capacitance diode are separated, and the variable capacitance diode is set to be biased to the center of its dynamic range when n = 1, and the capacitance at that time and the capacitance of the fixed capacitor are 1/100 of the sum of n may be decreased each time n increases by 1, or may be increased each time n decreases by 1.

However, this is only an approximation, so
In order to control f _c over a wide range, it is desirable to perform calculations using a microcomputer 7 or the like.

At this time, as mentioned above, that's why, So, if R ₁ = R _o However, A, B, and C are the aforementioned constants.

On the other hand, if the voltage-capacitance characteristic of a variable capacitance diode is g(E), generally g(E)=K ₁ (E+φ) ^- 〓 Here, K ₁ and γ are constants, and φ is the junction potential of silicon. It is.

becomes. In particular, for stepped junction diodes, γ=1/2, so becomes.

Therefore, the voltage of the variable capacitance diode may be controlled so that E=n ² +Bn+C+φ.

Note that such calculations are performed by the microcomputer 7 (Figure 1).
However, it is also possible to perform calculations in advance, store the results in a ROM (read-only memory), and read out the speed multiple number n as an address. In this case, the results of correcting the nonlinearity of the variable capacitance diode in advance through experiments or the like may be stored in memory.

Furthermore, both the resistor and the capacitor may be controlled by using an FET and a variable capacitance diode.

Also, by using RAM (random access memory) instead of ROM, the microcomputer performs calculations immediately after the H-VTR's power is turned on, and the results are stored in RAM and subsequently read from this RAM. Control may also be performed.

By the way, although the embodiments of the digital recording (PCM) system have been described above, the present invention can of course be applied to an analog recording (FM) system H-VTR, and in this case, the control of the playback equalizer is performed digitally. It is the same as the recording method, but
It is also desirable to control the FM demodulator according to changes in relative speed.

Therefore, for example, in a system using a balanced modulator, the carrier frequency may be controlled according to the relative speed.

Further, the same applies to a method using a pulse count type FM demodulator, and when the relative speed changes and a shift occurs in the frequency _fo , the output level changes and the quality of the reproduced signal deteriorates.

This pulse count type FM demodulator shapes the input signal into pulses with a constant width and rectifies them to obtain an output with a level proportional to the frequency, and its dynamic range is based on the pulse width. The output level is maximum at the frequency where the interval between adjacent pulses becomes 0, and is minimum when the input signal becomes DC. That is, if the width of the above pulse is T and the period of the input signal is t, then
The output level is proportional to T/t, and the maximum output is given when t=T, and the reciprocal of T at this time is 1/T
becomes the saturation frequency f _s . However, in general, in order to eliminate interference, a limiter is applied to the input signal and the above pulse is created at each of its rising and falling edges, so the saturation frequency f _s at this time is 1/2 of the above value. Therefore, f _s =1/2T.

However, this saturation frequency f, or _fs , will be inversely proportional to the pulse width T in any case. On the other hand, if the frequency displacement is Δf, the amount of displacement also changes by the rate of change of relative velocity f(n), which means that the signal level becomes Δf×f(n). In other words, the output video signal has a gain of f(n)
The current has been doubled and even shifted to direct current.

Therefore, to prevent this, the pulse width should be reduced to 1/f.
It can be controlled using the function (n).

Then, by replacing such an FM demodulator with the data discriminator 4 in the embodiment of FIG. 1 and removing the BPF 5 and PLL 6, an embodiment of the present invention using an analog recording system can be obtained.

Note that in the above embodiment, control is performed by calculating the relative speed from the tape running speed, but the characteristics of the variable element itself included in the equalizer etc. are a function of the relative speed or a transfer function of its approximate expression. Needless to say, if the tape has a tape running speed, the signal representing the tape running speed can be used as is.

Although not described in this embodiment, since the clock extraction filter has a fixed delay, the relative phase of the clock with respect to the data signal also changes as the frequency changes, and the discrimination phase is no longer optimal. That is, let the delay time t _d be the clock frequency at normal speed.
If f ₁ and the discrimination phase at normal speed are φ ₁ , then t _d / (1/f ₁ ) − φ ₁ = 0 at n times speed, t _d / (1/f _o ) − φ _o = 0 f ₁ The relationship between f o and f _o is as described at the beginning of the invention. Therefore, it is necessary for the variable delay element that compensates for this to always follow up so as to realize φ _o that satisfies the above formula, and since it can be easily calculated if t _d is known, this can be stored in ROM etc. It is enough if you do.

As explained above, according to the present invention, the characteristics of the playback signal processing circuit such as the playback equalizer are automatically controlled according to the tape running speed during playback. We provide a low-cost magnetic recording and reproducing device that can always properly compensate for the reproduced signal even when monitoring time or rewinding, and can take full advantage of the features of the H-VTR without deteriorating the reproduced signal. can do.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention using a digital recording method, FIGS. 2 and 3 are explanatory diagrams showing a method for calculating relative speed from tape running speed, and FIG. 4 is a reproduction equalizer. FIG. 2 is a circuit diagram showing one embodiment of the present invention. 1... pre-amplifier, 2... equalizer, 3... echo synthesis filter, 4... data discriminator, 5... BPF (band pass filter), 6... PLL (phase locked loop), 7... microcomputer, 8...
D/A (digital to analog converter).

Claims (1)

[Claims] 1. In a helical scan type magnetic recording and reproducing device capable of reproducing signals at a tape running speed different from that during signal recording, a control signal calculation means for detecting the relative speed of the reproducing head and the tape and generating a control signal of a voltage corresponding to the relative speed. , an equalizer whose equalization characteristic can be controlled by the control signal, a filter whose pass characteristic can be controlled by the control signal, and a data discriminator whose data discrimination characteristic can be controlled by the control signal. A signal processing circuit is provided, and the signal reproduced from the tape is supplied to the reproduced signal processing circuit, and a signal is extracted from the output thereof, in which deterioration in signal reproduction characteristics due to a change in tape running speed is compensated for. A magnetic recording/reproducing device characterized by: