JPH033321A - Vapor growth method for iii-v compound semiconductor - Google Patents

Vapor growth method for iii-v compound semiconductor

Info

Publication number
JPH033321A
JPH033321A JP13824689A JP13824689A JPH033321A JP H033321 A JPH033321 A JP H033321A JP 13824689 A JP13824689 A JP 13824689A JP 13824689 A JP13824689 A JP 13824689A JP H033321 A JPH033321 A JP H033321A
Authority
JP
Japan
Prior art keywords
container
substrate
substrates
semiconductor
compound semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13824689A
Other languages
Japanese (ja)
Inventor
Tokuji Tanaka
篤司 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP13824689A priority Critical patent/JPH033321A/en
Publication of JPH033321A publication Critical patent/JPH033321A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To dispense with a pretreatment process for semiconductor substrates by a method wherein the substrates are heated in a superhigh vacuum container and subsequently, the substrates are placed on a substrate heating stand in a reaction container to perform a crystal growth. CONSTITUTION:Semiconductor substrates 13 are internalized in a superhigh vacuum container 5 and subsequently, the interior of the container 5 is evacuated and a heating is performed on the substrates 13 in a superhigh vacuum of at least 5X10<-9>Torr. Subsequently, the above substrates 13 are transferred from the interior of the container 5 to the interior of a reaction container 14 for vapor growth use and are placed on a semiconductor substrate heating stand 11 installed in the container 14. Moreover, raw gas for III-V compound semiconductor vapor growth use is introduced in the container 14 and a compound semiconductor crystal is grown on the above substrates 13. For example, the above raw gas is constituted of at least one kind of an organic compound consisting of a group III element and at least one kind of a hydrogen compound or an organic compound consisting of a group V element.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は■族元素からなる有機化合物と、■族元素から
なる水素化合物もしくは有機化合物の熱分解によるm−
v族化合物半導体の気相成長法(Metal Orga
nic Chemical Vapor Deposi
tion法:以下MOCVD法と略称する)に係り、特
に半導体基板の前処理工程を不要とするm−v族化合物
半導体の気相成長法に関する。
Detailed Description of the Invention (Industrial Field of Application) The present invention provides m-
Vapor phase growth method of V group compound semiconductor (Metal Orga)
nic Chemical Vapor Deposit
tion method (hereinafter abbreviated as MOCVD method), and particularly relates to a vapor phase growth method of m-v group compound semiconductors that does not require a pretreatment step for a semiconductor substrate.

(従来の技術) MOCVD法は有機金属化合物と金属水素化合物等の原
料ガスを熱分解し反応させて、基板上に結晶を成長させ
る方法で1分子線結晶成長方法に比べて量産性に富んだ
エピタキシャル結晶成長方法として注目され、砒化ガリ
ウム(GaAs)、燐化インジウム(InP)等の単層
膜や、GaAs/アルミニウム・ガリウム・砒素(AI
GaAs)、InP/インジウム・ガリウム・砒素(I
nGaAs)等の異種の半導体接合(ペテロ接合)を持
つ結晶の成長に用いられており。
(Prior art) The MOCVD method is a method of growing crystals on a substrate by thermally decomposing and reacting raw material gases such as organic metal compounds and metal hydride compounds, and is easier to mass produce than the single molecular beam crystal growth method. It has attracted attention as an epitaxial crystal growth method, and has been used to grow single-layer films such as gallium arsenide (GaAs), indium phosphide (InP), and GaAs/aluminum gallium arsenide (AI).
GaAs), InP/indium gallium arsenic (I
It is used to grow crystals with different types of semiconductor junctions (peterojunctions) such as nGaAs).

これらの材料は電界効果トランジスタ (FET)、高
電子移動度トランジスタ(HEMT)等の素子用結晶と
して利用されている。最近では、量産性を向上させるた
めに、同時に多数枚の半導体基板上に結晶成長を行う方
法が開発され、例えば、昭和62年秋季応物予稿集p、
171に、HEMT用結晶を7枚同時に成長させ均一性
が良好であることが報告されている。
These materials are used as crystals for devices such as field effect transistors (FETs) and high electron mobility transistors (HEMTs). Recently, in order to improve mass productivity, a method of growing crystals on multiple semiconductor substrates simultaneously has been developed.
No. 171 reported that seven HEMT crystals were grown simultaneously and the uniformity was good.

通常、結晶成長を行う場合には、半導体基板前処理、該
基板の加熱台への載置、反応管内のガス置換、基板の加
熱、結晶成長、基板の降温、結晶成長ウェハの取り出し
の順に工程を進める。これらの工程の中で半導体基板前
処理工程は、少なくとも片面が鏡面状に仕上げられてい
る基板の表面に形成される自然着化膜を除去するために
用いられる工程で、−例のGaAs基板に対してはこれ
を破着系のエツチング液(11□So4/H,02/H
,O混液)中を通過させる溶液エツチングにより行われ
るものである。そして、叙上の同時多数枚成長を行うた
めには、基板前処理工程で同時に多数枚の基板を処理す
る必要を生じてくる。前処理工程での基板枚数の増加は
処理時間の増加を招く事になり、従って気相成長工程全
体の時間が長くなるため量産性を向上させる上で欠点と
なる。この欠点を改善するためには、基板前処理工程を
省略して、結晶成長することが望ましい。
Normally, when performing crystal growth, the steps are: pretreatment of a semiconductor substrate, placement of the substrate on a heating table, gas replacement in the reaction tube, heating of the substrate, crystal growth, cooling of the substrate, and removal of the crystal growth wafer. proceed. Among these processes, the semiconductor substrate pretreatment process is a process used to remove a naturally deposited film formed on the surface of a substrate whose at least one side is mirror-finished. For this, use a destructive etching solution (11□So4/H, 02/H
, O mixed solution). In order to perform the simultaneous growth of multiple substrates as described above, it becomes necessary to process multiple substrates simultaneously in the substrate pretreatment step. An increase in the number of substrates in the pretreatment process results in an increase in processing time, which lengthens the entire vapor phase growth process, which is a disadvantage in improving mass productivity. In order to improve this drawback, it is desirable to omit the substrate pretreatment step and perform crystal growth.

そこで、本発明者は第3図の概略図に示すようなMOC
VD装置を用いてFET用GaAs結晶を成長させ、結
晶成長前の基板前処理の省略が可能か否かを調べた。
Therefore, the present inventor proposed an MOC as shown in the schematic diagram of FIG.
GaAs crystals for FETs were grown using a VD apparatus, and it was investigated whether it was possible to omit substrate pretreatment before crystal growth.

結晶成長は以下の手順で行った。まず、片面が鏡面状に
仕上げられている半絶縁性GaAs基板101を、前処
理工程なしで反応容器102内の加熱台103上に載置
する。次にキャリアガスである水素をガス導入口104
aより導入しつつRFコイル105にて加熱台上のGa
As基板を700℃に加熱し、しかる後にガス導入口よ
りGaの原料である(CI+−)3 Ga (トリメチ
ルガリウム:略称TMG)とAsの原料であるアルシン
ガス(AsH,)とを流し込んでバッファ層と称される
不純物を添加しないGaAs層を1μIの厚さに形成し
、引き続いてn形不純物を添加する硫化水素ガス(Ua
S)を所定量流し込み、能動層と称される電子濃度がI
 X LO17c履−3で厚さが0.3μ■のn−Ga
As層を形成させてFET用GaAs結晶を成長させた
Crystal growth was performed according to the following procedure. First, a semi-insulating GaAs substrate 101 whose one side is mirror-finished is placed on a heating table 103 in a reaction vessel 102 without any pretreatment process. Next, hydrogen as a carrier gas is introduced into the gas inlet 104.
Ga on the heating table with the RF coil 105 while introducing from a.
The As substrate is heated to 700°C, and then (CI+-) 3 Ga (trimethylgallium: abbreviated as TMG), which is the raw material for Ga, and arsine gas (AsH,), which is the raw material for As, are poured into the gas inlet to form a buffer layer. A GaAs layer with no impurities added called ``GaAs'' is formed to a thickness of 1 μI, followed by hydrogen sulfide gas (Ua) doped with n-type impurities.
S) is poured in a predetermined amount, and the electron concentration called the active layer is I.
X LO17c shoe-3 with a thickness of 0.3 μ■ n-Ga
A GaAs crystal for FET was grown by forming an As layer.

なお、図中の104bはガス排出口である。Note that 104b in the figure is a gas exhaust port.

このウェハの表面はショットキ電極を形成して電子濃度
の深さ方向分布を測定した。第4図は上記ウェハの電子
濃度の深さ方向分布を示したものであり、図中の矢印は
基板とバッファ層との境界を表わしている。同図から分
かるように、基板とバッファ層との境界にはスパイク状
n形層が存在していることが分った。この様な結晶は能
動層下の電流通路となるためFET用GaAs結晶とし
ては使えない。そこで、高電子濃度層発生の原因究明の
ため、 GaAs基板を前処理してからMOCVD装置
の反応容器内に入れるまでの時間をかえた実験を行った
ところ、GaAs基板を前処理してからMOCVD装置
の反応容器内に入れるまでの時間が長くなるほど発生頻
度が高くなっていることが分った。
A Schottky electrode was formed on the surface of this wafer, and the depth distribution of electron concentration was measured. FIG. 4 shows the depth distribution of electron concentration in the wafer, and the arrow in the figure represents the boundary between the substrate and the buffer layer. As can be seen from the figure, it was found that a spike-shaped n-type layer existed at the boundary between the substrate and the buffer layer. Such crystals cannot be used as GaAs crystals for FETs because they become current paths under the active layer. Therefore, in order to investigate the cause of the generation of the high electron concentration layer, we conducted an experiment in which the time from pretreatment of the GaAs substrate to its introduction into the reaction vessel of the MOCVD equipment was varied. It was found that the longer it took to enter the reaction vessel of the device, the more frequently it occurred.

本発明者は叙上の結果から、上記高電子濃度層の発生に
はGaAs基板表面にできる酸化膜が関与しているとの
結論を得て本発明を案出するに至った。
Based on the above results, the present inventor came to the conclusion that the oxide film formed on the surface of the GaAs substrate is involved in the generation of the above-mentioned high electron concentration layer, and came up with the present invention.

(発明が解決しようとする課題) 上記従来の技術には半導体基板に対し結晶成長直前に前
処理を施す必要があり、かつ、この前処理と結晶成長と
の間の経過時間が増大する程、基板と結晶成長層との境
界に高電子濃度層が生成し、FET用の基板として適し
なくなるという重大な問題がある。また、結晶成長工程
の能率の向上に対し追随が困難であるなどの問題もある
(Problems to be Solved by the Invention) In the above conventional technology, it is necessary to perform pretreatment on the semiconductor substrate immediately before crystal growth, and as the time elapsed between this pretreatment and crystal growth increases, There is a serious problem in that a high electron concentration layer is generated at the boundary between the substrate and the crystal growth layer, making it unsuitable as a substrate for FET. Further, there are also problems such as difficulty in keeping up with improvements in efficiency of the crystal growth process.

本発明は上記従来の問題点に鑑みてm−v族化合物半導
体の気相成長法を改良するものである。
In view of the above-mentioned conventional problems, the present invention improves the vapor phase growth method for m-v group compound semiconductors.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明にかかるm−v族化合物半導体気相成長法は、半
導体基板を超高真空容器内に内装する工程と、該工程に
連続して前記超高真空容器を排気し少なくとも5 X 
10−’Torrの超高真空にて半導体基板に加熱を施
す工程と、該工程に連続して前記半導体基板を前記超高
真空容器内から気相成長用の反応容器内に搬送しこれに
設置された半導体基板加熱台上に載置する工程と、前記
反応容器内にm−v族化合物半導体気相成長用の原料ガ
スを導入し前記半導体基板上に前記化合物半導体の結晶
を成長させる工程を含み、また、その原料ガスを、■族
元素からなる少なくとも一種類の有機化合物と、■族元
素からなる少なくとも一種類の水素化合物または有機化
合物とで構成することを特徴とする。
(Means for Solving the Problems) The m-v group compound semiconductor vapor phase growth method according to the present invention includes a step of placing a semiconductor substrate in an ultra-high vacuum container, and a step in which the semiconductor substrate is placed in the ultra-high vacuum container. Exhaust at least 5 x
A step of heating the semiconductor substrate in an ultra-high vacuum of 10-' Torr, and following this step, the semiconductor substrate is transferred from the ultra-high vacuum container to a reaction container for vapor phase growth and placed therein. a step of placing the semiconductor substrate on a heating table, and a step of introducing a raw material gas for vapor phase growth of an m-v group compound semiconductor into the reaction vessel to grow crystals of the compound semiconductor on the semiconductor substrate. It is characterized in that the raw material gas is composed of at least one type of organic compound consisting of a group Ⅰ element and at least one type of hydrogen compound or organic compound consisting of a group Ⅰ element.

(作 用) 本発明にかかる■−v族化合物半導体気相成長法ではM
OCVD法を用いて半導体基板上にm−v族化合物半導
体結晶を成長させるに際して、該基板を5 X 10−
’ Torr以下の超高真空容器内で加熱して半導体基
板に形成された酸化膜を除去してから反応容器内の基板
加熱台に載置してm−v族化合物半導体の結晶成長を行
うことにより、基板と結晶成長層との境界における高電
子濃度層の生成を防止することが出来る。
(Function) In the ■-v group compound semiconductor vapor phase growth method according to the present invention, M
When growing an m-v group compound semiconductor crystal on a semiconductor substrate using the OCVD method, the substrate is
' To remove the oxide film formed on the semiconductor substrate by heating it in an ultra-high vacuum chamber at Torr or less, and then place it on a substrate heating table in the reaction chamber to grow the crystals of an m-v group compound semiconductor. This makes it possible to prevent the formation of a high electron concentration layer at the boundary between the substrate and the crystal growth layer.

(実施例) 以下、本発明の一つの実施例として電界効果トランジス
タ (FET)用GaAs結晶層を成長させる場合を例
示し第1図を参照して説明する。
(Example) Hereinafter, as an example of the present invention, a case in which a GaAs crystal layer for a field effect transistor (FET) is grown will be described with reference to FIG.

第1図に示す装置で本発明による気相成長方法を用いて
結晶の成長を行う場合の手順は次ぎの通りである。
The procedure for growing a crystal using the vapor phase growth method according to the present invention using the apparatus shown in FIG. 1 is as follows.

まず、片面が鏡面状に仕上げられている半絶縁性GaA
s基板を用意し、これを超高真空容器や反応容器の内部
に空気が入ることを防止するための予備室の扉1を開け
て予備室内2に挿入する。そして扉を閉め、超高真空容
器内を排気する第2の真空排気装置6にかかる負担を軽
減するために、第一の真空排気装置3にて該室内を10
−’ Torr以下になるまで排気する0次に、第1の
仕切り弁4を開き、通常10−’ Torr以下の真空
度に保持されている超高真空容器内5に搬送し第1の仕
切り弁4を再び閉じる。そして、第1の仕切り弁の開閉
により10−’Torr近くまで真空度が上昇した容器
内を第2の真空排気装置6にて排気し、  1O−10
Torr以下になったときヒータ7により基板保持具8
に入れたGaAs基板を550℃に加熱する。所定の時
間加熱した。後ヒータの電源を切って冷却し、300℃
以下になったとき再び第1の仕切り弁4を開けてGaA
s基板を予備室に搬送し、仕切り弁を閉じる。この後。
First, semi-insulating GaA with a mirror finish on one side.
A s-substrate is prepared and inserted into the preliminary chamber 2 by opening the preliminary chamber door 1 for preventing air from entering the ultra-high vacuum container or the reaction vessel. Then, the door is closed, and in order to reduce the burden on the second vacuum evacuation device 6 that evacuates the inside of the ultra-high vacuum container, the first vacuum evacuation device 3 is used to
-' Torr or less Next, open the first gate valve 4, and transport the vessel to an ultra-high vacuum container 5 which is normally maintained at a vacuum level of 10-' Torr or less. Close 4 again. Then, the inside of the container whose degree of vacuum has increased to nearly 10-'Torr by opening and closing the first gate valve is evacuated by the second evacuation device 6, and the vacuum level is evacuated to 10-10 Torr.
When the temperature becomes less than Torr, the heater 7 closes the substrate holder 8.
The GaAs substrate placed in the chamber is heated to 550°C. It was heated for the specified time. After that, turn off the power to the heater and cool it down to 300℃.
When the GaA
s Transport the substrate to the preliminary chamber and close the gate valve. After this.

予備室2内にガス導入口9から窒素ガスを導入して大気
圧に戻し、反応容器内と同一圧力にする。
Nitrogen gas is introduced into the preparatory chamber 2 from the gas inlet 9 to return the pressure to atmospheric pressure, making it the same pressure as inside the reaction vessel.

同時にGaAs基板を保持するための加熱台11を搬送
室12まで下げて予備室にあるGaAs基板を加熱台1
1まで搬送できるように設定し、その後、第2の仕切り
弁lOを開けて加熱台ll上にGaAs基板13を載置
する。本実施例の場合、基板表面にある酸化膜の除去効
果を見るため、前処理を終えてからの時間を30分間、
2時間、1日、2日、7日と変えた5枚の基板を載置し
た。次に、第2の仕切り弁lOを閉じ、加熱台11を反
応容器14内の所定の位置まで持ち上げてからキャリア
ガスである水素を原料ガス導入口15から該器内に流し
ながらRFコイル16にて700℃まで加熱し、しかる
後にGaAs結晶の原料であるトリメチルガリウム((
C113)a Ga :略称TMG)とアルシンガス(
AsH3)を同様に器内に流してGaAs基板13上に
1μmのバッファ層を形成し、引き続きn形の不純物で
ある硫化水素ガスも同様に器内に流し込み電子濃度がI
 X 1017cm+−’で厚さが0.3μmの能動層
を形成しFET用のウェハを作製した。
At the same time, the heating table 11 for holding the GaAs substrate is lowered to the transfer chamber 12, and the GaAs substrate in the preliminary chamber is transferred to the heating table 11.
After that, the second gate valve 10 is opened and the GaAs substrate 13 is placed on the heating table 11. In the case of this example, in order to see the effect of removing the oxide film on the substrate surface, the time after the pretreatment was completed was 30 minutes.
Five substrates were placed for 2 hours, 1 day, 2 days, and 7 days. Next, the second gate valve 1O is closed, the heating table 11 is lifted to a predetermined position in the reaction vessel 14, and hydrogen, which is a carrier gas, is flowed into the vessel from the raw material gas inlet 15 while being applied to the RF coil 16. Then, trimethylgallium ((
C113)a Ga: Abbreviation TMG) and arsine gas (
AsH3) was similarly flowed into the chamber to form a 1 μm buffer layer on the GaAs substrate 13, and then hydrogen sulfide gas, which is an n-type impurity, was also flowed into the chamber to reduce the electron concentration to I.
A wafer for FET was fabricated by forming an active layer with a thickness of 0.3 μm at a thickness of 1017 cm+−′.

結晶成長を終えたGaAs基板(エピタキシャルウェハ
:略称エピウェハ)は前記の手順と逆に反応容器14か
ら搬送室12を経て予備室2まで搬送してがら扉1を開
けて取り出した。
The GaAs substrate (epitaxial wafer: abbreviated as epi-wafer) after crystal growth was transported from the reaction vessel 14 to the preliminary chamber 2 via the transport chamber 12 in the reverse order of the above-described procedure, and the door 1 was opened to take it out.

このエピウェハにショットキ電極を形成し、従来例に記
載したことと同様に電子濃度の深さ方向の分布を測定し
た。
A Schottky electrode was formed on this epitaxial wafer, and the distribution of electron concentration in the depth direction was measured in the same manner as described in the conventional example.

一連の測定の結果、第2図の矢印の位置に示すように基
板の前処理終了から加熱台に載置するまでの時間には関
係なく、同時に成長した全てのエピウェハで基板とバッ
ファ層との境界での電子濃度の異常な増加が解消され、
FET用として良好な品質の結晶ができていることが分
かり1本発明の効果が明らかとなった。
As a result of a series of measurements, as shown by the arrow in Figure 2, the relationship between the substrate and the buffer layer was observed for all epitaxial wafers that were grown at the same time, regardless of the time from the end of the substrate pretreatment until the substrate was placed on the heating table. The abnormal increase in electron concentration at the boundary is eliminated,
It was found that crystals of good quality for use in FETs were produced, and the effects of the present invention became clear.

又、上記工程で酸化膜を除去するために必要な真空度は
、I X to−’〜I X 10−”Torrまで種
々変えた実験をした結果、5 X 10”” Torr
以下であれば十分であることが分かった。
Furthermore, as a result of experiments in which the degree of vacuum required to remove the oxide film in the above step was varied from IX to -' to IX 10-" Torr, it was found to be 5 X 10" Torr.
It was found that the following is sufficient.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明の方法を用いれば半導体基板
の前処理を行う必要がなくなり、特に多数枚の基板を同
時に成長でき7る量産型MOCVD装置を用いた気相成
長法に適用して好適な、成長方法を提供できる。
As described above, the method of the present invention eliminates the need for pre-treatment of semiconductor substrates, and is especially applicable to vapor phase growth using a mass-produced MOCVD apparatus that can grow a large number of substrates at the same time. A suitable growth method can be provided.

尚、本実施例ではGaAs結晶の成長のみを記載したが
、材料はこれに限定されるわけではなく、基板表面に自
然酸化物を形成しやすい、例えばInP等のGaAs以
外のm−v族化合物半導体の結晶成長に用いて良い。
Although only the growth of GaAs crystal is described in this example, the material is not limited to this, and may be an m-v group compound other than GaAs such as InP, which easily forms a natural oxide on the substrate surface. Good for use in semiconductor crystal growth.

又、超高真空容器内での半導体基板の温度は実施例では
550℃に設定したが、用いる材料によって最適値がか
わるので、例えばInPの場合は450℃の如く適宜選
択して良い。
Further, although the temperature of the semiconductor substrate in the ultra-high vacuum container was set at 550° C. in the embodiment, the optimum value varies depending on the material used, so for example, in the case of InP, it may be selected as appropriate, such as 450° C.

【図面の簡単な説明】 第1図は本発明による■−■族化合物半導体結晶成長装
置の概略の要部を示す断面図、第2図は本発明によるF
ET用気相成長ウェハの電子濃度の深さ方向分布を示す
線図、第3図は従来例に示した■−V族化合物半導体結
晶成長装置の概略の要部を示す断面図、第4図は第3図
に示した成長装置によるFET気相成長ウェハの電子濃
度の深さ方向分布を示す線図である。 3.6・・・真空排気装置、5・・・超高真空容器、1
3、101−GaAs基板(半導体基板)、14、10
2・・・反応容器。
[Brief Description of the Drawings] Fig. 1 is a sectional view schematically showing the main parts of the ■-■ group compound semiconductor crystal growth apparatus according to the present invention, and Fig. 2 is a cross-sectional view showing the main parts of the
Figure 3 is a diagram showing the depth distribution of electron concentration in a vapor phase epitaxy wafer for ET; Figure 3 is a cross-sectional view schematically showing the main parts of the conventional ■-V group compound semiconductor crystal growth apparatus; Figure 4; 4 is a diagram showing the depth distribution of electron concentration in the FET vapor phase grown wafer using the growth apparatus shown in FIG. 3. FIG. 3.6... Vacuum exhaust device, 5... Ultra-high vacuum container, 1
3, 101-GaAs substrate (semiconductor substrate), 14, 10
2...Reaction container.

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板を超高真空容器内に内装する工程と、
該工程に連続して前記超高真空容器内を排気し少なくと
も5×10^−^9Torrの超高真空にて半導体基板
に加熱を施す工程と、該工程に連続して前記半導体基板
を前記超高真空容器内から気相成長用の反応容器内に搬
送しこれに設置された半導体基板加熱台上に載置する工
程と、前記反応容器内にIII−V族化合物半導体気相
成長用の原料ガスを導入し前記半導体基板上に前記化合
物半導体の結晶を成長させる工程を含むIII−V族化
合物半導体気相成長法。
(1) A step of placing the semiconductor substrate in an ultra-high vacuum container,
Continuing from this step, there is a step of evacuating the inside of the ultra-high vacuum container and heating the semiconductor substrate in an ultra-high vacuum of at least 5 x 10^-^9 Torr; A step of transporting from a high vacuum container to a reaction container for vapor phase growth and placing it on a semiconductor substrate heating table installed therein; A III-V compound semiconductor vapor phase growth method comprising the step of growing a crystal of the compound semiconductor on the semiconductor substrate by introducing a gas.
(2)原料ガスを、III族元素からなる少なくとも一
種類の有機化合物と、V族元素からなる少なくとも一種
類の水素化合物または有機化合物とで構成する請求項1
に記載のIII−V族化合物半導体気相成長法。
(2) Claim 1 in which the raw material gas is composed of at least one type of organic compound consisting of a group III element and at least one type of hydrogen compound or organic compound consisting of a group V element.
III-V compound semiconductor vapor phase growth method described in .
JP13824689A 1989-05-31 1989-05-31 Vapor growth method for iii-v compound semiconductor Pending JPH033321A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13824689A JPH033321A (en) 1989-05-31 1989-05-31 Vapor growth method for iii-v compound semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13824689A JPH033321A (en) 1989-05-31 1989-05-31 Vapor growth method for iii-v compound semiconductor

Publications (1)

Publication Number Publication Date
JPH033321A true JPH033321A (en) 1991-01-09

Family

ID=15217486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13824689A Pending JPH033321A (en) 1989-05-31 1989-05-31 Vapor growth method for iii-v compound semiconductor

Country Status (1)

Country Link
JP (1) JPH033321A (en)

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