JPH0330333B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention is applicable to wireless communication equipment, especially for setting channels during reception and using DTMF (Dual Tone Multi This relates to the key input method using the key matrix used for Frequency setting.

[Prior Art] In order to facilitate operation of radio communication equipment, especially portable radio equipment, there is a method of searching and automatically receiving radio waves transmitted from a large number of communication channels. There is also a method of searching and receiving only the radio waves that call your own station from a large number of transmitted radio waves. In any case, it is necessary to automatically receive all channels or a specific range of channels in sequence. This is called channel scanning reception. This scanning reception is
This is done using the CPU. For this reason, the CPU usually
A keyboard is used to output various commands to the control wireless communication device.

Figure 5 shows a wireless communication device using the CPU control method.
FIG. 3 is a block diagram of CPU control. 1 in the diagram is the CPU
P ₁ , P ₂ , and P ₄ in the CPU 1 are output ports, and P ₃ is an input I/O port. The I/O port of _P1 outputs a display signal, and the I/O port of _P2 outputs a control signal for dial tone during transmission.
DTMF generator (as it is integrated into an IC, the following
(abbreviated as DTMFIC) outputs a tone signal. This DTMF can be input as either an analog signal or a digital signal, and depending on the input signal, it generates a modulated frequency by combining two different types of low frequency signals, modulates the carrier frequency with this low frequency signal, and transmits it. .

At the receiving repeater station, the signal is converted into voice, and the repeater station connects to a public telephone line with a voice similar to that of a button-type telephone, and is used as a calling signal. _P3 and _P4 of the CPU are for the keyboard matrix, and the output from the I/O port of _P4 controls each column of the keyboard matrix 3, that is, the Y axis of the matrix that outputs low level in sequence at regular time intervals. A column selection signal is output, and a key input in a row in the X-axis direction of the key matrix is specified. The specified signal is input from the I/O port of _P3 .

The CPU has other I/O ports, but in order to support many functions, there may be a shortage of ports, making it impossible to fully utilize the functions of the OPU. Effective use of ports is desired.

[Problem to be solved by the invention]

In order to solve the above-mentioned problems, the present invention has the following features:
The purpose is to share the I/O port of the CPU, and connects the input circuit side of the keyboard key matrix and the output circuit side for inputting various commands during reception and DTMF function during transmission. By that
Saves the use of CPU I/O ports and
This measures the effective use of ports.

[Means to solve the problem]

The output path in the X-axis direction of the keyboard, which has a matrix formed by the intersection of multiple output paths in the X-axis direction and multiple input paths in the Y-axis direction into which time-division periodic signals are input, is the input path of the CPU. , and the input terminals of DTMFIC, respectively, and the Y-axis input path is connected to the time-division signal decoder output terminal of the CPU and the time-division signal decoder output terminal of DTMFIC.
Cut off the output side to the CPU key matrix,
The configuration is such that the input and output sides of the DTMFIC are shut off during the reception state.

〔Example〕

Figure 1 shows the key matrix according to the present invention.
FIG. 2 is a configuration diagram consisting of a CPU and DTMFIC.

In the figure, 1 is the CPU, 2 is the DTMFIC, and 3 is the key matrix. P ₁ , P ₂ and P ₄ of CPU 1
is the output port and P ₃ is the input port. Before explaining the operation of this circuit, I will explain P ₃ and P ₄ of the CPU.

First, the output port of P ₄ of the CPU in Figure 4 is O ₁ ,
Equipped with O ₂ , O ₃ , and O ₄ output terminals. _P4 for explanation
The output timing of is set to 1 period of 100mS. O ₁
The output is 1~25mS, 101~125mS, 201~225mS,
...outputs a high level every time. 26~ in _O2
Outputs a high level every 50mS, 126~150mS, 226~250mS,..., and outputs a high level every 50mS, 126~150mS, 226~250mS, and O ₃ outputs a high level every 51~75mS, 151~
Outputs high level every 175mS, 251~275mS,..., and outputs a high level every 175mS, 251 _~ 275mS, ..., 76~100mS, 176~200mS, 276~
Outputs high level every 300mS, output port
Connect the outputs of the O ₁ , O ₂ , O ₃ , and O ₄ terminals of P ₄ to a transistor that performs switching operation,
The output of each transistor is set to low level only during each high level output period.

Next, this will be explained together with the circuit shown in FIG. Each transistor in FIG. 4 is connected to each column of a keyboard matrix 3 consisting of four rows in the X-axis direction and four columns in the Y-axis direction. In other words, the _O1 terminal output of output port _P4 is connected to key matrix 3 through a transistor.
It is connected to one terminal of the Y-axis row of K ₁ , K ₂ , K ₃ , and K ₅ and set to a low level between 1 and 25 mS of each period. Next, from the O ₂ terminal of the output port P ₄ through the transistor, the K ₅ , K ₆ ,
Connect to one terminal of the Y-axis row of K ₇ and K ₈ and set to low level for 26-50 mS of each period. Y of key matrix K ₉ , K ₁₀ , K ₁₁ and K ₁₂ from O ₃ terminal of output port P ₄ through transistor.
Connect to the axis row and set to low level for 56 to 75mS of each cycle. In addition, the O ₄ terminal of the output port P ₄ is connected to the K ₁₃ of the key matrix 3 through the transistor.
Connect to the rows of K ₁₄ , K ₁₅ , and K ₁₆ in the Y-axis direction, and each period
Set to low level for 76-100mS.

Next, in the row in the X-axis direction where key matrices K ₁ , K ₅ , K ₉ , K ₁₃ are connected, they are connected to input port I ₁ through switching transistor Q ₁ , and K ₂ , K ₆ ,
K ₁₀ , K ₁₄ and K ₃ , K ₇ , K ₁₁ , K ₁₅ and K ₄ , K ₈ ,
Each row of K ₁₂ and K ₁₆ in the X-axis direction is a transistor.
Connect to input ports I ₂ - I ₄ through Q ₂ - _{Q 4} . The bases of transistors Q ₁ to _{Q 4} each have a resistor R ₁₃ to
A bias voltage is applied through _R14 , and the collector side is normally at a low level. In addition, the circuit of key matrix 3 is grounded with resistors R ₁₇ to _{R 20} , but if the time division signal in the Y-axis direction is not input, even if you press K ₁ to _{K 16} of matrix 3, the CPU input port I ₀ ~
No output to I ₄ . Here, key matrix 3
When _K6 is pressed and the row in the X-axis direction and the column in the Y-axis direction come into contact, the output port _O2 of CPU 1 is connected to the transistor via the transistor and key matrix.
Connect to Q ₂ and send the transistor output to the input port I ₂ of the CPU at a high level for 26 to 50 mS of each period. In CPU 1 , pressing of K ₆ can now be determined.

In FIG. 3, DTMFIC 2 is also connected.
DTMFIC 2 COL terminals 1, 2, 3, and 4 are
It is connected to each terminal O ₁ to O ₄ of the output port P ₄ of the CPU and to the column in the Y-axis direction of the key matrix 3. This means that when the output ports _O1 to _O4 of the CPU are off, each column in the Y-axis direction can be enabled or disabled by the time-division on/off signal from the DTMFIC 2 . Also, each terminal 1, 2, 3, 4 of input port ROW of DTMFIC 2 is a row in the X-axis direction of key matrix 3, for example, if the 1st terminal of ROW is
K ₁ , K ₅ , K ₉ , K ₁₃ are connected to the X-axis direction rows, and the other ROW _{2, 3, and 4 terminals are also connected to K 2} , K ₆ , K ₁₀ , K ₁₄
or K ₃ , K ₇ , K ₁₁ , K ₁₅ and K ₄ , K ₈ , K ₁₂ ,
Connect to the row in the X-axis direction of _K16 .

As can be understood from the circuit explained above, the determination by pressing key matrix 3 is made by the CPU.
This is the same as in case 1. First, assuming that one period is 100 mS, one terminal of COL is kept at a low level for each period from 1 to 25 mS, and is supplied to the columns of key matrices K ₁ , K ₂ , K ₃ , and K ₄ . Similarly, the 2nd, 3rd, and 4th terminals of COL also output the low level of each time division band to each column in the Y-axis direction. The inputs to the 1st terminal of ROW are connected to K ₁ , K ₅ , K ₉ , and K ₁₃ of the key matrix 3, and the 2nd, 3rd, and 4th terminals of ROW are also the same as the input ports of the CPU 1. Also, DTMFIC has
For each output cycle of COL's 1, 2, 3, and 4 terminals, for example, the 1st terminal is 500Hz, the 2nd terminal is 1000Hz, and the 3rd terminal is
1500Hz, 4 terminals generate 2000Hz.

On the other hand, the pressing of the X-axis direction rows of K ₁ , K ₅ , K ₉ , K ₁₃ of key matrix 3 corresponding to ROW 1 terminal is 200 Hz, and the pressing of K ₂ , K ₆ , K 10 , corresponding to ROW 2 terminal is ₂₀₀ Hz.
400 Hz for K ₁₄ in the X-axis row, 600 Hz for K ₃ , K ₇ , K ₁₁ , K ₁₅ in the X-axis row for ROW3 terminals, K ₄ , K ₈ , K ₁₂ for ROW4 terminals ，
It is assumed that 800 Hz is generated when pressing in the X-axis direction row of _K16 . If key matrix K ₁₀ is pressed then, 1500Hz for 51~75mS of each period
occurs, and 400Hz is generated by pressing _K10 , so it will be mixed in the DTMFIC to generate 1900Hz and output. This frequency has been temporarily determined for ease of explanation, and in reality, to explain it using the DTMFIC circuit shown in Figure 2, the crystal oscillator in the figure is the oscillator for the TV color bus.
It uses 3.57954MHz.

The frequencies obtained by dividing the frequency of this crystal oscillator (there are 8 frequencies between 697Hz and 1633Hz as standard DTMF) correspond to the four lines of COL1 to 4 and ROM1 to 4, and can be controlled by key matrix operation. Each single tone is obtained. The dial tone frequency by DTMFIC is output by combining separate single tones from the COL side and the ROW side, and the tone outputs such as 0 to 9 and ABCD necessary for a tone dialer can be obtained by the key matrix of COL and ROW. It will be done.

The operations of CPU1, DTMFIC, and key matrix explained above are as follows in the case of various settings at the time of reception.
Operated by CPU1. Therefore DTMFIC
Input/output functions for the key matrix are disabled, and operations such as reception frequency and mode settings, scanning settings, etc. can be performed. On the other hand, during transmission, CPU input/output ports P ₃ and P ₄ are turned off.
DTMFIC settings can be made using the keyboard key matrix.

If the output port of the CPU 1 is an open drain, use the one shown in FIG. 1 or 3, and if it is a CMOS output, add the transistor buffer shown in FIG. 4.

〔Effect of the invention〕

In this invention, the CPU's time division periodic signal is output to the key matrix only when the wireless communication device is in the receiving state. However, by connecting the key matrix and the DTMF input/output circuit, the key matrix can be output without passing through the CPU. The dial tone frequency can be output by directly inputting the value set in DTMFIC, which has the effect of saving the CPU output port.

[Brief explanation of drawings]

Figure 1 is a configuration diagram of the present invention, Figure 2 is DTMFIC
Figure 3 is an example of the operating circuit of the present invention, Figure 4 is a buffer configuration diagram of the CPU output port, and Figure 5 is an example of the buffer configuration of the CPU output port.
This is an example of a conventional circuit that controls a DTMFIC using a CPU. 1 ...CPU, 2...DTMFIC, 3...Key matrix, Q1 _{to R4 ...} Transistor, _R1 to _R24
……Resistor.

Claims (1)

[Claims] 1. In a wireless communication device that is set using the keyboard and controlled by the CPU, there are multiple output paths in the X-axis direction,
The X-axis output path of the keyboard, which has a matrix formed by intersecting a plurality of Y-axis input paths for inputting time-division periodic signals, generates a dial tone frequency with the input path of the CPU.
The Y-axis input path is connected to the time-division signal decoder output terminal of the CPU and the time-division signal decoder output terminal of the DTMFIC, respectively, and in the receiving state, the key matrix of the DTMFIC is Shut off the input/output terminals on the TUX side, make the necessary settings for communication using the keyboard, and connect the CPU to the
controls the wireless communication device, and in the transmitting state the CPU
The input/output terminals on the key matrix side of the keyboard are cut off, and the
A key input method for wireless communication equipment that outputs a dial tone frequency from the DTMFIC.