JPH0330028A - Signal processor - Google Patents

Abstract

PURPOSE:To inquire into the case of failure of a signal processor from both the hardware and the software sides by providing an instruction ROM, a program counter for designating its address, and a control part from the outside of this counter. CONSTITUTION:When running in a program part 11 of a ROM 3 is instructed to a program counter 2 from an external control part, a processor 1 executes the program part 11 from the head, jumps to an output part 21, and sends out a program stored in the output part 21 to an output port of the processor 1. With regard to other program parts 12, 13 and 14, as well, the processing is executed in the same way. In such a way, based on the external control, the program counter designates an address of the instruction ROM, and a signal processor executes a program of this address, therefore, when the processor does not operate normally, the cause of failure can be inquired into quickly from both the hardware and the software sides.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application J] The present invention relates to program counter control of a signal processor.

[Prior Art] In a conventional signal processor of this type, the program counter is incremented by 1 for each instruction fetch, as in a normal processor, and as a result, the instruction R. The contents of the OM are sequentially read out and executed.

[Problems to be Solved by the Invention] The program counter of the conventional signal processor described above cannot be controlled from the outside, so if the signal processor does not operate normally, it is difficult to investigate the cause of the failure from both hardware and software aspects. The problem was that I couldn't do it.

[Means for Solving the Problems] In order to solve the above problems, the signal processor/processor of the present invention has an instruction ROM section in which a program is stored, and a program counter that specifies the address of this instruction ROM section. and an external control section that controls the program counter section from the outside.

[Function] When the program counter section is controlled from the external control section,
The program counter section specifies the address of the instruction ROM section based on control from the external control section.
As a result, the signal processor uses instruction R
Execute the program at the specified address in OM. [Example] Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the signal processor of the present invention. In the figure, 1 is a digital signal processor (hereinafter referred to as a signal processor);
2 is a program counter located inside this signal processor l and performs program readout III1 control; 3
4 is an instruction ROM which is also located in the signal processor 1 and stores the processor to be executed by the signal processor 2, and 4 is an external control unit which controls the processor counter 2 from the outside. Next, FIG. 2 is an explanatory diagram explaining this operation. In the figure, 11 to 14 are program sections in which programs are stored, and 21 to 24 are output sections in which output programs corresponding to the programs of the program sections 11 to 14 are stored.

The operation of the signal processor configured as above will be explained based on Fig. 2. The programs stored in the program section 11, program section 12, program section 13, and program section 14 of the instruction ROM 3 are independent programs. and,
When the external control unit 4 instructs the program counter 2 to run the program in the program unit 11, the signal processor 1 executes instructions one by one from the starting address of the program in the program unit 11 according to the instructions from the program counter 2. Read and execute. Immediately before the execution of the program in the program unit 11 ends, a program is executed that detects the contents of a bus (not shown) connected to this processor 1 and jumps to output #62l. The signal processor l has an output section 2l
The program jumps to and executes the program stored in this output unit 2l, that is, the program that sends data corresponding to the contents of the bus detected above to the output port (not shown) of this processor 1. Similarly, under the control of the external control unit 4, the signal processor l executes the programs in the program unit 12, program unit 13, and program unit 14, and after the completion of each of these programs, the signal processor 1 executes the programs in the output unit 22, output unit 23, and output unit, respectively. 24 and executes a program that sends data corresponding to the detected bus contents to the output port of this processor l. In this way, by measuring the state of the port of the signal processor 1 from the outside using hardware (for example, using a synchroscope), the program section 11.
This means that the execution status of 12, 13, and 14 can be determined.
For example, when a program in a certain program section is executed and no output result is obtained on a predetermined port, it means that there is a bug in this program section, and the external control section 4 controls the program counter 2. Furthermore, the running control is performed by narrowing the execution range of the program within this program section.This makes it possible to investigate the cause of failures from both hardware and software aspects. FIG. 3 is an explanatory diagram illustrating running control of two different programs respectively stored in program section A and program section B in the instruction ROMB. The figure will be explained. Program part A and program of instruction ROM3? The programs stored in the i6B are independent programs with different contents. Then, as described above, when the external M control unit 4 instructs the program counter 2 to run the program in the program unit A,
The signal processor 1 reads instructions one by one from the top address of the program in the program section A and executes them according to instructions from the program counter 2. Immediately before the execution of the program in the program section A ends, the output section 21
Run a program that jumps to . moreover,
This signal processor 1 jumps to the output section AO and executes a program stored in this output section, that is, a program that sends data indicating the end of this program to the output port of this processor 1. Similarly, under the control of the external control unit 4, the signal processor 1 also executes the program in the program unit B, jumps to the output unit BO, and sends data indicating completion to the output port.

For example, when the external control unit 4 automatically detects the state of this output port and determines that the program in the program unit A (in this case, for example, a program that performs audio processing) has ended, the address counter 2 is It is also possible to control and execute a program in program section B (in this case, for example, a program that performs data processing).
[Effects of the Invention] As explained above, according to the signal processor of the present invention, the program counter section specifies the address of the instruction ROM section based on the control from the external control section, and the signal processor specifies the address of the instruction ROM section.
Since the program is configured to execute the program at the specified address in M, the program counter section can be controlled from the outside, and if the signal processor does not operate properly, the cause of the failure can be quickly determined from both hardware and software aspects. This effect can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the signal processor of the present invention, and FIGS. 2 and 3 are explanatory diagrams for explaining its operation. ■...Digital signal processor, 2...
Program counter, 3...Instruction R
OM, 4-...external control section.

Claims (1)

[Claims] A signal processor that processes digital signals includes an instruction ROM section in which a program is stored, a program counter section that specifies the address of this instruction ROM section, and an external device that controls this program counter section from the outside. What is claimed is: 1. A signal processor comprising: a control section; and a signal processor configured to execute a program based on an externally controlled program counter section.