JPH0329359A - Variable resistor - Google Patents

Abstract

PURPOSE:To reduce a layout area by constituting a switching element and a diffusion resistor so as not to be separated. CONSTITUTION:A first gate electrode and a second gate electrode 211a, 211b are formed between a first impurity introduction region and a second impurity introduction region 231, 232 which are of one conductivity type and which have been isolated; a third impurity introduction region 221 is formed in a semiconductor layer between the first and second gate electrodes 211a, 211b; the first and second impurity introduction regions 231, 232 are connected electrically. That is to say, the first and second gate electrodes 211a, 211b and the first to the third impurity introduction regions 231, 232, 221 constitute a switching element 241 composed of two transistors which use the third impurity introduction region 221 as a common region. In the same manner, n-pieces of switching elements 241 to 24n are formed between terminals 25 and 26; diffusion resistor 231 to 23n and the switching elements 241 to 24n are constituted so as not to be separated. Thereby, a layout area can be reduced.

Description

[Detailed Description of the Invention] [Summary] For the purpose of reducing the layout area of a variable resistor in a semiconductor integrated circuit, first and second impurity-introduced regions of one conductivity type and isolated from each other are provided. , first and second gate electrodes provided between the first and second impurity doped regions, and a third impurity doped region provided in the semiconductor layer between the first and second gate electrodes. a plurality of semiconductor elements having a plurality of semiconductor elements each having a first impurity-doped region and a second impurity-doped region electrically connected to each other with the first and second impurity-doped regions in common. , and the plurality of third impurity-introduced regions are connected to an output terminal.

[Industrial application field]

The present invention relates to a variable resistor, and particularly to a variable resistor in a semiconductor integrated circuit.

In recent years, semiconductor integrated circuits (ICs) have been required to be increasingly miniaturized, and various efforts have been made to reduce the layout area of transistors and the like, but the layout area of resistors has not been reduced much. In particular, since the variable resistor is composed of a spreading resistor and a transistor, it is necessary to reduce the layout area.

[Conventional technology]

Figure 7 (Δ>) shows a configuration diagram of an example of a conventional variable resistor. In Figure 7 (A), 11 is a unit resistor;
It consists of a plurality of spreading layers regularly formed on the top of each other by dividing them into sections of a certain length. That is, the unit resistors 11 are diffused resistors, and 62 horizontally adjacent unit resistors 11 are connected by aluminum wiring 13, and among the right and left end unit resistors 11, 62 vertically adjacent units are connected. The resistor 11 is also connected by an aluminum wiring 14. Further, among the unit resistors 11, the one at the upper left end is connected to the terminal N^, and the one at the lower right end is connected to the terminal NB.

Also, 151 to 15 are switching transistors, and one end is the end? -No, and the other end is a predetermined node N of the plurality of unit resistors 11. 1 to N.

As a result, by turning on only one arbitrary transistor among the transistors 151 to 15o, the node connected to the turned-on transistor becomes the terminal N. An equivalent circuit as shown in FIG. 7(B) is constructed, which is connected to the circuit shown in FIG. Therefore, by selecting the transistor to be turned on among the transistors 151 to 15o, various resistance voltage division ratios (resistance value between terminals NA and N, and resistance value between terminals N and N) can be set.
The ratio of the resistance value between 8 and 8 can be obtained.

Here, as shown in FIG. 8, the transistors 151 to 15o have a structure in which, for example, two drains (or sources) are formed in common.

In the figure, 161-165 are gate electrodes, 171-173
etc. are diffusion layers, 171 and 173 form the drain (or source) regions of transistors 15 and 152, and 172 forms the common source (or drain) region.
It constitutes area A. Other transistors 53-15
has a similar configuration. A common n (source or drain) region such as 172 is connected to terminal Nc. Switching signals are separately applied to gate electrodes such as 161-165.

The reason why each of the transistors 151 to 15o is configured to have two common regions is to reduce the layout area without shorting out any of the unit resistors.

[Problem to be solved by the invention]

However, the above conventional variable resistor has a unit resistance of 11
and transistors 151 to 15 are separated from each other as shown in FIGS. 7 and 8, the overall layout area is large, and the unit resistor 11 and transistors 151 to 15n are Since the number of steps is equal to the number of steps required for the voltage division resistance ratio to be varied, as the number of steps increases, the number of unit resistors 11 and transistors 15, to 15o increases. This increased the layout area.

The present invention has been made in view of the above points, and an object of the present invention is to provide a variable resistor with a reduced layout area.

[Means to solve the problem]

FIG. 1 shows a basic configuration diagram of the present invention. In the same figure, 221a
．． 221, first and second gate electrodes, 23.232
are first and second impurity-introduced regions of one conductivity type and isolated from each other, and between these are the first and second gate electrodes If+221a, 221b.
is provided.

Further, 221 is a third impurity-introduced region;
The gate electrode 211a. It is provided in the semiconductor layer between 211b. Also, 1st. Second impurity introduction region 23.2
32 is electrically connected.

In the present invention, a semiconductor element having such a configuration has the first and second impurity introduced regions hi231 and 232 in common, and n
(n is an integer of 2 or more), and the n third impurity introduced regions 221 to 22o are connected to the output terminal 27.

[Effect]

The first and second impurity introduced regions 231 and 232 described above
．． ...23n+1 is a spreading resistor formed on the semiconductor substrate. In addition, the first and second gate electrodes 21 and 21
1, and the first to third impurity introduced regions 1a 23 . 23. 221 is the third impurity introduction region 1
A switch element 241 is constituted by two transistors having two regions as a common region. Similarly, terminals 25 and 2
6, n switch elements 241 to 24o are formed.

The terminal 25 is connected to the terminal 26 in series in the order of diffused resistor 231→switch element 241・◆spreading resistor 2, 32→switch element 242→...→switch element 24n→diffused resistor 23o+1. Here, two adjacent ones of the diffused resistors (drain or source regions) 231 to 23o, 1
Since the two diffused resistors are connected, the resistance between terminals 25 and 26 is always the series combination of the diffused resistors 231 to 231, 1, and the resistance value between terminals 25 and 27 is [
When all the switch elements 241 to 24n are turned on, the resistance value of the switch element 241 is infinite, and when only the switch element 241 is on, the resistance value is due to the diffused resistor 231.
It changes by controlling the switching of ~24n.

Here, the diffused resistors 231 to 23o are the switch elements 241
It is shared with the drain or source region of the transistor constituting .about.24o. In other words, the switch element 24
1 to 24 are located within the expansion resistors 231 to 23o+1, and therefore, both are configured to be non-separable.

〔Example〕

FIG. 2 shows a configuration diagram of a variable resistance circuit according to an embodiment of the present invention. In the figure, the same components as in FIG. 1 are designated by the same reference numerals. In FIG. 2, the manufacturing method of this embodiment diffuses impurities for forming a channel into a substrate, and forms a U-shaped gate electrode 21i on a semiconductor substrate. 212, 213.・
After the gate electrode is formed, a diffusion layer of a conductivity type different from that immediately below the gate electrode is formed by a well-known method using this gate electrode as a mask. As a result, the diffusion layers 221 to 223
, 231 to 233, etc. are formed, but diffusion 11221 to
Reference numeral 223 is surrounded by two parallel parts of the gate electrodes 221 to 223, and constitutes a drain (or source) region common to the two transistors.

That is, focusing on the switch element 24,
Assuming that the gate electrode 211 consists of first and second gate electrode parts 21 and 21,b parallel to each other and an electrode part 211 connecting them 1a, the switch element 241 uses the electrode part 2118 as a gate electrode and a diffused resistor. 231 as source <<or drain>wA region, diffusion layer 22
A first transistor in which 1 is a drain (or source) region, and a second transistor in which the electrode part 211b is a gate electrode, the diffusion layer 221 is a drain (or source) region, and the diffused resistor 232 is a source (or drain) region. The first and second transistors have gate electrodes connected to each other and regions 23i and 232, respectively, and share a drain (or source) region 211.Therefore, when the switch element 241 is turned on, /Regions 231 and 232 are connected regardless of whether it is off or not.

This common drain (or source) region 221-223
etc. are connected via a terminal 27 to a non-inverting input terminal of an operational amplifier 30 constituting a voltage follower. Further, 31 is a decoder circuit whose output terminal is connected to the gate electrode 2.
The current output to the terminal 27 is changed by controlling the switching operation of the gate electrodes 211-213.

As shown in FIG. 3, the decoder circuit 31 receives input data from N
IA. NIB, NIC,”・Fill, output data NQ^
, NoB, Noc, . . . , the relationship between the two is set as shown in the following table, for example. In this embodiment, the output data is set so that only one of the numbers "1" is issued in response to the input data. Output data N. A, No. 8, No. The logic of ,... is ``1
”, the corresponding switch elements 241, 242, 2
43. ... turns on, and turns off when rOJ.

Further, in this embodiment, the equivalent circuit of the switching elements 241 to 243 and the like to which the output data of the decoder circuit 31 is input is as shown in FIG. As shown in the figure, diffused resistors 231 to 23o+1 are connected between terminals 25 and 26.
are connected in series, and one end of the switch elements 241 to 243 etc. is connected to each connection point of the diffused resistors 231 to 23o+1,
Other switches such as switch elements 241 to 243 are connected to the terminal 27.

Switching of these switching elements 241 to 243 and the like is controlled independently from each other by output data NOA to Noc'8 of the decoder circuit 31.

For example, when the switch element 241 is off, that is, when the two transistors constituting the switch element 241 are turned off at the same time, the impedance between regions 221 and 231 and between 221 and 231 is maximum.

On the other hand, when two transistors constituting switch element 241 are turned on at the same time, regions 221 and 231 .
The potentials of 232 are the same potential.

? As a result, the equivalent circuit of the embodiment shown in FIG. 2 when any one of the switch elements 24 to 243 etc. is turned on and the remaining switch elements are turned off is shown in FIG. Thus, the divided voltage determined by the ratio of R1 and R2 is input to the amplifier 30, and the output voltage VOU■ is outputted to the terminal 32.

In FIG. 5, vio is the input voltage to terminal 25, vo
oE is the output voltage of the terminal 32, R1 is the switch element 241
The diffusion resistance 2 between one end of the i-th (i = 1 to n) switch element 24i turned on among ~24o and the terminal 25
31 to 23, series combined resistance value, R2 is expansion resistor 231
The input voltage V and the output voltage V are the series composite values of +1 to 23o. The relation In of o1 is as follows.

According to this embodiment, since the diffused resistors 231 to 23o+1 and the switch elements 241 to 243, etc. are formed without being separated, the layout area can be reduced compared to the conventional one.

Furthermore, only one switch element is required to turn on, and as can be seen from FIG. Almost no current flows through the switch elements that are turned on among the switch elements 241 to 24o, and the on-resistance thereof can be ignored. Therefore, the small resistance value t,II
This is a more effective means of controlling the situation.

Furthermore, this embodiment has the advantage that it is easy to manufacture because the diffused resistors 231 to 2 3 n+1 are linearly arranged in the required number.

In this embodiment, the decoder circuit may output a plurality of "1"s as the output data. Further, since the present invention is configured to change the resistance value between the terminals 25 and 27, it is not limited to the above-mentioned embodiment. For example, as shown in FIG. 2
44 may be separately connected to the output terminals 241 to 244. In this case, the switch elements 271 to 274 are turned on simultaneously, and four types of signals divided by four different resistance voltage division ratios can be simultaneously output from the output terminals 271 to 274 in parallel.

(Effects of the Invention) As described above, according to the present invention, since the switch element and the expansion resistor are configured in a non-separated manner, the present invention has the advantage that the layout area can be reduced compared to the conventional method.

FIG. 6 is an equivalent circuit diagram of a modification of the present invention, FIG. 7 is a configuration diagram and an equivalent circuit diagram of an example of a conventional variable resistor, and FIG. 8 is a configuration diagram of an example of the main part of FIG. 7. .

In the figure, 21 to 21 211b to 21nb are gate electrodes, 1ana' 221 to 22o are third impurity introduced regions, and 23 to 2
3 n+1 is the first. The second impurity introduced region, 1241 to 24n are switch elements, and 27 is an output terminal.

[Brief explanation of drawings]

Figure 1 shows the origin of the present invention! ! ! 2 is a configuration diagram of an embodiment of the present invention, FIG. 3 is an input/output explanatory diagram of a decoder circuit, FIG. 4 is an equivalent circuit diagram of the main part of FIG. 2, and FIG. Equivalent circuit diagram when one of the switch elements shown in the figure is selected,

Claims (1)

[Claims] First and second impurity-introduced regions (23_1, 23_2) of one conductivity type and isolated from each other;
The first and second gate electrodes (21_1_a, 21_1) provided between the impurity introduced regions (23_1, 23_2)
_b), and the first and second gate electrodes (21_1_a, 21_1
_b) a third impurity doped region (22_1) provided in the semiconductor layer, and the first impurity doped region (23_1) and the second impurity doped region (23_2) are electrically connected. The semiconductor element formed by the first and second impurity-introduced regions (23_1, 23_
A variable resistor characterized in that a plurality of variable resistors (2) are connected in common, and the plurality of third impurity-introduced regions (22_1 to 22_n) are connected to an output terminal (27).