JPH03292779A - Light emitting element and manufacture thereof - Google Patents
Light emitting element and manufacture thereofInfo
- Publication number
- JPH03292779A JPH03292779A JP2095740A JP9574090A JPH03292779A JP H03292779 A JPH03292779 A JP H03292779A JP 2095740 A JP2095740 A JP 2095740A JP 9574090 A JP9574090 A JP 9574090A JP H03292779 A JPH03292779 A JP H03292779A
- Authority
- JP
- Japan
- Prior art keywords
- compound semiconductor
- semiconductor layer
- conductivity type
- light emitting
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 150000001875 compounds Chemical class 0.000 claims abstract description 93
- 239000004065 semiconductor Substances 0.000 claims abstract description 93
- 239000012535 impurity Substances 0.000 claims abstract description 17
- 238000000034 method Methods 0.000 claims abstract description 17
- 238000009792 diffusion process Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 238000000605 extraction Methods 0.000 claims description 15
- 238000000926 separation method Methods 0.000 claims description 6
- 239000011521 glass Substances 0.000 abstract description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052593 corundum Inorganic materials 0.000 abstract description 2
- 229910052698 phosphorus Inorganic materials 0.000 abstract description 2
- 239000011574 phosphorus Substances 0.000 abstract description 2
- 239000010409 thin film Substances 0.000 abstract description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 abstract description 2
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 239000012212 insulator Substances 0.000 abstract 1
- 239000011347 resin Substances 0.000 description 8
- 229920005989 resin Polymers 0.000 description 8
- 239000004020 conductor Substances 0.000 description 5
- 239000011701 zinc Substances 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 238000005286 illumination Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 229910052790 beryllium Inorganic materials 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000007791 liquid phase Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- NIXOWILDQLNWCW-UHFFFAOYSA-M Acrylate Chemical compound [O-]C(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-M 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052714 tellurium Inorganic materials 0.000 description 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
Description
【発明の詳細な説明】 産業上の利用分野 本発明は、発光素子およびその製造方法に関する。[Detailed description of the invention] Industrial applications The present invention relates to a light emitting device and a method for manufacturing the same.
従来の技術
近年、■−Ｖ化合物半導体を用いた発光素子が一般に普
及し始めている。以下、その構成について第３図を参照
しながら説明する０図に示すように、ｎ型（またはｐ型
）化合物半導体基板２１上に形成されたｎ型（またはＰ
型）化合物半導体層２２、さらにその上面に形成された
ｐ型（またはｎ型）化合物半導体層２３およびＰ（また
はｎ）電極２４、ｎ（またはｐ）電極２５より構成され
ており、電極２４と２５の間に電圧を加えることにより
化合物半導体層２２と２３間のｐ−ｎ接合部が発光し、
化合物半導体層２３を透過して照明を行っていた。BACKGROUND OF THE INVENTION In recent years, light emitting devices using -V compound semiconductors have become popular. The structure will be explained below with reference to FIG. 3. As shown in FIG.
It is composed of a p-type (or n-type) compound semiconductor layer 22, a p-type (or n-type) compound semiconductor layer 23 formed on the upper surface thereof, a P (or n) electrode 24, and an n (or p) electrode 25. By applying a voltage between the compound semiconductor layers 22 and 23, the p-n junction between the compound semiconductor layers 22 and 23 emits light.
Illumination was performed through the compound semiconductor layer 23.
発明が解決しようとする課題
このような従来の発光素子では、電極２４．２５が上下
面に分れているので、実装基板へ実装する場合、電極２
５が基板上の回路導体層の所定の位置に当接するように
金属ペーストで接続し、さらに電極２４についてはワイ
ヤボンドにより金属細線で実装基板上の回路導体層の所
定の位置へ接続するという複雑で時間の要する工程が必
要であるという課題あった。Problems to be Solved by the Invention In such a conventional light emitting element, the electrodes 24 and 25 are divided into upper and lower surfaces, so when mounting on a mounting board, the electrodes 24 and 25 are divided into upper and lower surfaces.
The electrode 24 is connected to a predetermined position of the circuit conductor layer on the mounting board using metal paste, and the electrode 24 is connected to a predetermined position of the circuit conductor layer on the mounting board using a thin metal wire using wire bonding. The problem was that it required a time-consuming process.
本発明は上記課題を解決するもので、実装が簡単で、信
頼性の高い発光素子を提供することを目的とする。The present invention solves the above problems, and aims to provide a light emitting element that is easy to mount and has high reliability.
課題を解決するための手段
本発明は上記目的を達成するために化合物半導体基板上
に形成された一導電型化合物半導体層と、その一導電型
化合物半導体層上に形成された、その一導電型化合物半
導体層と逆の導電型の化合物半導体層と、その逆の導電
型の化合物半導体層の所定部分に形成された少なくとも
一導電型化合物半導体層に達するまでその一導電型化合
物半導体層の電極取出しのためのその一導電型化合物半
導体層と同じ型の不純物拡散領域と、その不純物拡散領
域表面に形成された一導電型化合物半導体層の取出し電
極と、逆の導電型の化合物半導体層表面の所定部分に形
成されたその逆の導電型の化合物半導体層の取出し電極
と、その取出し電極と一導電型化合物半導体層の取出し
電極の間に形成された逆の導電型の化合物半導体層表面
から少なくとも一導電型化合物半導体層に達する分離層
とを涌する構成としたものである。Means for Solving the Problems In order to achieve the above objects, the present invention provides a compound semiconductor layer of one conductivity type formed on a compound semiconductor substrate, and a compound semiconductor layer of one conductivity type formed on the compound semiconductor layer of one conductivity type. A compound semiconductor layer of a conductivity type opposite to that of the compound semiconductor layer, and an electrode of the one conductivity type compound semiconductor layer formed in a predetermined portion of the compound semiconductor layer of the opposite conductivity type until reaching at least one conductivity type compound semiconductor layer. an impurity diffusion region of the same type as that one conductivity type compound semiconductor layer, an extraction electrode of the one conductivity type compound semiconductor layer formed on the surface of the impurity diffusion region, and a predetermined location on the surface of the compound semiconductor layer of the opposite conductivity type. an extraction electrode of a compound semiconductor layer of the opposite conductivity type formed in the part, and at least one portion from the surface of the compound semiconductor layer of the opposite conductivity type formed between the extraction electrode and the extraction electrode of the compound semiconductor layer of one conductivity type. This structure includes a separation layer that reaches the conductive compound semiconductor layer.
作用
本発明は上記した構成により、発光素子のｐおよびｎの
画電極が同一面（発光面）上に形成されることになるの
で、実装基板への実装の際、−度に実装基板の回路導体
層の所定の位置にフリノプチンプ実装方弐等で直接実装
が可能となり、実装工程が簡単かつ短時間となる。According to the present invention, with the above-described configuration, the p and n picture electrodes of the light emitting element are formed on the same surface (light emitting surface). Direct mounting is possible at a predetermined position on the conductor layer using a flinopchimp mounting method or the like, making the mounting process simple and short.
寞施例
以下、本発明の一実施例について第１［ｉＩＵおよび第
２図を参照しながら説明する。Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the first [iIU] and FIG.
第１図において１はＰ型ＧａＰ等の化合物半導体基板、
２はその化合物半導体基板１上に形成されたｐ型ＧａＰ
エピタキシャル層等からなる一導電型化合物半導体層、
３はその一導電型化合物半導体層２上に形成されたｎ型
ＧａＰエピタキシャル層等からなる一導電型化合物半導
体層２と逆の導電型の化合物半導体層、４はその逆の導
電型の化合物半導体層３の所定部分に形成された少なく
とも一導電型化合物半導体層２に達するまでその一導電
型化合物半導体層２の電極取出しのだめのその一導電型
化合物半導体層２と同じ型の不純物拡散領域、５はその
不純物拡散領域４の表面に形成された一導電型化合物半
導体Ｉ！２の取出し電極、６は逆の導電型の化合物半導
体層３の表面の所定部分に形成されたその逆の導電型の
化合物半導体層３の取出し電極、７は電極５と電極６の
間に形成された逆の導電型の化合物半導体層３の表面か
ら少なくとも一導電型化合物半導体層２に達する分離溝
である。In FIG. 1, 1 is a compound semiconductor substrate such as P-type GaP;
2 is a p-type GaP formed on the compound semiconductor substrate 1;
a single conductivity type compound semiconductor layer consisting of an epitaxial layer, etc.;
3 is a compound semiconductor layer of the opposite conductivity type to the one conductivity type compound semiconductor layer 2, which is formed on the one conductivity type compound semiconductor layer 2 and is formed of an n-type GaP epitaxial layer, etc., and 4 is a compound semiconductor of the opposite conductivity type. An impurity diffusion region 5 of the same type as the one conductivity type compound semiconductor layer 2 for taking out the electrode of the one conductivity type compound semiconductor layer 2 until reaching at least one conductivity type compound semiconductor layer 2 formed in a predetermined portion of the layer 3; is a one-conductivity type compound semiconductor I! formed on the surface of the impurity diffusion region 4. 2 is an extraction electrode, 6 is an extraction electrode of the compound semiconductor layer 3 of the opposite conductivity type formed on a predetermined portion of the surface of the compound semiconductor layer 3 of the opposite conductivity type, and 7 is formed between the electrode 5 and the electrode 6. This is a separation trench that reaches at least one conductivity type compound semiconductor layer 2 from the surface of the compound semiconductor layer 3 of the opposite conductivity type.
以上のように構成される発光素子の製造方法および動作
原理について説明する。The manufacturing method and operating principle of the light emitting device configured as above will be explained.
まず、グレイデイエンド フリージー（Ｇｒａｄｉｅｎ
ＬＦｒｅｅｚｅ）法や液体被覆引上法等のＧａＰ結晶製
作装置を用い、直径的１．５〜２．０インチφのＰ型Ｇ
ａＰの単結晶を作製する。この時用いるアクセプタ不純
物としてはＺｎ （亜鉛）を採用する。この単結晶を厚
さ約０．１５閣にスライスしてｐ型ＧａＰ等の化合物半
導体基板ｌを作製する。つぎに液相エピタキシャル成長
技術により先に作製した化合物半導体基板１上にｐ型Ｇ
ａＰエピタキシャル層等からなる一導電型化合物半導体
層２を厚さ約０．１１Ｉ１１程度形成する。この時のア
クセプタ不純物もＺｎを採用する。さらに、この一導電
型化合物半導体層２上に同じく液相エピタキシャル成長
技術によりｎ型Ｇａｐエピタキシャル層等からなる一導
電型化合物半導体層２と逆の導電型の化合物半導体層３
を数μｍ〜士数μｍ程度形成する。この時のドナー不純
物にはＴｅ（テルル）を採用した。これらのエピタキシ
ャル層を形成するのには、多層液相エピタキシャル成長
用スライド式成長装置を作製し、一連の作業で行９た。First of all, Gradien Freezee (Gradien
P-type G with a diameter of 1.5 to 2.0 inches is produced using GaP crystal manufacturing equipment such as the LFreeze method or the liquid coating pulling method.
A single crystal of aP is produced. Zn (zinc) is used as the acceptor impurity used at this time. This single crystal is sliced into a thickness of approximately 0.15 mm to produce a compound semiconductor substrate l such as p-type GaP. Next, a p-type G
A compound semiconductor layer 2 of one conductivity type made of an aP epitaxial layer or the like is formed to a thickness of about 0.11I11. Zn is also used as the acceptor impurity at this time. Furthermore, on this one conductivity type compound semiconductor layer 2, a compound semiconductor layer 3 of the opposite conductivity type to the one conductivity type compound semiconductor layer 2, which is made of an n-type Gap epitaxial layer or the like, is formed by the same liquid phase epitaxial growth technique.
is formed in the order of several μm to several μm. Te (tellurium) was used as the donor impurity at this time. In order to form these epitaxial layers, a sliding type growth apparatus for multilayer liquid phase epitaxial growth was fabricated, and a series of operations were performed.
つぎに、逆の導電型の化合物半導体層３上に、拡散マス
クとしてＣＶＤ法またはスパッタ法等によりＡｌ２Ｏ３
、Ｓｉ＋Ｎａ、リンガラス等の絶縁物薄膜を形成し、所
定の位置に窓を開け、不純物拡散領域４を少なくとも一
導電型化合物半導体層２に達するまで形成する。この時
の拡散源としてはＺｎを用いる。Next, Al2O3 is applied onto the compound semiconductor layer 3 of the opposite conductivity type by CVD or sputtering as a diffusion mask.
, Si+Na, phosphorus glass, or the like is formed, windows are opened at predetermined positions, and impurity diffusion regions 4 are formed up to at least one conductivity type compound semiconductor layer 2 . Zn is used as a diffusion source at this time.
つぎに、蒸着およびホトエツチングの技術により不純物
拡散領域４上にｎ側の電極５と、逆の導電型の化合物半
導体層３の所定部分にｎ側の電極６を形成する。電極材
料としては、ｎ側の電極６にはＡｕ（金）とＳｉ （シ
リコン）との合金、ｎ側の電極５にはＡｕとＢｅ （ベ
リリュウム）との合金を用いた。Next, an n-side electrode 5 is formed on the impurity diffusion region 4 and an n-side electrode 6 is formed on a predetermined portion of the compound semiconductor layer 3 of the opposite conductivity type by vapor deposition and photoetching techniques. As electrode materials, an alloy of Au (gold) and Si (silicon) was used for the n-side electrode 6, and an alloy of Au and Be (beryllium) was used for the n-side electrode 5.
最後に、ｎ側の電極６とｎ側の電極５との間に、ホトエ
ンチング技術により、逆の導電型の化合物半導体層３の
表面から少なくとも一導電型化合物半導体層２に達する
まで分離溝７を形成する。なお、以上の実施例では化合
物半導体基板１としてはｐ型ＧａＰを用いた場合につい
て述べたが、ｐ型といっても、低不純物濃度で高抵抗の
ものでもよく、ＧａＰ以外の材料にも通用できる。Finally, a separation groove 7 is formed between the n-side electrode 6 and the n-side electrode 5 from the surface of the compound semiconductor layer 3 of the opposite conductivity type until it reaches at least the compound semiconductor layer 2 of one conductivity type using a photo-etching technique. Form. In the above embodiments, the case where p-type GaP was used as the compound semiconductor substrate 1 was described, but p-type may be one with low impurity concentration and high resistance, and materials other than GaP can also be used. can.
この発光素子については、電極間に電圧をかけると逆の
導電型の化合物半導体層３と一導電型化合物半導体層２
との間のｐ−ｎ接合面に電流が流れて発光し、その光が
逆の導電型の化合物半導体層３を透して外部へ導かれ照
明を行う。In this light emitting element, when a voltage is applied between the electrodes, a compound semiconductor layer 3 of opposite conductivity type and a compound semiconductor layer 2 of one conductivity type are formed.
A current flows through the p-n junction between the two and emits light, and the light is guided to the outside through the compound semiconductor layer 3 of the opposite conductivity type to provide illumination.
つぎに以上の実施例の発光素子のアレイを実装基板に実
装する方法について第２図を参照しながら説明する。Next, a method of mounting the array of light emitting elements of the above embodiment on a mounting board will be explained with reference to FIG.
１１はその表面に回路導体層（図示せず）を有するガラ
ス基板からなる実装基板、１２は発光素子１３を実装基
板１１へ実装するための透明光硬化型絶縁樹脂、１４は
発光素子１３に設けた電極、１５は発光素子１３を保護
するためのコーティング樹脂である。11 is a mounting board made of a glass substrate having a circuit conductor layer (not shown) on its surface; 12 is a transparent photocurable insulating resin for mounting the light emitting element 13 on the mounting board 11; and 14 is a mounting board provided on the light emitting element 13. The electrode 15 is a coating resin for protecting the light emitting element 13.
以上のように構成されたＬＥＤアレイについて、その実
装方法および動作原理について説明する。The mounting method and operating principle of the LED array configured as described above will be explained.
実装基板１１上にアクリレート系の透明光硬化型絶縁樹
脂１２をスタンピング方法により所定の位置に規定量塗
布し、発光素子１３をその電極１４が実装基板１１上の
薄膜形成技術とホトリソ法を用いて形成した回路導体層
の所定の位置に当接するように配置し、上方から規定圧
力を加え、実装基板１１側から紫外線を照射し透明光硬
化型絶縁樹脂１２を硬化することにより実装する。さら
に、発光素子１３を保護するために、その上にデイスペ
ンサーによりノリコン樹脂をコーティング樹脂１５とし
て塗布して作製する。このように構成した発光素子（Ｌ
ＥＤ）のアレイについては、実装方法が簡単で短時間で
あり、またコンパクト性にすぐれている。A specified amount of acrylate-based transparent photocurable insulating resin 12 is applied to a predetermined position on the mounting board 11 by a stamping method, and the light emitting element 13 is attached to the light emitting element 13 so that its electrode 14 is formed on the mounting board 11 using a thin film forming technique and a photolithography method. The transparent photocurable insulating resin 12 is mounted by placing it in contact with a predetermined position of the formed circuit conductor layer, applying a specified pressure from above, and irradiating ultraviolet rays from the mounting board 11 side to harden the transparent photocurable insulating resin 12. Furthermore, in order to protect the light emitting element 13, Noricon resin is applied thereon as a coating resin 15 using a dispenser. The light emitting element (L
The array of ED) is easy to implement, takes a short time, and has excellent compactness.
このＬＥＤアレイに電圧を加えると、発光素子１３が発
光し、透明光硬化型絶縁樹脂１２および実装基板１１を
透過して照明を行う。この時、従来の発光素子では、実
装の際、発光面上の中心に位置した電極二二ワイヤボン
ド法により金属細線を接続しており、それによる光の遮
藪が大きかったが、本発明の発光素子では電極を小さく
しかも発光面の周辺に配置することができ、発光効率の
向上が実現できた。When a voltage is applied to this LED array, the light emitting element 13 emits light, which is transmitted through the transparent photocurable insulating resin 12 and the mounting board 11 to provide illumination. At this time, in conventional light emitting devices, when mounting, thin metal wires are connected using the electrode 22 wire bonding method located at the center of the light emitting surface, which causes a large blockage of light, but the present invention In the light-emitting element, the electrodes can be made small and placed around the light-emitting surface, resulting in improved luminous efficiency.
発明の効果
以上の実施例から明らかなように本発明によれば、同一
平面上に、ｐおよびｎ側の取出し電極を形成しているの
で、ワイヤボンドの必要性もなく、実装基板への実装が
非常に容易で、かつワイヤによる光の遮蔽もなく発光効
率も向上し、安価で高品質、高効率の発光素子を提供で
きる。Effects of the Invention As is clear from the above embodiments, according to the present invention, the p-side and n-side extraction electrodes are formed on the same plane, so there is no need for wire bonding, and mounting on the mounting board is easy. It is very easy to do this, there is no need to block light with wires, the luminous efficiency is improved, and an inexpensive, high-quality, highly efficient light-emitting element can be provided.
第１図は本発明の一実施例の発光素子の断面図、第２図
は同発光素子のアレイを実装基板に実装した場合の断面
図、第３図は従来の発光素子の断面図である。
■・・・・・・化合物半導体基板、２・・・・・・一導
電型化合物半導体層、３・・・・・・逆の導電型の化合
物半導体層、４・・・・・・不純物拡散領域、５・・・
・・・一導電型化合物半導体層の取出し電極、６・・・
・・・逆の導電型の化合物半導体層の取出し電極、７・
・・・・・分離溝。FIG. 1 is a sectional view of a light emitting device according to an embodiment of the present invention, FIG. 2 is a sectional view of an array of the same light emitting devices mounted on a mounting board, and FIG. 3 is a sectional view of a conventional light emitting device. . ■... Compound semiconductor substrate, 2... Compound semiconductor layer of one conductivity type, 3... Compound semiconductor layer of opposite conductivity type, 4... Impurity diffusion Area, 5...
...Extraction electrode of one conductivity type compound semiconductor layer, 6...
... Extraction electrode of compound semiconductor layer of opposite conductivity type, 7.
...Separation groove.
Claims (2)
半導体層と、その一導電型化合物半導体層上に形成され
たその一導電型化合物半導体層と逆の導電型の化合物半
導体層と、その逆の導電型の化合物半導体層の所定部分
に形成された少なくとも前記一導電型化合物半導体層に
達するまでその一導電型化合物半導体層の電極取出しの
ためのその一導電型化合物半導体層と同じ型の不純物拡
散領域と、その不純物拡散領域表面に形成された前記一
導電型化合物半導体層の取出し電極と、前記逆の導電型
の化合物半導体層表面の所定部分に形成されたその逆の
導電型の化合物半導体層の取出し電極と、その取出し電
極と前記一導電型化合物半導体層の取出し電極の間に形
成された前記逆の導電型の化合物半導体層表面から少な
くとも前記一導電型化合物半導体層に達する分離溝とを
有する発光素子。(1) A compound semiconductor layer of one conductivity type formed on a compound semiconductor substrate, a compound semiconductor layer of the opposite conductivity type to the compound semiconductor layer of one conductivity type formed on the compound semiconductor layer of one conductivity type, and A compound semiconductor layer of the same type as that of the one conductivity type compound semiconductor layer for taking out an electrode of the one conductivity type compound semiconductor layer formed in a predetermined portion of the compound semiconductor layer of the opposite conductivity type until reaching at least the one conductivity type compound semiconductor layer. an impurity diffusion region, an extraction electrode of the compound semiconductor layer of one conductivity type formed on the surface of the impurity diffusion region, and a compound of the opposite conductivity type formed in a predetermined portion of the surface of the compound semiconductor layer of the opposite conductivity type. an extraction electrode of the semiconductor layer; and a separation groove extending from the surface of the compound semiconductor layer of the opposite conductivity type to at least the one conductivity type compound semiconductor layer formed between the extraction electrode and the extraction electrode of the one conductivity type compound semiconductor layer. A light emitting element comprising:
より一導電型の化合物半導体層を形成する工程と、その
一導電型の化合物半導体層上にエピタキシャル成長技術
により前記一導電型の化合物半導体層と逆の導電型の化
合物半導体層を形成する工程と、その逆の導電型の化合
物半導体層の所定の部分に少なくとも前記一導電化合物
半導体層に対するまでその一導電型化合物半導体層の電
極取出しのためのその一導電型化合物半導体層と同じ型
の不純物拡散領域を形成する工程と、その不純物拡散領
域表面に前記一導電型化合物半導体層の取出し電極を形
成する工程と、前記逆の導電型の化合物半導体層表面の
所定部分にその逆の導電型の化合物半導体層の取出し電
極を形成する工程と、その取出し電極と前記一導電型化
合物半導体層の取出し電極の間に前記逆の導電型の化合
物半導体層表面から少なくとも前記一導電型化合物半導
体層に達する分離溝を形成する工程とを有する発光素子
の製造方法。(2) Forming a compound semiconductor layer of one conductivity type on a compound semiconductor substrate by epitaxial growth technology; and forming a compound semiconductor layer of one conductivity type on the compound semiconductor layer of the opposite conductivity type by epitaxial growth technology. forming a compound semiconductor layer of the one conductivity type in order to take out an electrode of the one conductivity type compound semiconductor layer at least to the one conductivity type compound semiconductor layer at a predetermined portion of the compound semiconductor layer of the opposite conductivity type; A step of forming an impurity diffusion region of the same type as the compound semiconductor layer, a step of forming an extraction electrode of the compound semiconductor layer of one conductivity type on the surface of the impurity diffusion region, and a step of forming a predetermined surface of the compound semiconductor layer of the opposite conductivity type. a step of forming an extraction electrode of a compound semiconductor layer of the opposite conductivity type on the part, and a step of forming at least the A method for manufacturing a light emitting device, comprising the step of forming a separation groove reaching one conductivity type compound semiconductor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2095740A JPH03292779A (en) | 1990-04-10 | 1990-04-10 | Light emitting element and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2095740A JPH03292779A (en) | 1990-04-10 | 1990-04-10 | Light emitting element and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03292779A true JPH03292779A (en) | 1991-12-24 |
Family
ID=14145889
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2095740A Pending JPH03292779A (en) | 1990-04-10 | 1990-04-10 | Light emitting element and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03292779A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6060727A (en) * | 1994-08-11 | 2000-05-09 | Rohm Co., Ltd. | Light emitting semiconductor device |
| KR100789112B1 (en) * | 2002-02-06 | 2007-12-26 | 주식회사 엘지이아이 | Method for manufacturing a light emitting device made from a chemical compound semiconductor |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS546787A (en) * | 1977-06-17 | 1979-01-19 | Matsushita Electric Ind Co Ltd | Luminous element |
| JPS57139976A (en) * | 1981-02-23 | 1982-08-30 | Omron Tateisi Electronics Co | Light emitting/receiving device |
-
1990
- 1990-04-10 JP JP2095740A patent/JPH03292779A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS546787A (en) * | 1977-06-17 | 1979-01-19 | Matsushita Electric Ind Co Ltd | Luminous element |
| JPS57139976A (en) * | 1981-02-23 | 1982-08-30 | Omron Tateisi Electronics Co | Light emitting/receiving device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6060727A (en) * | 1994-08-11 | 2000-05-09 | Rohm Co., Ltd. | Light emitting semiconductor device |
| KR100789112B1 (en) * | 2002-02-06 | 2007-12-26 | 주식회사 엘지이아이 | Method for manufacturing a light emitting device made from a chemical compound semiconductor |
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