JPH0329197B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a wiring device having wiring for transmitting a plurality of signals, and particularly to a wiring device for driving a matrix suitable for use in photo sensors and the like.

[Prior art]

The conventional technology will be described below using a photo sensor as an example.

2. Description of the Related Art Conventionally, a one-dimensional silicon photodiode type photo sensor array is generally known as a photoelectric conversion device section of a facsimile device, for example.
In addition, in recent years, thin or thick films deposited using a film forming method using a vacuum device such as glow discharge, sputtering, ion plating, or vacuum evaporation, or a method of coating by mixing with a binder resin, etc. Progress is being made in the development of a longer photo sensor array that is fabricated by laminating layers of photo sensor arrays that do not require a lens system to reduce the size of the document.

There are two main types of methods for such elongated photo sensor arrays: In other words, there are two types: the coplanar photoconductive type and the Sand-Deutsch photovoltaic type. Although the coplanar photoconductive type is inferior to the Sand-Deutsch photovoltaic type in terms of photoresponse speed, it has a higher sensitivity, that is, the magnitude of the photocurrent. It has been shown experimentally and theoretically that for the same pixel area and the same amount of light, it is approximately 100 times larger than the photovoltaic type.

Utilizing this characteristic that the photocurrent is large, a real-time readout method (a method of amplifying and outputting the photocurrent in real time without accumulating the photocurrent) becomes possible. Furthermore, since the real-time readout method has a fast readout speed per pixel (no storage time is required), it is possible to use a matrix readout method in which a one-dimensional long photo sensor array is divided into a certain number of sensors and read out. It is.

In the matrix readout method described above, as shown in FIG. A one-dimensional length having m×n individual electrodes provided independently for each photoelectric conversion element, and a photoelectric conversion layer between the common block electrode 2 and the independently provided individual electrodes. A photo sensor array unit 4, a voltage application circuit 6 that sequentially applies voltage to the n common electrodes, m×n
It consists of a scanning circuit section which inputs photocurrents output in parallel from m photoelectric conversion elements and outputs them in series, and a matrix wiring section 8.

FIG. 2 is a sectional view of a matrix wiring board 9 on which a matrix circuit section 8 for performing this matrix readout is formed, in which a first wiring layer 12, an insulating layer 14, and a second wiring layer 16 are formed on a substrate 10. is,
The first wiring layer 12 and the second wiring layer 16 are partially connected by through-hole contact portions 18 .

FIG. 3 is a configuration diagram of the matrix circuit section 8, where 20 is the first wiring on the first wiring layer 12 (FIG. 2), and 22 is the second wiring on the second wiring layer 16 (FIG. 2). be.

However, in the case of this matrix readout method,
Although the circuit configuration is simplified, the wiring section becomes complicated and the area of the wiring section becomes large.

In particular, when the number of pixels becomes large and m x n becomes large, for example, when reading A4 size at 8pel/mm,
m×n=1728, and in order to maximize the reading speed, from the relationship m≒n≒√×, generally m=32; n=54 or m=48; n=36 (or m=64, n=27) is adopted. The value of m is determined depending on how many channels can be integrated in the circuit section, but in order to reduce the cost of the circuit section, it is desirable to reduce the number of channels, that is, the value of m, as much as possible. As a result, the distribution of m = 32; n = 54 is common, but in this case, the number of common block electrode wirings is
The matrix wiring part on the individual electrode side requires 1728 individual electrodes and 32 wires crossing them, and the number of through holes is 32 x 54 = 1728, and 32 intersections (32-1 )/2×54=26784 points are required.

In this way, when a matrix readout method is adopted in a one-dimensional long photo sensor array, the number of wires and wiring density in the wiring section of the matrix circuit section 8 increase, and the length of the wires also increases, resulting in an increase in the number of wires per readout line. This increases the distributed capacitance of the photo sensor, which in turn increases the output error of the photo sensor as will be described later.

Let us now consider the relationship between distributed capacitance and output error. For example, an equivalent circuit in the case of matrix wiring of 5 bits×N blocks is shown in FIG. In FIG. 4, attention is paid to a certain bit during photocurrent readout, and FIG. 5 shows an approximate equivalent circuit.

In FIG. 5, reference numeral 24 represents a selected sensor, 26 a non-selected sensor, 28 a matrix intersection, and 30 a matrix line intersection, _C3 the matrix intersection capacitance, and _C4 the matrix line capacitance. In the case of A4 size (32 bits x 54 blocks), the matrix crossing capacitance _C3 and the matrix line capacitance _C4 are expressed by the following formula.

C ₃ = (intersection capacity per point) x (number of intersections) = (
Crossing capacity per point) × (Number of bits in 1 block - 1) × (Number of blocks)
= (crossing capacity per point) x (32-1) x 54 = (crossing capacity per point) x 16
74...(1) C ₄ = Capacitance for the adjacent wires = C ₄ ' x 1 (For the wires located at both ends of the block)... (2a) = C ₄ ' x 1 (For the wires located at both ends of the block Regarding the wiring)...(2a) C ₄ ' x 2 (About the wiring excluding both ends within the block)...
(2b) (Note) Note C ₄ ′...Line capacitance for one side of the adjacent wiring Next, the crossover capacitance C ₃ and the matrix line capacitance
Calculate the value of C ₄ .

First, calculate the value of _C3 . Figure 6 shows the first wiring 2
For example, when the pixel density is 8 pel/mm, the wiring width l ₁ of the first wiring layer 12 is usually 65 μm, and the wiring gap l ₃ = 60 μm.
The wiring width l ₂ of the second wiring layer 16 = 150 μm,
Wiring gap 2l ₄ = 150 μm, thickness of insulating layer 14 d = 20 μm
m, and the insulating layer specific inductivity ε _r =4. Therefore, the crossover capacitance C ₃ is determined by equation (1) as follows: C ₃ = ε _p ε _r S/d×1674 = 8.854×10 ^-12 ×4×65×10 ^-6 ×150×10 ^-6 /(20×10 ^-6 ) x 1674 = 29pF.

Also, (2a) and (2b) of matrix line capacitance _C4
Find C ₄ ' in the equation.

C ₄ ′=εo(1+εs)/2・K′(k)/K(k)
・L...(3) L is the wiring length, K(k) and K'(k) are the complete elliptic integral and complement with k as a parameter, and ε _s is the specific inductivity of the substrate.

Here, k=l ₂ /l ₂ +l ₄ , so in equation (3), l ₂ = 150 μm, 2l ₄ = 150 μm,
By substituting L=250mm, C ₄ '≒10pF becomes (2a), and by substituting this into equation (2b), C ₄ = 10pF (wiring located at both ends within the block) 20pF (wiring excluding both ends within the block) becomes.

Considering actual reading here, per pixel
Assuming that it is read in 10 μs, the reading speed for A4 size (1728 bits) is 10 μs x 1728 bits = 17.28 ms/line. At this reading speed, in the case of the circuit shown in Figure 4, it depends on the performance of the amplifier, but approximately
The relationship between input capacitance C _IN and output error as shown in the figure was obtained through simulation and experiment. Here, the input capacitance C _IN includes all capacitances from C ₁ to C ₅ . As shown in FIG. 7, as the input capacitance C _IN increases, the absolute value of the output error increases linearly.

As discussed above, when a matrix readout method is adopted in a one-dimensional long photo sensor array, the wiring section of the matrix circuit section 8 has an increase in the number of wires and wiring density, and as a result of an increase in the length of the wires, the number of wires per readout line has increased. The distributed capacitance increases and the output error of the photo sensor increases.

Further, in the conventional example shown in FIG. 3, since the wirings 22a and 22b on both sides of the second wiring 22 have wiring only on one side, the wiring portion is 1/2 that of the other wiring portion as shown in equation (3). Since the overall input capacitance is smaller on both sides, the distributed capacitance per readout line will vary, and the output error of the photo sensor will also vary, which will affect the reading accuracy and reading speed of the photoelectric conversion reader. It caused a problem.

〔the purpose〕

An object of the present invention is to provide a wiring device that reduces variations in transmission signals among a plurality of wiring lines for transmitting signals.

〔composition〕

According to the present invention, in a wiring device having a wiring section on a base, the wiring section includes a first wiring group consisting of a plurality of wirings for transmitting signals, and a first wiring group that is longer than the wirings and is longer than the first wiring group. A second wire consisting of a plurality of wires for transmitting signals provided to intersect with the wire group
a wiring group, a third wiring provided on both sides of the second wiring group, and an insulating layer sandwiched between the first wiring group and the second wiring group, A wiring device is provided, wherein a first wiring group and the second wiring group are connected via a through hole provided in the insulating layer.

[Operation and Effect] According to the present invention, dummy wiring as the third wiring is provided on both sides of the second wiring group, which is made up of a plurality of long wirings that intersect with the first wiring group and transmit signals. Accordingly, capacitance is additionally given to the wires at both ends of the second wire group, and variations in line capacitance are reduced. Accordingly, variations in transmitted signals are reduced. Therefore, when applied to a photoelectric conversion element, it is possible to improve reading accuracy.

〔Example〕

Embodiments of the present invention will be described in detail below based on the drawings.

FIG. 8 shows a first embodiment of the present invention.
In the embodiment, dummy wirings 34a and 34b are provided on both sides of the outermost wiring of the second wiring 22 provided in the second wiring layer 16. By providing this dummy wiring, the second wiring 2 of the second wiring layer 16
The line capacitance C ₄ of 2 is the line capacitance with the wiring on both sides (that is, the capacitance expressed by equation (2b)),
It is possible to eliminate variations in wiring distribution capacitance. As a result, the output error becomes the same for each bit, and the output error can be easily corrected.

FIG. 9 shows a second embodiment of the present invention;
The feature of this embodiment is that the dummy wiring 34
a, 34b are provided, and the wiring widths of the first wiring 20 provided in the first wiring layer 12 and the second wiring 22 provided in the second wiring layer 16 are made smaller than the through-hole contact portion 18, and the crossing portion 32 (6th
This is to reduce the area of the cross section (Fig.) and the cross section capacitance _C3 . As the crossover capacitance _C3 decreases,
Since C _IN is reduced, the output error of the photo sensor can be reduced.

[Brief explanation of the drawing]

Figure 1 is a schematic circuit diagram of the photoelectric conversion device, Figures 2 and 3 are a sectional view and configuration diagram of the matrix wiring board, respectively, Figure 4 is an equivalent circuit diagram of the matrix circuit section, and Figure 5 is the same as Figure 4. 6 is an enlarged view of the intersection of the first wiring layer and the second wiring layer, FIG. 7 is a graph showing the relationship between output error and input capacitance, and FIG. 8 is an approximate equivalent circuit diagram for any arbitrary bit in the circuit. , and FIG. 9 are enlarged views of the intersection of the first wiring layer and the second wiring layer according to the first and second embodiments of the present invention, respectively. In the figure, 9...matrix wiring board, 10...
...Substrate, 12...First wiring layer, 14...Insulating layer,
16...Second wiring layer, 18...Through hole contact portion, 20...First wiring, 22...Second wiring, 34a, 34b...Dummy wiring.

Claims (1)

[Scope of Claims] 1. A wiring device having a wiring section on a base, wherein the wiring section includes a first wiring group consisting of a plurality of wirings for transmitting signals, and a first wiring group that is longer than the wirings and that is longer than the first wiring group. A second wire consisting of a plurality of wires for transmitting signals provided to intersect with the wire group of
a wiring group, a third wiring provided on both sides of the second wiring group, and an insulating layer sandwiched between the first wiring group and the second wiring group, A wiring device characterized in that the first wiring group and the second wiring group are connected via a through hole provided in the insulating layer. 2. The wiring device according to claim 1, wherein the first wiring group is connected to a plurality of photoelectric conversion elements of a photo sensor, and the second wiring group is connected to a scanning circuit. . 3. The wiring device according to claim 2, wherein the first wiring group includes a number of wirings that is an integral multiple of the number of wirings in the second wiring group.