JPH03290956A - Lead frame material for plastic package - Google Patents

Lead frame material for plastic package

Info

Publication number
JPH03290956A
JPH03290956A JP2092553A JP9255390A JPH03290956A JP H03290956 A JPH03290956 A JP H03290956A JP 2092553 A JP2092553 A JP 2092553A JP 9255390 A JP9255390 A JP 9255390A JP H03290956 A JPH03290956 A JP H03290956A
Authority
JP
Japan
Prior art keywords
chip
thermal expansion
low thermal
lead frame
substrate material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2092553A
Other languages
Japanese (ja)
Inventor
Yasuyuki Nakamura
恭之 中村
Arata Nemoto
新 根本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Proterial Ltd
Original Assignee
Sumitomo Special Metals Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Special Metals Co Ltd filed Critical Sumitomo Special Metals Co Ltd
Priority to JP2092553A priority Critical patent/JPH03290956A/en
Priority to KR1019900012272A priority patent/KR940010910B1/en
Priority to DE69026072T priority patent/DE69026072T2/en
Priority to EP90309862A priority patent/EP0450223B1/en
Publication of JPH03290956A publication Critical patent/JPH03290956A/en
Priority to US07/979,489 priority patent/US5355017A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]

Abstract

PURPOSE:To enable reduction of warp or the like on the base side at the time when a semiconductor chip is mounted and heated, and thereby to prevent a damage of the chip such as exfoliation or cracking, by cladding a leaf of a metal of low thermal expansion in the shape of a spot partially on the rear side of a surface whereon the chip is to be mounted. CONSTITUTION:A leaf 11 of a metal material of low thermal expansion having prescribed dimensions is bonded and arranged at prescribed intervals on the necessary surface side of a strip-shaped Cu base material 10 constituted of copper or a copper alloy, so that a spot-shaped partial clad material be constructed. In more detail, the strip-shaped Cu base material 10 is die-cut into a plurality of lead frames of a necessary pattern in the longitudinal direction thereof. Then, the leaf 11 having prescribed dimensions is welded with pressure at positions in the longitudinal direction of the base material 10 whereat islind parts are to be formed, and on a surface on the rear side being reverse to a surface on the side whereon a semiconductor chip is to be mounted, and it is arranged at prescribed intervals in the longitudinal direction. According to this constitution, radiation of heat is very excellent and, moreover, warp on the base side at the time of heating is very small since the necessary leaf 11 is welded with pressure on or buried in the rear side of each island part whereon the chip is to be mounted. Thus, prevention of exfoliation of a bonding interface of the chip with the island is enabled and reliability can be improved.

Description

【発明の詳細な説明】 利用産業分野 この発明は、プラスチックスで封着した半導体パッケー
ジにおいて、大容量化した半導体チップを搭載した際の
熱放散性にすぐれ、かつチップとの熱膨張係数の不整合
に伴うチップ損傷を防止したCu系リードフレーム用材
料に係り、Cu系リードフレーム用材料の半導体チップ
搭載予定面の裏面側に低熱膨張金属箔をスポット状に部
分クラッドし、熱放散性にすぐれたCu系材料の大容量
半導体チップとの熱的接合性を改善し、チップ搭載加熱
時の基板のそり等を低減して剥離あるいは割れ等のチッ
プ損傷を防止したプラスチックスパッケージ用リードフ
レーム材料に関する。
[Detailed Description of the Invention] Field of Application This invention provides a semiconductor package sealed with plastic that has excellent heat dissipation properties when a large-capacity semiconductor chip is mounted, and has a thermal expansion coefficient that is similar to that of the chip. Regarding the Cu-based lead frame material that prevents chip damage due to alignment, low thermal expansion metal foil is partially clad in spots on the back side of the surface where the semiconductor chip is to be mounted on the Cu-based lead frame material, resulting in excellent heat dissipation. This invention relates to lead frame materials for plastic packages that improve thermal bonding properties with large-capacity semiconductor chips made of Cu-based materials, reduce warping of substrates during chip mounting heating, and prevent chip damage such as peeling or cracking. .

背景技術 半導体パッケージの集積回路チップ(以下チップ)、と
りわけ、大型コンピューター用のLSIやULSIは、
高集積度化、演算速度の高速化の方向に進んでおり、作
動中における消費電力の増加に伴う発熱量が非常に大き
くなっている。
Background Art Integrated circuit chips (hereinafter referred to as chips) in semiconductor packages, especially LSIs and ULSIs for large computers,
The trend is toward higher integration and faster calculation speeds, and the amount of heat generated during operation is increasing due to increased power consumption.

すなわち、チップは大容量化して、発熱量が大きくなっ
ており、基板材料の熱膨張係数がチップ材料であるシリ
コンやガリウムヒ素等と大きな差があると、チップが剥
離あるいは割れを生ずる問題がある。
In other words, chips have become larger in capacity and generate more heat, and if the coefficient of thermal expansion of the substrate material is significantly different from that of the chip material, such as silicon or gallium arsenide, there is a problem that the chip may peel off or crack. .

これに伴ない、半導体パッケージの設計も、熱放散性を
考慮したものとなり、チップを搭載する基板にも放熱性
が要求されるようになり、基板材料の熱伝導率が大きい
ことが求められている。
Along with this, the design of semiconductor packages has also begun to take heat dissipation into consideration, and the substrate on which the chip is mounted is also required to have heat dissipation, and the substrate material is required to have high thermal conductivity. There is.

第6図に示す如き、樹脂封止の半導体パッケージにおい
ては、リードフレームがチップの外部への電気的接続の
経路となるだけでなく、チップで発生する熱の放散経路
として重要な役割を果している。
In a resin-sealed semiconductor package as shown in Figure 6, the lead frame not only serves as a route for electrical connections to the outside of the chip, but also plays an important role as a dissipation route for the heat generated in the chip. .

すなわち、プラスチックスパッケージにおいて、チップ
(2)はリードフレーム(1)の中央部に形成されるア
イランド(11)に載置され、ろう材や接着材、はんだ
等にて固着されるとともに、内部リード(12)とボン
ディングワイヤ(3)を介して電気的に接続され、さら
に周囲を樹脂(4)にて封止されている。
In other words, in a plastic package, a chip (2) is placed on an island (11) formed in the center of a lead frame (1), and is fixed with brazing material, adhesive, solder, etc., and is connected to internal leads. (12) and is electrically connected via a bonding wire (3), and the periphery is further sealed with resin (4).

チップ(2)から発生する熱は、アイランド(1□)、
樹脂(4)、内部リード(12)という経路にてリード
フレーム(1)の外部リード(13)に達し、樹脂(4
)外面と合わせて外部に放散されることになる。
The heat generated from the chip (2) is transferred to the island (1□),
It reaches the external lead (13) of the lead frame (1) through the resin (4) and internal lead (12), and the resin (4)
) will be dissipated to the outside together with the outer surface.

従って、リードフレーム(1)には、チップから発生す
る熱を半導体パッケージの外部に放散するために熱伝導
率の良い材料が望まれる。
Therefore, a material with good thermal conductivity is desired for the lead frame (1) in order to dissipate the heat generated from the chip to the outside of the semiconductor package.

上述したようにプラスチックス半導体パッケージにおけ
るリードフレームには、従来から、熱の放散性の観点か
ら熱伝導率の良い銅合金からなるリードフレームが多用
されている。
As described above, from the viewpoint of heat dissipation, lead frames made of copper alloys with good thermal conductivity have been widely used as lead frames in plastic semiconductor packages.

ところが、高信頼性を要求される用途には、銅合金は、
チップとの熱膨張係数の整合性が悪く、チップとアイラ
ンドとの接着界面の剥離やチップの割れ等が懸念される
ため、チップとの熱膨張係数の整合性から42%Ni−
Fe合金等の低熱膨張係数を有するNi−Fe系合金を
採用した半導体パッケージも提案されている。
However, for applications that require high reliability, copper alloys are
Due to poor consistency in thermal expansion coefficient with the chip, there are concerns about peeling of the adhesive interface between the chip and the island, cracking of the chip, etc. Therefore, 42%Ni-
Semiconductor packages employing Ni--Fe alloys having a low coefficient of thermal expansion, such as Fe alloys, have also been proposed.

しかし、Ni−Fe系合金は熱伝導率が悪いため、現在
の要求を満すだけの熱の放散性が得られていない。また
、チップと封止樹脂との熱膨張差は非常に大きく、リー
ドフレームとチップとの熱膨張係数の整合性がよい場合
でも、リードフレームと樹脂との間の整合性が悪く、封
止樹脂に発生するクラックを完全に防止することは困雌
であった。
However, since Ni--Fe alloys have poor thermal conductivity, they do not have sufficient heat dissipation properties to meet current requirements. In addition, the difference in thermal expansion between the chip and the encapsulating resin is very large. It was difficult to completely prevent cracks from occurring in the steel.

発明の目的 この発明は、上述したプラスチックスパッケージにおけ
るCu系リードフレーム材のチップとの熱的整合性が得
られない問題に鑑み、熱放散性にすぐれたCu系材料の
大容量半導体チップとの熱的接合性を改善し、チップ搭
載加熱時の基板のそり等を低減して剥離あるいは割れ等
のチップ損傷を防止したプラスチックスパッケージ用リ
ードフレーム材料の提供を目的としている。
Purpose of the Invention In view of the above-mentioned problem of inability to achieve thermal compatibility with a Cu-based lead frame material with a chip in a plastic package, the present invention proposes a method of combining a large-capacity semiconductor chip made of a Cu-based material with excellent heat dissipation properties. The purpose of the present invention is to provide a lead frame material for plastic packages that has improved thermal bonding properties, reduces warping of the substrate during heating for mounting a chip, and prevents chip damage such as peeling or cracking.

発明の概要 この発明は、熱の放散性にすぐれる銅または銅合金板と
、大容量チップとの熱的接合性の改善を目的に、チップ
搭載加熱時のアイランド部のわん曲について種々検討し
た結果、半導体チップ搭載予定面の裏面側に低熱膨張金
属箔をスポット状に部分クラッドすることにより、チッ
プ搭載加熱時の基板側のそり等を低減でき、剥離あるい
は割れ等のチップ損傷を防止できることを知見したもの
である。
Summary of the Invention This invention was made by conducting various studies on the curvature of the island portion during heating when mounting the chip, with the aim of improving thermal bonding between a copper or copper alloy plate that has excellent heat dissipation properties and a large-capacity chip. As a result, by partially cladding the back side of the surface where the semiconductor chip is planned to be mounted with low thermal expansion metal foil in the form of spots, it is possible to reduce warpage on the board side during chip mounting heating, and to prevent chip damage such as peeling or cracking. This is what I found out.

すなわち、この発明は、 帯状の基板材から打ち抜き等の加工成形したリードフレ
ームのアイランド部に半導体チップを搭載して樹脂封着
するプラスチックスパッケージに用いる帯状の銅または
銅合金板からなるリードフレーム材料において、 基板材の長手方向の各アイランド部予定位置で、かつ半
導体チップの非搭載表面に所定寸法の低熱膨張金属材料
箔を圧接して所定間隔で配列したスポット状部分クラッ
ド材であることを特徴とするプラスチックスパッケージ
用リードフレーム材料である。
That is, the present invention provides a lead frame material made of a strip-shaped copper or copper alloy plate used for a plastic package in which a semiconductor chip is mounted on an island portion of a lead frame formed by processing such as punching from a strip-shaped substrate material and sealed with resin. The method is characterized in that it is a spot-shaped partial cladding material in which low thermal expansion metal foils of a predetermined size are pressure-bonded to the surface of each island portion in the longitudinal direction of the substrate and on which no semiconductor chip is mounted and arranged at predetermined intervals. It is a lead frame material for plastic packages.

図面に基づ〈発明の開示 第1図はこの発明によるリードフレーム材料の斜視説明
図である。第2図a、b、cはこの発明によるリードフ
レーム材料のクラッドした低熱膨張金属材料箔を示す縦
断説明図である。第3図はこの発明に用いる低熱膨張金
属材料箔の一例を示す斜視説明図である。第4図a、b
、cはこの発明によるリードフレーム材料を用いたプラ
スチックスパッケージの縦断説明図である。第5図aは
クラッドする低熱膨張金属材打箔と基板材との厚み比と
わん曲係数との関係を示すグラフであり、同図すは試験
材の斜視説明図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a perspective view of a lead frame material according to the present invention. FIGS. 2a, 2b, and 2c are longitudinal sectional views showing a low thermal expansion metal foil clad with a lead frame material according to the present invention. FIG. 3 is a perspective explanatory view showing an example of a low thermal expansion metal material foil used in the present invention. Figure 4 a, b
, c are vertical cross-sectional views of a plastic package using the lead frame material according to the present invention. FIG. 5a is a graph showing the relationship between the thickness ratio of the low thermal expansion metal stamped foil for cladding and the substrate material and the curvature coefficient, and is a perspective explanatory view of the test material.

胆 この発明によるリードフレーム材料は、第1図に示す如
く、銅または銅合金からなる帯状のCu系基板材(10
)の所要面側に、所定寸法の低熱膨張金属材打箔(11
)を接合して所定間隔で配列したスポット状部分クラッ
ド材である。
As shown in FIG. 1, the lead frame material according to the present invention is a strip-shaped Cu-based substrate material (10
) is stamped with low thermal expansion metal foil (11
) are bonded and arranged at predetermined intervals.

詳述すると、帯状のCu系基板材(10)Jよその長手
方向に複数個の所要パターンのリードフレームに打ち抜
き成形するが、Cu系基板材(1o)の長手方向の各ア
イランド部予定位置で、かつ半導体チップの搭載側表面
とは逆の裏面側表面に、所定寸法の低熱膨張金属材打箔
(11)を圧接して長手方向に所定間隔で配列したもの
である。
To be more specific, lead frames with a plurality of required patterns are punched and formed in the longitudinal direction of the strip-shaped Cu-based substrate material (10) J, and at each island portion planned position in the longitudinal direction of the Cu-based substrate material (1o). , and on the back side surface opposite to the mounting side surface of the semiconductor chip, low thermal expansion metal stamping foils (11) of a predetermined size are pressed and arranged at predetermined intervals in the longitudinal direction.

低熱膨張金属材打箔(11)は、後述する如く、Cu系
基板材(10)厚み、搭載予定チップ寸法等を考慮して
選定された厚み、寸法を有する。
As will be described later, the low thermal expansion metal stamping foil (11) has a thickness and dimensions selected in consideration of the thickness of the Cu-based substrate material (10), the dimensions of the chips to be mounted, and the like.

また、Cu系基板材(lO)との圧接状態は、第2図a
、b、cに示す如く、Cu系基板材(10)表面に低熱
膨張金属材打箔(11)が圧接されるほか、基板材側に
一部あるいは全部が埋入して圧接されてもよい。
In addition, the pressure contact state with the Cu-based substrate material (lO) is shown in Figure 2a.
, b, and c, in addition to pressure-welding the low thermal expansion metal stamping foil (11) to the surface of the Cu-based substrate material (10), it may also be partially or entirely embedded in the substrate material side and pressure-welded. .

また、低熱膨張金属材打箔(11)自体も第2図Cに示
す如く、種々形状の孔を設けた所謂パンチングメタルと
すると、孔内にCu系基板材が入り、銅または銅合金と
低熱膨張金属材料の体積比により、銅または銅合金ない
し低熱膨張金属材料の間の任意の熱膨張係数値を選択す
ることができる。
In addition, if the low thermal expansion metal stamping foil (11) itself is a so-called punching metal with holes of various shapes as shown in Figure 2C, the Cu-based substrate material will be inserted into the holes, and the copper or copper alloy and low heat Depending on the volume ratio of the expanding metal material, any thermal expansion coefficient value between copper or copper alloys and low thermal expansion metal materials can be selected.

さらに、低熱膨張金属材打箔(11)に、第3図に示す
如く、例えば、銅または銅合金板(20)の少なくとも
一方主面に、厚み方向に多数の貫通孔(22)を有する
低熱膨張金属板(21)を圧接一体化して、前記貫通孔
(22)から銅または銅合金が低熱膨張金属板(21)
表面に部分的に露出するよう構成し、銅または銅合金と
低熱膨張金属材料の体積比を選定することにより、銅ま
たは銅合金ないし低熱膨張金属材料の間の任意の熱膨張
係数値を選択した金属材料を用いることができる。また
、前記銅または銅合金林に代えて他の金属材料を用いる
こともできる。
Furthermore, as shown in FIG. 3, the low thermal expansion metal stamping foil (11) has, for example, a copper or copper alloy plate (20) with a large number of through holes (22) in the thickness direction on at least one main surface thereof. The expansion metal plate (21) is integrated by pressure welding, and copper or copper alloy flows through the through hole (22) into the low thermal expansion metal plate (21).
By configuring it to be partially exposed on the surface and selecting the volume ratio of copper or copper alloy and low thermal expansion metal material, an arbitrary thermal expansion coefficient value between copper or copper alloy and low thermal expansion metal material was selected. Metal materials can be used. Moreover, other metal materials can also be used in place of the copper or copper alloy forest.

材料 また、Cu系基板材(10)には、純Cuのほか、Cu
−8n系、Cu−Fe系、Cu−Zn系、Cu−Co系
、Cu−Ni系、Cu−Zr系など、あるいはさらに前
記Cu系にP、 Cr等を添加した公知のCu合金のい
ずれをも採用でき、用途や要求される性能等に応じて適
宜選定できる。
Materials In addition to pure Cu, the Cu-based substrate material (10) also includes Cu.
-8n system, Cu-Fe system, Cu-Zn system, Cu-Co system, Cu-Ni system, Cu-Zr system, etc., or any of the known Cu alloys in which P, Cr, etc. are added to the Cu system. can also be adopted, and can be selected as appropriate depending on the application, required performance, etc.

低熱膨張金属材打箔(11)には、36Ni−Fe合金
、31Ni−4Co−Fe合金、42Ni−Fe合金な
どの各種組成からなるNi−Fe系合金の他、所謂コバ
ール合金、Mo、 Fe−Cr合金等の公知の低熱膨張
金属が採用できる。
The low thermal expansion metal stamping foil (11) includes Ni-Fe alloys with various compositions such as 36Ni-Fe alloy, 31Ni-4Co-Fe alloy, and 42Ni-Fe alloy, as well as so-called Kovar alloy, Mo, Fe- Known low thermal expansion metals such as Cr alloys can be used.

作里紘玉 第2図a、b、cに示すこの発明による各種のリードフ
レーム材料を用いて、長手方向に複数個の所要パターン
のリードフレームを、例えば、打ち抜き成形し、得られ
たリードフレームでプラスチックスパッケージを作成す
ると、第4図a、b、cに示す如く、チップ(2)はリ
ードフレーム(1)の中央部に形成されるアイランド(
11)に載置され、ろう材や接着材、はんだ等にて固着
され、内部リード(12)とボンディングワイヤ(3)
を介して電気的に接続され、周囲が樹脂(4)にて封止
されている。
Hirotama Sakuri Using various lead frame materials according to the present invention shown in FIGS. 2 a, b, and c, lead frames having a plurality of desired patterns in the longitudinal direction are formed by punching, for example, and the resulting lead frames are When a plastic package is made using the above steps, the chip (2) is attached to an island (
11) and fixed with brazing material, adhesive, solder, etc., and the internal lead (12) and bonding wire (3)
They are electrically connected via the 3-layer 3-layer connector and the periphery thereof is sealed with resin (4).

第4図aに示す例では、チップ(2)が搭載されるアイ
ランド(11)の裏面側に、低熱膨張金属材打箔(11
)が圧接されており、同図すでは、低熱膨張金属材打箔
(11)がアイランド(11)部内に全部が埋入されて
、他リード部と同厚みとなっており、さらに同図Cでは
、同様にパンチングメタル構成の低熱膨張金属材打箔(
11)がアイランド(11)部内に埋入されている。
In the example shown in FIG. 4a, a low thermal expansion metal stamping foil (11) is placed on the back side of the island (11) on which the chip (2) is mounted.
) are pressure-welded, and in the same figure, the low thermal expansion metal stamping foil (11) is completely embedded in the island (11) part and has the same thickness as the other lead parts. Now let's look at punched foil (a low thermal expansion metal material with a punched metal structure).
11) is embedded in the island (11).

第4図a、b、cに示すいずれのパッケージにおいても
、チップ(2)から発生する熱は、アイランド(11)
、樹脂(4)、内部リード(12)という経路にてリー
ドフレーム(1)のリード部(13)に達して外部に放
散されるが、この経路全体がCu系基板材からなるため
、熱の放散性が極めて良い。
In any of the packages shown in Figures 4a, b, and c, the heat generated from the chip (2) is transferred to the island (11).
, the resin (4), and the internal lead (12) to reach the lead part (13) of the lead frame (1) and dissipate to the outside, but since this entire path is made of Cu-based substrate material, the heat is Extremely good dissipation.

さらに、チップ(2)が搭載されるアイランド(11)
では、その裏面側に所要の低熱膨張金属材料箱(11)
が圧接、埋入されていることから、加熱時の反りが極僅
かしかなく、チップ(2)とアイランド(11)との接
着界面の剥離等を防止することができ、信頼性の高いプ
ラスチックスパッケージが得られる。
Furthermore, an island (11) on which a chip (2) is mounted
Now, place the required low thermal expansion metal material box (11) on the back side.
Because it is pressure-bonded and embedded, there is very little warping when heated, and it is possible to prevent peeling of the adhesive interface between the chip (2) and the island (11), making it a highly reliable plastic material. You will get a package.

五激友汰 この発明によるリードフレーム材料は、第1図に示す如
く、銅または銅合金からなる帯状のCu系基板材(10
)に、Cu系基板材(10)厚み、搭載予定チップ寸法
等を考慮して選定された材質、厚み、寸法を有する・低
熱膨張金属材料箱(11)を、重ね合わせ圧接、圧延し
て所定間隔で配列したスポット状部分クラッド材である
Gogeki Yuta The lead frame material according to the present invention, as shown in Fig. 1, is a strip-shaped Cu-based substrate material (10
), a low thermal expansion metal material box (11) having a material, thickness, and dimensions selected in consideration of the thickness of the Cu-based substrate material (10) and the dimensions of the chips to be mounted, etc., is stacked and pressure-welded and rolled into a predetermined shape. This is spot-shaped partial cladding material arranged at intervals.

低熱膨張金属材料箱(11)のかかる特定厚み、寸法を
選定するには、実装試験で確認することが主になるが一
応の目安として以下の手段を採用することができる。
In order to select the specific thickness and dimensions of the low thermal expansion metal material box (11), it is mainly confirmed by a mounting test, but the following method can be adopted as a rough guide.

チップが搭載されるリードフレームのアイランド部を、
チップとリードフレーム(基板材+低熱膨張金属材料箱
)の複合材と考え、複合材がわん曲しない条件を求める
。すなわち、温度差ΔTで加熱したときのわん曲量が、
基板材を挟んで両面の低熱膨張材料のわん曲量が同等と
なる条件を求める。
The island part of the lead frame on which the chip is mounted is
Consider the chip and lead frame (substrate material + low thermal expansion metal box) as a composite material, and find conditions under which the composite material will not bend. In other words, the amount of curvature when heated with a temperature difference ΔT is
Find the conditions under which the amount of curvature of the low thermal expansion material on both sides of the substrate material is the same.

わん曲量は複合材の場合、わん曲係数に比例するため、
わん曲係数が同等となる条件を求める。
In the case of composite materials, the amount of curvature is proportional to the curvature coefficient, so
Find the conditions under which the curvature coefficients are the same.

従って、チップと基板材、基板材と低熱膨張金属材料箱
の各組合せのわん曲係数と板厚比との関係を考慮して、
搭載予定チップ、Cu系基板材厚みに応じて低熱膨張金
属材料箔厚みを決定するとよい。
Therefore, considering the relationship between the curvature coefficient and plate thickness ratio of each combination of the chip and the substrate material, and the substrate material and the low thermal expansion metal material box,
The thickness of the low thermal expansion metal foil may be determined depending on the chip to be mounted and the thickness of the Cu-based substrate material.

一例を示すと、第5図aの曲線■がシリコンチップ(熱
膨張係数17 x 10’)とCu系基板材のわん曲係
数を示し、曲線■■がCu系基板材+36Ni−F−才
のわん曲係数を示し、曲線■がCu系基板材+コバール
材(熱膨張係数7〜8xlO’)のわん曲係数を示す。
As an example, the curve ■ in Figure 5a shows the curvature coefficient of the silicon chip (thermal expansion coefficient 17 x 10') and the Cu-based substrate material, and the curve ■■ represents the curvature coefficient of the Cu-based substrate material + 36Ni-F- Curvature coefficients are shown, and curve (2) shows the curvature coefficient of Cu-based substrate material + Kovar material (thermal expansion coefficient 7 to 8xlO').

例えば、実施例に示す如く、シリコンチップ厚みが0.
4mm、 Cu基板材厚みが0.1mmの場合、36N
i−Fe材は0.34mmまたは0.04mm、コバー
ル材は0.1mm厚みが最適であることが分かる。
For example, as shown in the example, the silicon chip thickness is 0.
4mm, 36N if the Cu substrate material thickness is 0.1mm
It can be seen that the optimal thickness is 0.34 mm or 0.04 mm for the i-Fe material, and 0.1 mm for the Kovar material.

わん曲係数に わん曲量り 熱膨張係数α   宍X=銅、 αM=低熱膨張金属材料、 板厚比mm=5Ml5cu ヤング率比n   n”EM/ECu ECu=銅・ EM=低熱膨張金属材料、 複合材料長さ=L、複合材料板厚=を 上述の如く、Cu系基板材種類及び厚み、搭載予定チッ
プ寸法等を考慮して選定された材質、厚み、寸法を有す
る低熱膨張金属材料箱を、所要の厚み比となるまで重ね
合わせ圧接、圧延するが、Cu系基板材の長手方向にス
ポット状に部分クラッドされる低熱膨張金属材料箱は、
リードフレームへの加工に際して、高精度のピッチ、寸
法を有する必要がある。
Thermal expansion coefficient α calculated by curvature coefficient α Shishi As mentioned above, the material length = L, the composite material plate thickness = a low thermal expansion metal material box having the material, thickness, and dimensions selected in consideration of the type and thickness of the Cu-based substrate material, the dimensions of the chip to be mounted, etc. The low thermal expansion metal material box is overlapped, pressure bonded and rolled until the required thickness ratio is achieved, but the low thermal expansion metal material box is partially clad in spots in the longitudinal direction of the Cu-based substrate material.
When processing into a lead frame, it is necessary to have highly accurate pitch and dimensions.

高精度のピッチ、寸法を有するスポット状部分クラッド
材を得るには、例えば、コイルから巻き戻し定寸送りし
た該金属材料箱とCu系基板材を所定間隔で連続的に超
音波溶接して仮止めした後、一対の回転カッターで所定
間隔で金属箔を切断して止着されない金属箔片を除去、
あるいは、定寸送りした金属材料箱をパンチで挟み切断
すると同時に定寸送りされるCu系基板材上でパンチに
組み込んだ電極でスポット溶接して仮止めするか、ある
いは同様にパンチに組み込んだ超音波溶接用加振板にて
超音波溶接して仮止めした後、圧接、圧延するとよい。
In order to obtain a spot-shaped partial cladding material having highly accurate pitch and dimensions, for example, the metal material box unwound from a coil and fed to a fixed length and the Cu-based substrate material are continuously ultrasonically welded at predetermined intervals to temporarily form a temporary cladding material. After fixing, cut the metal foil at predetermined intervals with a pair of rotating cutters and remove the pieces of metal foil that are not fixed.
Alternatively, a metal material box fed to a fixed size is sandwiched and cut with a punch, and at the same time, the metal material box fed to a fixed size is temporarily fixed by spot welding with an electrode built into the punch on the Cu-based substrate material fed to a fixed size. It is preferable to perform ultrasonic welding using a vibrating plate for sonic welding to temporarily fix the parts, followed by pressure welding and rolling.

また、定寸送りした該金属材料箱とCu系基板材を所定
間隔で連続的にレーザー溶接して仮止めした後、回転カ
ッターで所定間隔で金属材打箔を切断して止着されない
金属箔片を除去、あるいは、定寸送りした金属材打箔を
パンチで挟み切断すると同時に定寸送りされるCu系基
板材上にパンチで押圧しながらレーザー溶接して仮止め
した後、圧接、圧延し、この際、圧延機の一対のワーク
ロールにバックアップロールを当接させて、巻き戻され
たCu系基板材を加圧するときの荷重を検出する装置と
板厚計を備えることにより、圧延荷重制御装置にて、金
属材料箔片の所要原点からの絶対位置測定値を基に、圧
延荷重の変動とピッチ及び絶対位置の変動との定量的関
係、制御モデルを求め、目標とする圧延荷重を計算し、
荷重一定制御を行うと、高精度ピッチ制御を実現できる
In addition, after temporarily fixing the metal material box and the Cu-based substrate material sent to a fixed length at predetermined intervals by continuous laser welding, cut the metal stamping foil at predetermined intervals with a rotary cutter to remove the metal foil that is not fixed. Either the piece is removed, or the metal stamped foil that has been fed to a fixed length is sandwiched and cut with a punch, and at the same time, it is temporarily fixed by laser welding while pressing with a punch onto the Cu-based substrate material that is fed to a fixed length, and then it is pressed and rolled. At this time, the rolling load can be controlled by installing a device and a plate thickness gauge to detect the load when pressurizing the unwound Cu-based substrate material by bringing a backup roll into contact with a pair of work rolls of the rolling mill. The equipment calculates the target rolling load by determining the quantitative relationship between rolling load variation, pitch and absolute position variation, and control model based on the measured absolute position of the metal foil piece from the required origin. death,
By performing constant load control, high precision pitch control can be achieved.

(特願平1−102316号、特願平1−216758
号、特願平1−216759号、特願平1−21676
0号参照)上述した圧接、圧延機による製造方法のほか
、プレス機によってもCu系基板材に該金属材料箔片を
埋入配置することができる。
(Patent application No. 1-102316, Patent application No. 1-216758
No., Japanese Patent Application No. 1-216759, Japanese Patent Application No. 1-21676
(Refer to No. 0) In addition to the above-mentioned manufacturing methods using pressure welding and rolling mills, the metal foil pieces can also be embedded and arranged in the Cu-based substrate material using a press machine.

また、低熱膨張金属材料箔(11)がCu系基板材(1
0)に所謂ピンダウンで接合していても前述のわん曲防
止効果は同等であり、さらに第2図すに示す如く、低熱
膨張金属材料箔(11)がCu系基板材(10)のアイ
ランド予定位置の裏面に埋入される場合に、該金属材打
箔(11)がとの厚み端面のみを挾持されるだけであっ
ても、前述のわん曲防止効果は同等である。
Further, the low thermal expansion metal material foil (11) is a Cu-based substrate material (1
0) by a so-called pin-down method, the above-mentioned bending prevention effect is the same, and as shown in Figure 2, the low thermal expansion metal foil (11) is attached to the Cu-based substrate material (10). Even if the metallic stamped foil (11) is only sandwiched between the two thickness ends when it is embedded in the back surface of the position, the above-mentioned warping prevention effect is the same.

去施聾慢 この発明によるリードフレーム材料のチップ搭載面側、
すなわち、リードフレームのボンディングエリアを含む
所要表面位置に、AgあるいはAuめっきをストライプ
状、スポット状めっきを施すことができる。
The chip mounting surface side of the lead frame material according to this invention,
In other words, Ag or Au plating can be applied in stripes or spots on required surface positions including the bonding area of the lead frame.

また、同様にリードフレーム材料のチップ搭載面側の所
要表面位置に、ボンディングワイヤ一種に応じて、Ag
箔、Au箔、At箔、Cu箔等をストライプ状に圧接、
圧延することもでき、また、前述した箔片に切断して仮
止め後に圧接、圧延する方法を採用し、上記各種金属箔
をスポット状に部分クラッドすることができ、この発明
の低熱膨張金属材料箔の重ね合わせ圧接時に同時に表裏
面で部分クラッドするほか、時間差をおいて表裏面で個
別に部分クラッドすることもでき、例えば、アンコイリ
ングしたCu系基板材に先に該金属材打箔を仮止めした
のち、ループさせて表裏を反転させ、前記ボンディング
エリアにAg箔などを仮止めし、その後圧接、圧延する
ことができる。
Similarly, depending on the type of bonding wire, Ag
Pressure bonding of foil, Au foil, At foil, Cu foil, etc. in stripes,
Alternatively, the above-mentioned method of cutting into foil pieces and temporarily fixing them, then pressing and rolling them can be used to partially clad the various metal foils mentioned above in a spot shape, and the low thermal expansion metal material of the present invention can be used. In addition to partially cladding the front and back surfaces at the same time when the foils are stacked and pressure-welded, it is also possible to partially clad the front and back surfaces separately at different times. After fixing, it can be looped and turned over, and Ag foil or the like can be temporarily attached to the bonding area, followed by pressure bonding and rolling.

さらに、リードフレームのボンディングエリアを含む表
面位置に、1条あるいはそれ以上のストライプ状の純度
99.9%以上の純りu箔を、2〜50pm厚みに冷間
あるいは温間圧接することにより、熱放散性にすぐれた
Cu合金系リードフレーム材料に高価なAu、Agスポ
ットめっきなどを必要とせず、組立工程でCuワイヤー
をボンディングに使用でき、かつボンディングが容易に
確実にできる。
Furthermore, by cold or warm welding one or more stripes of pure U-foil with a purity of 99.9% or higher to a thickness of 2 to 50 pm to the surface position including the bonding area of the lead frame, There is no need for expensive Au or Ag spot plating on the Cu alloy lead frame material, which has excellent heat dissipation properties, and Cu wire can be used for bonding in the assembly process, and bonding can be easily and reliably performed.

圧接方法は、例えば、軟化ワイヤーブラシによる表面清
浄化後、両者を冷間圧接し、さらに、拡散焼鈍を施した
後、所要厚みまで圧延を行う方法が好ましい。また、純
Cu箔表面が純度99.9%以上の純Cuとしての特性
を維持し続けて良好なボンディング性を保持し、かつ高
い機械的強度を保持させることを考慮すると、10四音
越える厚みが好ましい。
A preferable pressure welding method is, for example, a method in which after surface cleaning with a softening wire brush, the two are cold pressure welded, and further, after diffusion annealing, rolling is performed to a required thickness. In addition, considering that the pure Cu foil surface maintains the characteristics of pure Cu with a purity of 99.9% or more, maintains good bonding properties, and maintains high mechanical strength, it is necessary to have a thickness exceeding 104. is preferred.

実施例 実施例1 15.6x6.24xO,4(厚み)mm寸法のチップ
を搭載できる26ピン用のプラスチックスパッケージ用
のリードフレームを8個、打ち抜き成形するため、0.
2x36.5x230mm(txwxl)寸法の純Cu
基板材からなるリードフレーム材料を製造した。
Examples Example 1 In order to punch and mold eight lead frames for a 26-pin plastic package that can mount a chip with dimensions of 15.6 x 6.24 x O and 4 (thickness) mm, 0.0 mm was used.
Pure Cu with dimensions 2x36.5x230mm (txwxl)
A lead frame material consisting of a substrate material was manufactured.

すなわち、第4図aに示す如く、アイランド(1□)の
裏面側に低熱膨張金属材料箔(11)が圧接された構成
とするには、m=5silScu=2であるから、第5
図aより、K=9.5、SM/SCu=m=0.8、n
=1.33、α=4xlO’、E=15000が判明し
、低熱膨張金属材料箔には、0.16mmまたは3.4
mmJFiみの36Ni−Fe材が最適である。
That is, as shown in FIG. 4a, in order to create a configuration in which the low thermal expansion metal foil (11) is pressure-welded to the back side of the island (1□), since m=5silScu=2, the fifth
From figure a, K=9.5, SM/SCu=m=0.8, n
= 1.33, α = 4xlO', E = 15000, and the low thermal expansion metal material foil has a thickness of 0.16 mm or 3.4
36Ni-Fe material with only mmJFi is optimal.

そこで、純Cu基板材の8箇所に、36Ni−Fe材を
上記厚み比となるように圧接、圧延して、各々14.5
X5.4mm寸法で0.16mmまたは3.4mm厚み
の低熱膨張金属材打箔がスポット状に配列されたリード
フレーム材を作製した。
Therefore, 36Ni-Fe material was pressure-welded and rolled to 8 locations of the pure Cu substrate material so that the thickness ratio was as described above, and each part had a thickness of 14.5
A lead frame material was produced in which stamped foil of a low thermal expansion metal material with a size of 5.4 mm and a thickness of 0.16 mm or 3.4 mm was arranged in spots.

上記リードフレーム材を用いて、プラスチックスパッケ
ージを50個作成して実装試験したところ、剥がれや割
れのチップ損傷は皆無であった。
When 50 plastic packages were made using the above lead frame material and subjected to a mounting test, there was no chip damage such as peeling or cracking.

去h!徨 実施例1において、第4図すに示す低熱膨張金属材打箔
(11)がアイランド(11)部内に埋火されて、他リ
ード部と同厚みとなる構成とするには、m=5si/ 
SCu = 4と純Cu基板材厚みを0.1mmと設定
し、K=7.5であるから、第5図aより、アイランド
(11)の厚みが0.2mmとなるので、SMIScu
=m=1、n=1.33、a=7x10−6、E=15
000が判明し、低熱膨張金属材打箔には、0.1mm
厚みのコバール材が最適である。
Leaving! In Example 1, in order to make the low thermal expansion metal stamping foil (11) shown in FIG. 4 embedded in the island (11) part and have the same thickness as other lead parts, /
Since SCu = 4 and the pure Cu substrate material thickness is set to 0.1 mm, and K = 7.5, the thickness of the island (11) is 0.2 mm from Figure 5a, so SMIScu
=m=1, n=1.33, a=7x10-6, E=15
000, and 0.1mm for low thermal expansion metal stamping foil.
Thick Kovar material is optimal.

そこで、純Cu基板材の8箇所に、コバール材を上記厚
み比となるように圧接、圧延して、各々14.4X5.
2mm寸法で0.1mm厚みの低熱膨張金属材打箔がス
ポット状に配列されたリードフレーム材を作製した。
Therefore, Kovar material was pressure-welded and rolled to 8 locations of the pure Cu substrate material so that the thickness ratio was as described above, and each part was 14.4 x 5.
A lead frame material was produced in which stamped foils of low thermal expansion metal having a size of 2 mm and a thickness of 0.1 mm were arranged in spots.

上記リードフレーム材を用いて、プラスチックスパッケ
ージを50個作成して実装試験したところ、剥がれや割
れのチップ損傷は皆無であった。
When 50 plastic packages were made using the above lead frame material and subjected to a mounting test, there was no chip damage such as peeling or cracking.

実部l坦 実施例2と同様に、コバール材をパンチングメタルとな
して0.1mm厚みに埋め込むように純Cu基板材の8
箇所に圧接、圧延したところ、圧接時にCu基板材がコ
バール材のパンチング孔に充填されるため、圧接後の板
形状が極めて良好であり、上記リードフレーム材を用い
て、プラスチックスパッケージを50個作成して実装試
験したところ、剥がれや割れのチップ損傷は皆無であっ
た。
As in Example 2, the Kovar material is used as a punching metal and is embedded into the pure Cu substrate material to a thickness of 0.1 mm.
When the lead frame material was pressed and rolled, the Cu substrate material filled the punched holes in the Kovar material during pressure bonding, so the shape of the plate after pressure bonding was very good. Using the above lead frame material, 50 plastic packages were made. When it was created and tested, there was no chip damage such as peeling or cracking.

発明の効果 Cu系リードフレーム用材料の半導体チップ搭載予定面
の裏面側に低熱膨張金属箔をスポット状に部分クラッド
した、この発明によるリードフレーム用材料はCu系基
板材からなるため、熱の放散性が極めて良く、さらに、
チップが搭載されるアイランド部の裏面側に所要の低熱
膨張金属材打箔が圧接、埋入されているため、加熱時の
反りが極僅かしかなく、チップとアイランドとの接着界
面の剥離等を防止することができ、信頼性の高いプラス
チックスパッケージを得ることができる。
Effects of the Invention The lead frame material according to the present invention, which is partially clad with a low thermal expansion metal foil in spots on the back side of the surface on which the semiconductor chip is to be mounted, is made of a Cu-based substrate material, and therefore has excellent heat dissipation. The sex is extremely good, and furthermore,
Since the required low thermal expansion metal stamping foil is pressure-bonded and embedded on the back side of the island section where the chip is mounted, there is very little warping when heated, preventing peeling of the adhesive interface between the chip and the island. can be prevented and a highly reliable plastic package can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明によるリードフレーム材料の斜視説明
図である。第2図a、b、cはこの発明によるリードフ
レーム材料のクラッドした低熱膨張金属材打箔を示す縦
断説明図である。第3図はこの発明に用いる低熱膨張金
属材打箔の一例を示す斜視説明図である。 第4図a、b、cはこの発明によるリードフレーム材料
を用いたプラスチックスパッケージの縦断説明図である
。第5図aはクラッドする低熱膨張金属材打箔と基板材
との厚み比とわん曲係数との関係を示すグラフであり、
同図すは試験材の斜視説明図である。 第6図は従来のプラスチックスパッケージの縦断説明図
である。 1・・・リードフレーム、11・・・アイランド、12
・・・内部リード、13・・・外部リード、2・・・チ
ップ、3・・・ボンディングワイヤ、4・・・樹脂、1
0・・・Cu系基板材、11・・・低熱膨張金属材打箔
、20・・・銅または銅合金板、21・・・低熱膨張金
属板、22・・・貫通孔。 出顕人 住友特殊金属株式会社 第3図 第4図 (a) (b) (C)
FIG. 1 is a perspective explanatory view of a lead frame material according to the present invention. FIGS. 2a, 2b, and 2c are longitudinal cross-sectional views showing a low thermal expansion metal stamping foil clad with a lead frame material according to the present invention. FIG. 3 is a perspective explanatory view showing an example of a low thermal expansion metal stamping foil used in the present invention. FIGS. 4a, 4b and 4c are longitudinal sectional views of a plastic package using the lead frame material according to the present invention. FIG. 5a is a graph showing the relationship between the thickness ratio of the low thermal expansion metal stamping foil for cladding and the substrate material and the curvature coefficient,
The figure is a perspective explanatory view of the test material. FIG. 6 is a longitudinal cross-sectional view of a conventional plastic package. 1...Lead frame, 11...Island, 12
...Internal lead, 13...External lead, 2...Chip, 3...Bonding wire, 4...Resin, 1
0...Cu-based substrate material, 11...Low thermal expansion metal material stamping foil, 20...Copper or copper alloy plate, 21...Low thermal expansion metal plate, 22...Through hole. Appearance Sumitomo Special Metals Co., Ltd. Figure 3 Figure 4 (a) (b) (C)

Claims (1)

【特許請求の範囲】 1 帯状の基板材から加工成形したリードフレームのアイラ
ンド部に半導体チップを搭載して樹脂封着するプラスチ
ックスパッケージに用いる帯状の銅または銅合金板から
なるリードフレーム材料において、 基板材の長手方向の各アイランド部予定位置で、かつ半
導体チップの非搭載表面に所定寸法の低熱膨張金属材料
箔を圧接して所定間隔で配列したスポット状部分クラッ
ド材であることを特徴とするプラスチックスパッケージ
用リードフレーム材料。
[Scope of Claims] 1. A lead frame material made of a strip-shaped copper or copper alloy plate used for a plastic package in which a semiconductor chip is mounted on an island portion of a lead frame formed from a strip-shaped substrate material and sealed with resin, It is characterized by being a spot-shaped partial cladding material in which low thermal expansion metal foils of a predetermined size are pressure-welded to the surface where no semiconductor chip is mounted and arranged at predetermined intervals at the planned positions of each island portion in the longitudinal direction of the substrate material and on the surface where no semiconductor chip is mounted. Lead frame material for plastic packages.
JP2092553A 1990-04-06 1990-04-06 Lead frame material for plastic package Pending JPH03290956A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2092553A JPH03290956A (en) 1990-04-06 1990-04-06 Lead frame material for plastic package
KR1019900012272A KR940010910B1 (en) 1990-04-06 1990-08-10 Semiconductor package
DE69026072T DE69026072T2 (en) 1990-04-06 1990-09-10 Connection frames for resin semiconductor packaging
EP90309862A EP0450223B1 (en) 1990-04-06 1990-09-10 Lead frames for semiconductor resin packages
US07/979,489 US5355017A (en) 1990-04-06 1992-11-20 Lead frame having a die pad with metal foil layers attached to the surfaces

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2092553A JPH03290956A (en) 1990-04-06 1990-04-06 Lead frame material for plastic package

Publications (1)

Publication Number Publication Date
JPH03290956A true JPH03290956A (en) 1991-12-20

Family

ID=14057595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2092553A Pending JPH03290956A (en) 1990-04-06 1990-04-06 Lead frame material for plastic package

Country Status (1)

Country Link
JP (1) JPH03290956A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06295970A (en) * 1993-04-08 1994-10-21 Seiko Epson Corp Semiconductor device and manufacture of semiconductor device
JP2019510367A (en) * 2016-02-19 2019-04-11 ヘラエウス ドイチュラント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー コマンディトゲゼルシャフト Circuit carrier manufacturing method, circuit carrier, semiconductor module manufacturing method, and semiconductor module

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60242653A (en) * 1984-05-16 1985-12-02 Daido Steel Co Ltd Composite material for lead frame
JPS60254759A (en) * 1984-05-31 1985-12-16 Mitsubishi Electric Corp Compound metal material for lead frame

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60242653A (en) * 1984-05-16 1985-12-02 Daido Steel Co Ltd Composite material for lead frame
JPS60254759A (en) * 1984-05-31 1985-12-16 Mitsubishi Electric Corp Compound metal material for lead frame

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06295970A (en) * 1993-04-08 1994-10-21 Seiko Epson Corp Semiconductor device and manufacture of semiconductor device
JP2019510367A (en) * 2016-02-19 2019-04-11 ヘラエウス ドイチュラント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー コマンディトゲゼルシャフト Circuit carrier manufacturing method, circuit carrier, semiconductor module manufacturing method, and semiconductor module

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