JPH0328908B2 - - Google Patents

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to power switching circuits.

[Prior Art] Bridge or chopper circuits are often used in motor drive circuits and switching power supplies. In such circuits, the supply of large currents to the output filter or load is continued by power switching elements, such as thyristors or power transistors. The power switching element is controlled by applying an appropriate drive signal to its control electrode. DC power to such circuits is generally derived by rectifying the line voltage without intervening transformers.

Drive signals to the power switching elements are derived from switching logic signals generated by switching control logic. Such logic signals, even in suitable form, are typically not applied directly to power switching elements. This is because the control logic is typically part of a circuit that is grounded and isolated from local line voltages. Therefore, switching logic signals or drive signals derived therefrom are usually applied via an isolated interface, such as an opto-isolator or a transformer.

An example of the use of optical isolators is shown in European Patent Application Publication No. 0053208-A1. This application discloses a half-bridge circuit for driving a single phase induction motor. The switching logic signal is applied to the amplifier via an optical isolator, and the amplifier
A turn-on base drive signal is alternately provided to a pair of series connected power transistors forming a half-bridge. The switching logic circuit is thus isolated from the power switching elements. However, the amplifier is on the power side of the isolated interface and must be provided with a separate floating power supply connected to the emitters of the appropriate transistors for proper switching of the power transistors. This is because the DC power supply to the transistor is floating.

An example of a transformer coupling arrangement for powering a load is shown in British Patent No. 1373740. In this patent, the current flowing through a switching transistor connected across an unregulated floating power supply is pulse width modulated and filtered to provide regulated power to a load. The current flowing through the primary circuit of the pulse transformer is modulated according to the control logic signal. The current induced in the secondary circuit provides an isolated base drive current to the power switching transistor. This base drive current is not affected by changes in the collector and emitter potentials of the switching transistor due to the floating characteristics of the power supply.

For this or other switching power supplies, the modulation frequency is typically on the order of lOKHz. At such frequencies, relatively small transformers can be used and relatively fast switching can be achieved. Also, auxiliary transformer windings can be used to improve the modulation waveform or increase switching speed.

[Problems to be Solved by the Invention] In the case of motor drive devices, the required switching frequency is quite low, typically 50 to several hundred Hz. Although there is no transformer that has a large enough magnetizing inductance to match the lowest driving frequency (50 Hz) and a leakage inductance small enough to obtain rapid switching rise and fall, fast switching is possible with power switching transistors. This is essential to avoid excessive transient power dissipation in the transistor as it turns on and off.

Conventionally, transformer-coupled power switching circuits do not exist that have high switching speeds at relatively low frequencies.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a power switching circuit that allows high switching speeds to be obtained at relatively low frequencies even with the use of transformers.

[Means for Solving the Problems] A power switching circuit according to the present invention that supplies power to a load by repeatedly cutting and intermittent power includes a power switching element that responds to a repetitive drive signal to connect a power source to a load, and a power switching element that responds to a repetitive drive signal to connect a power source to a load. and a drive circuit that supplies a repetitive drive signal in a predetermined frequency range to a control input of the element. The drive circuit includes a primary circuit and a secondary circuit.
It consists of the following circuits. The primary circuit includes a primary winding of a transformer, a signal source that generates a periodic signal with a frequency higher than the predetermined frequency range, and a signal that is modulated from the periodic signal with a signal within the predetermined frequency range. It includes modulating means and means for applying the modulated signal to the primary winding. Said secondary circuit is arranged in a secondary winding of a transformer in which a signal corresponding to said modulated signal is induced, and that detects the modulation and generates a repetitive drive signal to be applied to a control input of a power switching element. and means to do so.

By using high frequency waveform modulation to indicate the switching point of a power switching element, the primary circuit is isolated from the power supply for the switching element while obtaining relatively rapid switching rise and fall. A sufficiently small transformer can be used. Typically, the high frequency waveform will have a switching frequency (e.g. 50-120Hz).
have a frequency several orders of magnitude higher (e.g. 50KHz).

If the power supply to the load is floating, the sensing means must have its own floating power supply to enable proper control of the power switching elements. According to a preferred embodiment of the invention, this comprises providing rectifier means in the secondary circuit for rectifying the modulated secondary winding signal and supplying the rectified signal such that an independent power source for the detection means is provided. This is achieved by

To ensure proper operation of the detection means, a secondary inhibiting means is provided which prohibits the detection means from generating a repetitive drive signal when the independent supply voltage supplied by the rectification means is less than a predetermined minimum value. Preferably, it is included in the circuit.

Although other techniques may be used as the modulation means, such as frequency modulation, a modulation method is preferred in which the voltage applied to the primary winding inverts an asymmetrical waveform with respect to the average level. Such a waveform is generated in the modulation means by combining a switching logic signal (original drive signal) and an oscillator pulse train to generate a gating signal applied to the bridge circuit. The bridge circuit generates a modulated signal in which the periodic voltage signal includes pulses of a first polarity and pulses of opposite polarity and of smaller amplitude and duration proportional to the oscillator pulse train. do.

This modulation configuration facilitates the detection of the switching point by comparing the voltage amplitude of the modulated signal induced in the secondary circuit with at least one predetermined threshold value. The induced signal will exceed the threshold only when it is in one of two possible states.

Preferably, both high and low thresholds are used. In this case, the bistable circuit is set to one of two states when the signal in the secondary circuit exceeds a high threshold, and the bistable circuit is set in the other state when the signal in the secondary circuit becomes less than the lower threshold. is set to the state of The output of the bistable circuit constitutes a repetitive drive signal for the power switching element.

When the power supply for the detection means is obtained by rectifying the secondary circuit signal, the high threshold and the low threshold are set with reference to the power supply voltage obtained by rectification.

Further, in the embodiments described below, means are provided for sensing the current flowing through power switching elements connected across the insulated interface (transformer). Timer means then turns off the power switching element for a predetermined period of time in response to the sensed current exceeding the reference value. Accordingly, the current flowing through the power switching element is interrupted so as to remain within a safe range. Isolation of the sensing means is necessary for the same reasons as explained in connection with the drive circuit.

For example, in order to be able to sense direct current in the feeder of a bridge circuit of a power switching element, the current sensing means comprises a secondary winding connected in parallel to a resistor arranged in such a way that the current to be sensed flows therethrough;
Preferably, a diode is provided in series with the secondary winding to inhibit current flow from the power switching element. In this case, the primary circuit includes a primary winding and a controllable current source that provides current pulses to the primary winding in response to a signal from a periodic signal source. The diode is forward biased and the voltage across the resistor is applied to the secondary winding, inducing a proportional voltage in the primary wire. This primary voltage indicates the current flowing through the resistor and is stored in the charge storage element.

[Function] The present invention modulates a signal with a frequency higher than the frequency of the repetitive drive signal applied to the control input of the power switching element with a signal of the same frequency as the repetitive drive signal (original drive signal), and The signal is applied to the primary side of the transformer, the modulation is detected on the secondary side, and a repetitive drive signal is applied to the control input of the power switching element, so the frequency of the signal passing through the transformer is high. Transformers with low leakage inductance can be used and high switching speeds can be obtained.

[Embodiment] FIG. 2 shows a bridge type drive circuit for driving a split-phase operation winding 10 of a single-phase induction motor. The winding 10 is an N-channel MOS type field effect transistor 12, 13, 1 that can flow a current of several amperes.
4 and 15.

An unregulated floating DC voltage to the bridge is obtained by rectifying the output of the AC mains power supply 16 with a diode bridge 17. The voltage output from diode bridge 17 is smoothed and stored by capacitor 18 and applied to the bridge via lines 20 and 21.

Gate drive circuits 22, 23, 24, and 25 alternately turn on opposing transistor pairs of the bridge such that current flows first through field effect transistors 12 and 13 and then through field effect transistors 15 and 14. The gate drive circuits 22-25 are driven by a shared primary drive circuit via a transformer (isolated interface). One embodiment of the gate drive circuits 22-25 according to the invention is shown in FIG. 1B, and one embodiment of the primary drive circuit according to the invention is shown in FIG. 1A. The total current flowing through the bridge passes through resistor 26, which is part of the isolated current sensing circuit shown in FIG.

The remaining components of the bridge protect transistors 12-1 from voltages and transients above rated levels.
Acts to protect 5. Capacitor 30
shunts the running winding 10 and limits the rate of change of the voltage across the winding 10. Series coils (inductors) 32-35 limit the rate of change of current through transistors 12-15.

The flyback voltages created in the inductances of each circuit due to switching off the bridge or alternating activation of the transistors that make up the bridge cause excessive voltages to be applied to transistors 12-15. Even if such voltages are applied to the transistor, the transistor is protected by a shunt formed by a diode. When the bridge performs a switching operation, the ends of winding 10 are clamped by diodes 36, 37, 38 and 39 to the voltage of the positive or negative supply line. This prevents a voltage higher than the power supply voltage from being applied to the transistors 12 to 15. The other diodes 42 to 45 and the resistors connected thereto are
The positive flyback voltage generated in the coils 32, 33, 34 and 35 causes the transistors 12, 13, 14 to
and 15. The various paths formed by diodes 36-39 and 42-45 ensure that the voltages appearing at the sources and drains of transistors 12-15 do not exceed the value applied by the power supply. for example,
Diodes 44 and 36 clamp the drain voltage of transistor 14 to the positive feed line voltage;
Diode 37 clamps the source of transistor 12 to the negative supply line voltage.

Diodes 46-49 prevent reverse current from flowing through transistors 12-15, which contain anti-parallel diode elements, due to the charge built up associated with the rapid switching off of these diode elements. be sensitive to the damage that may result.

Next, the primary and gate drive circuits will be described with reference to FIGS. 1A, 1B, and 3.
Signal waveforms generated in each part of the circuit shown in these figures are shown in FIG.

The basic signals that control the operation of the bridge and the operation of the motor are two logic signals, the first and second drive signals shown in FIG. 4, applied to input lines 58 and 59 of FIG. 1A. These are complementary logic signals that vary in frequency to vary the operating speed of the motor and are generated by the motor controller in response to an input start command and continue to be generated until a stop command is received. A control device for generating such a drive signal is disclosed in European Patent Application Publication No. 0050208-A1. In the control device disclosed in this application, the drive signal is first generated at the main frequency (50 or 60Hz), while the motor is started based on the main frequency and at a speed corresponding to a frequency around 120Hz (this is the motor is the final velocity of ).

As previously mentioned, such drive signals are not applied directly to the gate electrodes of the field effect transistors of the switching bridge drive circuit of FIG. This is because direct connection to the line voltage causes fluctuations in the power supply voltage of the bridge drive circuit. Therefore, the first and second drive signals are applied to the primary drive circuits of the two isolation transformers. One of the two transformers is shown at 60 in FIG. 1A.

The two secondary windings 62 and 63 of the transformer 60 are
Gate drive circuit 2 located on the opposite side of the bridge
4 and 25 (FIG. 2). A similar transformer and secondary circuit (not shown) provides input to the other pair of gate drive circuits 22 and 23.

Typically, the frequency of the drive signal is between 50 and
Being in the 120Hz range, passing such a signal through the bridge's gate drive circuitry would require a very large transformer. Leakage inductance in such transformers prevents safe and efficient operation of the bridge. This is because the resulting slow switching speed results in excessive transient power consumption of the power transistor.

The primary circuit is therefore configured to receive a very high frequency (50KHz) pulse train from an oscillator and generate a waveform that is modulated according to level changes in the drive signal. The frequency of this modulated signal is so high that a very small transformer can be used as transformer 60, which can be packaged in a volume of less than 15 cm ³ and requires an inductance of only 3 mH. The modulation is detected in the secondary circuit of FIG. 1B and a sharp switching gate signal is applied to the appropriate pair of transistors 12-15.

In order to prevent a short circuit from occurring in a series connection circuit of a pair of field effect transistors connected across a power supply, it is necessary to switch off one field effect transistor and switch off the other field effect transistor connected in series with it.・Off (for example, 12
It is necessary to introduce a slight delay between and 14). Such a delay is generated by logic circuitry in the primary drive circuit shown in FIG. 1A in the following manner. The first and second drive circuits include lines 58 and 59 and NAND gate pairs 64, 65 and 6.
D-type flip-flop pair 68 through 6, 67
and 69. flip flop 68
and 69 are supplied with clock pulses via line 70. The action of NAND gates 64 and 66 is simply to invert the signals. In the absence of an inhibit signal on line 71, NAND gates 65 and 67 change the state of their corresponding flip-flops 68 and 69 in response to changes in the state of their corresponding drive signals, resulting in an output signal Q synchronized with the clock pulses.
generate and. The set Q output of a flip-flop is the preset output of another flip-flop.
Because they are cross-coupled to the PS inputs, both flip-flops 68 and 69 cannot be reset at the same time. The Q output waveforms of the two flip-flops 68 and 69 are offset from each other by one clock pulse interval, as shown by waveforms 1 and 2 in FIG. Waveform 1 and 2
occur on lines 72 and 73, respectively. 1 and 2
The delay between on-intervals is not a problem for motor operation. This is because the period of Q1 and Q2 is much larger than that of the clock pulse.

Waveforms 1 and 2 illustrate first and second gate drive signals which are the actual drive signals applied to the gates of opposing transistor pairs of the motor bridge after modulation in gate drive secondary circuits 22-25. For example, if the inhibit signal on line 71 goes low in response to detection of excessive current in the motor bridge drive circuit, the Q outputs of flip-flops 68 and 69 will be pulled high by the outputs of NAND gates 65 and 67. is set to This has the effect of turning off the transistors in the motor bridge for the duration of the inhibit signal (100 μs). By cutting off the current in this way, excessive currents in the bridge are avoided.

As mentioned above, reset waveforms 1 and 2 are
The required gate drive waveforms to be applied to transistors 12-15 of the motor bridge drive circuit are shown. To pass waveforms 1 and 2 through the interface consisting of transformer 60, these waveforms and set waveforms Q1 and Q2 are used to modulate a high frequency carrier wave derived from the oscillator pulse train on line 70.

Signal Q output from flip-flop 69
2 and 2 are used to modulate the signal applied to the primary circuit of transformer 60. This modulation is performed in the remainder of the primary drive circuit of FIG. 1A.
This part of the primary drive circuit connects the ends of the primary winding 75 to emitter followers (transistors 76 and 7
7) diode and transistor pair 78, 7 held at a constant voltage by or directly connected;
This is another bridge circuit that can be grounded via 9 or 80,81. The high frequency oscillator pulse on line 70 is supplied to only one of the grounded switching transistors 70 and 81 by either AND gate 82 or 83 currently energized by the Q2 or 2 signal. be done.

When one of these switching transistors, for example 81, is supplied with a pulse, the grounded emitter follower 77 of transistor 81 at the same end of the primary winding is grounded between its base and transistor 81. diode 8
It is turned off by 5. This causes current to flow from transistor 76 through primary winding 75 and transistor 81 . This current flow is 1
It is maintained for the duration of two oscillator pulses (5 μs). The emitter voltage of transistor 76 is clamped by diode 86 to the line voltage of 8.8V. The voltage V _p of this transistor is a pulse of negative polarity and amplitude equal to the difference between the clamp voltage and the ground potential, as shown at 100 in FIG.

At the end of each oscillator pulse, switching transistor 81 turns off and the voltage on the primary winding reverses. This results in a positively increasing flyback voltage at the dotted end of winding 75 until it is clamped by another diode 89 to the supply line voltage of 11 volts. Since the opposite end of winding 75 remains clamped to the emitter voltage of transistor 76, winding 75 receives a positive voltage pulse, indicated at 101 in FIG.
Once all primary current has decayed and the flyback voltage has disappeared, no current will flow until the next oscillator pulse arrives.

The voltage waveform V _p of the primary winding has an amplitude of 8.8
and 11V and the clamping action of diodes 86 to 89, and the waveform is asymmetrical with respect to the average value. These reference supply voltages are derived from external Zener diodes (shown). In this way, a constant ratio is maintained between the forward voltage applied to the primary winding 75 and the flyback voltage.

When the Q2 signal is high and the Q2 signal is low and the oscillator pulse 70 is high,
Switching transistor 79 turns on and a positive current pulse flows through transistor 77 as indicated by reference numeral 102 in FIG. line 7
When the zero oscillator pulse goes low, a negative peak voltage 103 of approximately half the amplitude of the peak voltage 102 is created in the primary winding 75 . In this way, an asymmetric high frequency signal is applied to the primary drive circuit and modulated by the inversion of signal Q2 each time it changes state.

A primary drive circuit (not shown) similar to that described above is responsive to outputs Q1 and 1 of flip-flop 68 to provide gate drive signals to transformers 22 and 23. A similarly modulated signal is generated on a line (not shown).

The voltage induced in secondary windings 62 and 63 of transformer 60 has the same waveform as the voltage in primary winding 75.
The waveform modulation is detected in gate drive circuits 24 and 25. One configuration example of the gate drive circuit 24 is the first example.
This is shown in Figure B.

The gate drive circuit shown in FIG. 1B includes a full wave rectifier circuit consisting of four diodes 120, 121, 122 and 123. The rectified secondary signal is smoothed by a capacitor 124 and stored in this capacitor. This capacitor 124 acts as an independent power supply to terminals 1 and 8 of comparator 125. This eliminates the need for a separate external power supply and allows the gate drive circuitry to be isolated from the rest of the circuitry.

Comparator 125 is a commercially available timer module (e.g. Signetics model 555).
It can be configured by Inputs 2 and 6 of comparator 125 are negative set and positive reset inputs, respectively. These inputs 2 and 6 are each connected to a separate internal comparator. One comparator compares the applied voltage to a negative threshold voltage, and the other comparator compares the applied voltage to a positive threshold voltage. These threshold voltages are set to 1/3 and 2/3 of the power supply voltage applied between terminals 1 and 8 by potentiometers provided inside the comparator 125. Therefore,
The threshold value is based on the rectified secondary voltage. An internal latch is set and reset by the outputs of two internal comparators to drive an output stage which produces a square wave output at terminal 3.

The raw quadratic waveform on line 126 is modulated by the effects of resistor 127 and diodes 120-123 to produce the waveform V _COMP shown in FIG.
A voltage V _COMP is applied to both comparator inputs 2 and 6.
Since the negative pulse 106 corresponding to pulse 100 is at a lower level than the lower threshold 107, the comparator 125
Set. Positive pulse 108, corresponding to pulse 102, exceeds the higher threshold 109 and resets comparator 125. In this manner, comparator 125 generates a waveform exactly identical to the original logic waveform 2 applied as the second gate drive signal to the gate of transistor 14 in the motor bridge drive circuit.

During the flyback period between the peaks of the secondary voltage waveform, the voltage at inputs 2 and 6 of comparator 125, V _COMP
is connected to capacitor 12 by resistors 128 and 129.
It is maintained at half of the supply voltage stored at 4. This is because diodes 120 to 123 are maintained in a reverse bias state by the current and voltage of capacitor 124, and no current flows through resistor 127. Capacitor 123 inhibits rapid rises or falls of the comparator input that could cause false switching.

Another feature of the gate drive circuit of FIG. 1B is a Zener diode 131 and a resistor 132. These keep the reset input 4 of comparator 125 energized until the supply voltage applied to comparator 125 exceeds the breakdown voltage of the Zener diode. In this manner, circuit malfunctions are prevented before capacitor 124 is fully charged. Also, if the oscillator pulse stops for any reason while comparator 125 is in the set state, uncontrolled turn-on is prevented.

Next, the operation of the current sensing circuit shown in FIG. 3, which prevents excessive current from flowing in the motor drive circuit, will be described. The total current flowing through the prism, ie, direct current, passes through resistor 26, shown in both FIGS. 2 and 3. For the same reasons discussed in connection with the primary drive circuit application, there is a need to sense the current flowing through the isolated interface provided by transformer 150.

To sense the DC current, a 1mA current source 1
A high frequency pulse from 51 is applied to the primary winding 152 of the transformer 150. Current source 151 is connected to the same oscillator 14 that provides the high frequency clock pulse train on line 70 of the primary drive circuit of FIG. 1A.
Controlled by a 50KHz output generated from 9. The pulses are transferred to the secondary winding 15 by a transformer 150.
given to 3. The pulse induced in the secondary circuit forward biases the diode 154 and the secondary winding 15
The bridge current flowing through resistor 26 and 1
55 allows the generation of the sum of the terminal voltage and diode drop occurring at 55. Normally, the diode is reverse biased and no voltage is developed across the terminals of the secondary winding 153.

The secondary voltage created by the forward bias of diode 154 returns to primary winding 152 and charges capacitor 156 via diode 157. The terminal voltage drop of diode 157 is
The net voltage across capacitor 156 is substantially equal to the voltage across resistor 26. This shows the current flowing through the bridge circuit.

When the current pulse from current source 151 is terminated, the flyback voltage developed across primary winding 152 is clamped by transistor 158 to a safe negative level. Comparator 159 triggers single shot circuit 60 when the current through resistor 26, indicated by the voltage on capacitor 156, exceeds a predetermined threshold V _ref . When the output of single shot circuit 160 goes low, the inhibit signal generated from AND gate 161 goes low. The inhibit signal is applied to the primary drive circuit via line 71 in FIG. 1A, as described above, and is used to turn off the energizing transistors of the bridge drive circuit. Other inputs to AND gate 161 indicate other conditions necessary to switch off the bridge drive circuit.

When the bridge transistor turns off,
The terminal voltage of the inductive load flies back through diodes 36-39 and the current flowing through sense resistor 26 is reversed. The large current flowing through secondary winding 153 and diode 154 is limited by resistor 155. Nevertheless, when a flyback voltage is applied to primary winding 152, capacitor 15
6 is charged and comparator 159 falsely indicates an overcurrent at the end of the pulse from single shot circuit 160 when the bridge transistor turns on again. To prevent this from occurring, the second current source 162 is responsive to the Q output of the single shot circuit 160 to supply a current to the primary winding 152 for the duration of the single shot pulse.
Provides a current of 10mA. This reverses the polarity of the voltage developed across the terminals of winding 152 during the off period and always flies back so that the primary voltage decreases towards ground potential as the current to the bridge is restored. . Therefore, single shot circuit 160 cannot be falsely triggered by comparator 159.

The period of the single shot circuit 160 is 100 .mu.s to limit the chopping frequency of the drive circuit to 5 KHz. However, in normal operation, the bridge drive circuit must not exceed its current limit value, in which case the current limit circuit of FIG. 3 will not function.

[Effects of the Invention] As is clear from the above explanation, even if the frequency of the drive signal applied to the control input of the power switching element is low, the frequency of the signal passing through the transformer is high. Leakage inductance transformers can be used to increase switching speed.

[Brief explanation of drawings]

FIG. 1A is a circuit diagram illustrating one embodiment of a primary drive circuit forming part of a power switching circuit according to the invention, and FIG. 1B is a circuit diagram of a transformer-coupled gate drive circuit forming the remainder of a power switching circuit according to the invention. A circuit diagram showing one embodiment; FIG. 2 is a circuit diagram showing a motor bridge drive circuit that can use the power switching circuit of FIGS. 1A and 1B; and FIG. 3 is a circuit diagram that can be used for the bridge drive circuit of FIG. 2. A circuit diagram showing the current sensing and limiting circuit, Fig. 4 is Fig. 1A and Fig. 1B.
FIG. 4 is a waveform chart showing signals at various parts of the circuits shown in FIGS. 2 and 3; FIG. 10... Motor winding, 12, 13, 14, 15
... Field effect transistor, 16 ... AC mains power supply, 17 ... Diode bridge, 22,2
3, 24, 25... Gate drive circuit, 60... Transformer, 62, 63... Secondary winding, 64, 65, 6
6, 67...NAND gate, 68, 69...D
Type flip-flop, 75...Primary winding, 7
6, 77, 79, 81...transistor, 82,
83...AND gate, 125...Comparator, 14
9...Oscillator.

Claims (1)

[Scope of Claims] 1. A power switching circuit that repeatedly supplies power to a load in an intermittent manner, comprising: a power switching element that connects a power source to the load in response to a repetitive drive signal applied to a control input; a drive circuit that supplies the repetitive drive signal within a predetermined frequency range to a control input of the element; a signal source that generates
modulating means for generating an amplitude-modulated signal from the periodic signal at a frequency within the predetermined frequency range;
a primary circuit comprising means for supplying the amplitude modulated signal to the primary winding; a secondary winding of the transformer in which a signal corresponding to the amplitude modulated signal is induced; and the repetitive drive. a detection means for detecting amplitude modulation from a signal induced in said secondary winding to generate a signal; and a detection means for rectifying the signal induced in said secondary winding to said detection means. rectifying means supplied as an independent power supply; the modulating means supplies the primary winding with a widened modulation signal obtained by inverting an asymmetric waveform with respect to a predetermined average value; and the detecting means supplies the amplitude modulation signal to the primary winding. A power switching circuit characterized in that said modulation is detected in response to a waveform exceeding said average value of a modulated signal.