JPH03283937A - Terminal address setting system - Google Patents

Terminal address setting system

Info

Publication number
JPH03283937A
JPH03283937A JP2084183A JP8418390A JPH03283937A JP H03283937 A JPH03283937 A JP H03283937A JP 2084183 A JP2084183 A JP 2084183A JP 8418390 A JP8418390 A JP 8418390A JP H03283937 A JPH03283937 A JP H03283937A
Authority
JP
Japan
Prior art keywords
address
terminal
unique
memory
terminal device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2084183A
Other languages
Japanese (ja)
Inventor
Ikuhiro Takahashi
高橋 幾洋
Haruhiko Kinashi
木梨 治彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2084183A priority Critical patent/JPH03283937A/en
Publication of JPH03283937A publication Critical patent/JPH03283937A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce a trouble due to a change in the address setting at movement of a terminal equipment and to decrease the opportunity of mis-setting by converting a sender address at dialing and a destination address at the arrival of a call of a packet frame transferred between a terminal equipment and a communication network by means of a specific address and a terminal address. CONSTITUTION:A terminal accommodation circuit 20 has a specific address memory 27, a destination address conversion section 28, a caller address conversion section 29 and a specific address detection section 31 in addition to a terminal address memory 26 whose number of output lines is increased more than a conventional system. A central controller 30 has a collation section 32 to which a specific address directory 38 is connected in addition to a terminal address detection section 31 connected to a conventional system. A specific address detection section 31 uses a caller address conversion section 29 to detect and extract a caller address from a packet frame sent from a terminal equipment 10 and sends the address to the collation section 32. The collation section 32 collates an output of the specific address detection section 31 with the specific address stored in the specific address directory 38 and raises an alarm in the case of dissidence.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、所定のパケット交換方式を適用する端末装置
を収容しこれを高速伝送路に接続して伝送パケットフレ
ームを送受信する端末収容回路が、通信網での接続制御
に使用するために端末装置ごとに付与された端末アドレ
スを、交換システムごとに一括して予め登録する端末ア
ドレス帳から予め取出して記憶設定する端末アドレス設
定方式に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides a terminal accommodating circuit that accommodates a terminal device applying a predetermined packet switching method and connects it to a high-speed transmission line to transmit and receive transmission packet frames. The present invention relates to a terminal address setting method in which a terminal address assigned to each terminal device for use in connection control in a communication network is retrieved and stored in advance from a terminal address book that is registered in advance for each exchange system.

〔従来の技術〕[Conventional technology]

従来、この種の端末アドレス設定方式は、端末装置ごと
に付与された端末アドレスを、端末装置ごとのアドレス
メモリに記録させるとともに、この端末装置を収容して
高速伝送路へ接続する端末収容回路にも記憶登録させて
いる。
Conventionally, this type of terminal address setting method records the terminal address assigned to each terminal device in the address memory of each terminal device, and also records the terminal address assigned to each terminal device in the terminal accommodation circuit that accommodates this terminal device and connects it to a high-speed transmission line. It is also stored in memory.

第2図は従来の一例を示す機能ブロック図である。第2
図を参照して従来技術について説明する。
FIG. 2 is a functional block diagram showing a conventional example. Second
The prior art will be explained with reference to the drawings.

第2図で端末装置10は、端末収容回路90を介して高
速伝送路40に接続している。端末回路10は固有アド
レスメモリ11.パケット形成部12、およびパケット
判別部13を有している。
In FIG. 2, the terminal device 10 is connected to the high-speed transmission line 40 via the terminal accommodation circuit 90. The terminal circuit 10 has a unique address memory 11. It has a packet forming section 12 and a packet discriminating section 13.

端末収容回路90はパケット識別部21.高速符号送信
部22.高速符号受信部23.パケット検出部24.ア
ドレスフィルタ25.および端末アドレスメモリ91を
有し、中央制御装置80の制御を受けて端末アドレス帳
39から端末アドレスを受信する。
The terminal accommodation circuit 90 includes a packet identification section 21. High-speed code transmitter 22. High-speed code receiving section 23. Packet detection unit 24. Address filter 25. and a terminal address memory 91, and receives terminal addresses from the terminal address book 39 under the control of the central controller 80.

固有アドレスメモリ11には、端末装置10に付与され
た端末アドレスが、端末装置固有のアドレスとして記録
設定されている。この設定手順はスナップボタンによる
手動設定、プログラム制御によるメモリ書込設定などが
あり、様々な方法が採用される。パケット形成部12は
送信情報をパケットフレームに形成するときに固有アド
レスメモリ11から固有アドレスを取出し、発信元アド
レスとしてこれを組込む。パケット判別部13は、受信
したパケットフレームから宛先アドレスを取出して固有
アドレスメモリ11に記録された固有アドレスと比較し
、両者が照合一致したとき端末装置10への着信情報で
あるとみなして端末装置内部へ転送する。
A terminal address given to the terminal device 10 is recorded and set in the unique address memory 11 as an address unique to the terminal device. Various methods are employed for this setting procedure, including manual setting using a snap button, memory writing setting using program control, etc. When forming transmission information into a packet frame, the packet forming unit 12 takes out a unique address from the unique address memory 11 and incorporates it as a source address. The packet discriminator 13 extracts the destination address from the received packet frame, compares it with the unique address recorded in the unique address memory 11, and when the two match, it is assumed that the destination address is incoming information to the terminal device 10, and the terminal device Transfer internally.

パケット識別部21はパケット形成部12の圧力を受信
したとき、パケットフレームを識別して高速符号送信部
22から高速伝送路40へ高速符号により送信する。高
速符号受信部23は高速伝送路40から高速符号を受信
してパケット検出部24へ送出し、パケット検出部24
はパケットフレームを識別して出力する。アドレスフィ
ルタ25はパケットフレームで受信した宛先アドレスを
、端末アドレスメモリ91に記憶した端末アドレスと比
較照合し、一致したパケットフレームムだけを端末装置
10のパケット判別部13へ送信する。
When the packet identifying section 21 receives the pressure from the packet forming section 12, it identifies the packet frame and transmits it from the high speed code transmitting section 22 to the high speed transmission path 40 using a high speed code. The high-speed code receiving unit 23 receives the high-speed code from the high-speed transmission path 40 and sends it to the packet detection unit 24.
identifies and outputs packet frames. The address filter 25 compares the destination address received in the packet frame with the terminal address stored in the terminal address memory 91 and transmits only the matched packet frames to the packet discrimination section 13 of the terminal device 10.

端末アドレスメモリ91は中央制御装置80の制御によ
り、高速伝送路40における接続制御用の端末アドレス
を、端末収容回路90ごとに記憶する端末アドレス帳3
9から受信しこれを記録する。
The terminal address memory 91 is a terminal address book 3 that stores terminal addresses for connection control on the high-speed transmission line 40 for each terminal accommodation circuit 90 under the control of the central controller 80.
9 and record it.

従って、端末アドレスは端末アドレス帳39に括記録さ
れるとともに、端末装置10の固有アドレスメモリll
ごとにも記録設定され、発信時の発信元アドレスおよび
着信時の宛先アドレスとして使用されている。
Therefore, the terminal address is recorded in the terminal address book 39 and also in the unique address memory ll of the terminal device 10.
This address is also recorded and used as the source address for outgoing calls and the destination address for incoming calls.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述のように、従来の端末アドレス設定方式では、端末
装置と端末収容回路とのそれぞれに、この端末装置に付
与された端末アドレスを記憶するアドレスメモリを有し
、通信先に対して発信元アドレスおよび宛先アドレスを
パケットフレームの所定位置に配置するよう構成されて
いるので、端末装置にアドレスを付与するとき、端末装
置および端末アドレス帳にこれを登録しかつ端末収容回
路のアドレスメモリに設定する必要がある。また端末装
置の取替えでは端末装置のアドレスメモリの記憶設定変
更が必要で手間がかかるうえ、誤設定によりパケットフ
レームの正常送受信ができない危険性を生じるという問
題点があった。
As mentioned above, in the conventional terminal address setting method, the terminal device and the terminal accommodation circuit each have an address memory for storing the terminal address assigned to the terminal device, and the source address is transmitted to the communication destination. and the destination address are placed at predetermined positions in the packet frame, so when assigning an address to a terminal device, it is necessary to register it in the terminal device and terminal address book, and to set it in the address memory of the terminal accommodation circuit. There is. Furthermore, when replacing a terminal device, it is necessary to change the memory settings of the address memory of the terminal device, which is time-consuming, and there is a risk that packet frames may not be transmitted and received normally due to incorrect settings.

本発明の目的は、端末収容回路内に端末アドレスメモリ
および固有アドレスメモリの二つを備え、通信先との接
続制御用の端末アドレスと、端末装置で設定する固有ア
ドレスとを切離して取扱うこととし、両者相互のアドレ
ス変換部を配備することにより、上記問題点を解決した
端末アドレス設定方式を提供することにある。
An object of the present invention is to provide a terminal address memory and a unique address memory in a terminal accommodation circuit, and handle the terminal address for controlling connection with a communication destination separately from the unique address set in the terminal device. The object of the present invention is to provide a terminal address setting method that solves the above-mentioned problems by providing mutual address translation units for both devices.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の端末アドレス設定方式の基本構成は、所定のパ
ケット交換方式を適用する端末装置を収容し高速伝送路
に接続して伝送パケットフレームを送受信する端末収容
回路が、通信網での接続制御に使用するために端末装置
ごとに付与された端末アドレスを交換システムごとに一
括して予め登録する端末アドレス帳から予め取出して記
憶設定する端末アドレス設定方式において、前記端末収
容回路が端末アドレスメモリおよびアドレスフィルタに
加え、固有アドレスメモリ、宛先アドレス変換部および
発信元アドレス変換部を有する。
The basic configuration of the terminal address setting method of the present invention is that a terminal accommodating circuit that accommodates a terminal device that applies a predetermined packet switching method, connects to a high-speed transmission path, and transmits and receives transmission packet frames, performs connection control in a communication network. In a terminal address setting method in which a terminal address assigned to each terminal device for use is retrieved and stored in advance from a terminal address book that is registered in advance for each exchange system in advance, the terminal accommodating circuit has a terminal address memory and an address. In addition to the filter, it has a unique address memory, a destination address translator, and a source address translator.

前記端末アドレスメモリは、前記端末収容回路が収容接
続する端末装置に付与された端末アドレスを端末アドレ
ス帳から予め登録を受けて記憶する。
The terminal address memory stores a terminal address assigned to a terminal device accommodated and connected by the terminal accommodation circuit, which is registered in advance from a terminal address book.

前記アドレスフィルタは、パケットフレームを前記高速
伝送路から受信したとき宛先の端末アドレスを識別して
前記端末アドレスメモリに記憶された端末アドレスに一
致したパケットフレームだけを通過させる。
The address filter identifies a destination terminal address when a packet frame is received from the high-speed transmission path, and passes only the packet frame that matches the terminal address stored in the terminal address memory.

前記固定アドレスメモリは端末収容回路が収容接続する
端末装置が単独で設定する固有アドレスを予め記憶する
The fixed address memory stores in advance a unique address set independently by a terminal device accommodated and connected by the terminal accommodation circuit.

前記宛先アドレス変換部は前記アドレスフィルタから受
信したパケットフレームの宛先アドレスを前記固有アド
レスメモリから取出した固有アドレスに置換えて送出す
る。
The destination address converter replaces the destination address of the packet frame received from the address filter with the unique address retrieved from the unique address memory and sends the packet frame.

前記発信元アドレス変換部は端末装置から受信した発信
のパケットフレームの発信元アドレスに前記端末アドレ
スメモリから取出した端末アドレスを置換して高速伝送
路に送信する。
The source address converter replaces the source address of the outgoing packet frame received from the terminal device with the terminal address taken out from the terminal address memory, and transmits the frame to the high-speed transmission line.

また、上記構成に追加する構成の一つは、少くとも交換
システムごとに統一された一つの固有アドレスを予め登
録する固有アドレス帳と、前記端末収容回路に設けられ
前記発信元アドレス変換部が受信したパケットフレーム
から発信元アドレスを取出して送信する固有アドレス検
出送信部と、前記固有アドレス検圧送信部から受信した
アドレスを前記固有アドレス帳が記憶する固有アドレス
に比較照合して不一致のとき警報を発生する照合部を有
する中央制御装置とを有する。
Further, one of the configurations added to the above configuration is a unique address book in which at least one unique unique address unified for each exchange system is registered in advance, and a unique address book provided in the terminal accommodation circuit and received by the source address conversion unit. a unique address detection transmitter that extracts and transmits a source address from a packet frame sent by the user; and a unique address detection transmitter that extracts and transmits a source address from the unique address detection transmitter, and compares the address received from the unique address detection transmitter with the unique address stored in the unique address book, and issues an alarm if there is a mismatch. and a central control unit having a collation unit that generates the data.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示す機能ブロック図である
。第1図において、第2図の従来例で示したものと同一
の構成要素には同一の番号符号を付与してその説明を省
略する。
FIG. 1 is a functional block diagram showing one embodiment of the present invention. In FIG. 1, the same components as those shown in the conventional example of FIG. 2 are given the same numbers and symbols, and their explanations will be omitted.

第1図において、端末装置10および端末アドレス帳3
9は従来と同一である。さらに端末収容回路20のうち
、パケット識別部21.高速符号送信部22.高速符号
受信部23.パケット検出部24、およびアドレスフィ
ルタ25が従来と同一である。
In FIG. 1, a terminal device 10 and a terminal address book 3
9 is the same as the conventional one. Furthermore, of the terminal accommodation circuit 20, the packet identification section 21. High-speed code transmitter 22. High-speed code receiving section 23. The packet detection unit 24 and address filter 25 are the same as in the conventional case.

端末収容回路20は、圧力線の数が増加した端末アドレ
スメモリ26に加え、固有アドレスメモリ27.宛先ア
ドレス変換部281発信元アドレス変換部29、および
固有アドレス検出部31を有している。中央制御装置3
0は照合部32を有し、従来の端末アドレス帳39に加
えて、固有アドレス帳38を接続している。
The terminal accommodation circuit 20 includes a terminal address memory 26 with an increased number of pressure lines as well as a unique address memory 27 . It has a destination address translation section 281, a source address translation section 29, and a unique address detection section 31. Central control device 3
0 has a collation unit 32, and in addition to a conventional terminal address book 39, a unique address book 38 is connected thereto.

固有アドレスメモリ27は、端末装置lOの固有アドレ
スメモリ11と同一のアドレスを記録している。固有ア
ドレスメモリ27は誤設定を防ぐため、例えば読取専用
メモリで構成され、交換システム固有のアドレスが予め
設定装備しである。
The unique address memory 27 records the same address as the unique address memory 11 of the terminal device IO. In order to prevent erroneous settings, the unique address memory 27 is composed of, for example, a read-only memory, and is equipped with addresses specific to the exchange system in advance.

宛先アドレス変換部28はアドレスフィルタ25を通過
した着呼のパケットフレームから宛先アドレスを取出し
、固有アドレスメモリ27が記憶する固有アドレスを代
りに配置換えして端末装置10のパケット判別部13へ
送出する。従って、パケット判別部13は固有アドレス
メモリ11に記憶したアドレスと受信パケットフレーム
の宛先アドレスとの一致を判別し端末装置10内へパケ
ット情報を取込む。
The destination address converter 28 extracts the destination address from the incoming packet frame that has passed through the address filter 25, replaces it with the unique address stored in the unique address memory 27, and sends it to the packet discriminator 13 of the terminal device 10. . Therefore, the packet determining unit 13 determines whether the address stored in the unique address memory 11 matches the destination address of the received packet frame, and imports the packet information into the terminal device 10.

端末装置10の固有アドレスメモリ11は設定変更でき
る構造なため、誤設定を検出する手段として、端末収容
回路20の固有アドレス検出部31、中央制御装置30
の照合部32、および固有アドレス帳38が配備されて
いる。
Since the unique address memory 11 of the terminal device 10 has a structure in which the settings can be changed, the unique address detection section 31 of the terminal accommodation circuit 20 and the central control device 30 are used as means for detecting incorrect settings.
A verification unit 32 and a unique address book 38 are provided.

固有アドレス検出部31は、発信元アドレス変換部29
で、端末装置10から発信されたパケットフレームから
発信元アドレスを検出して取出し、照合部32へ送信す
る。中央制御装置30の照合部32は、固有アドレス検
出部31の出力と、固有アドレス帳38に記憶された固
有アドレスとを比較照合し、不一致のとき警報を発生す
る。固有アドレス帳38の記憶装置も、読取専用メモリ
を使用して誤設定を防止している。
The unique address detection unit 31 is the source address conversion unit 29
Then, the source address is detected and extracted from the packet frame transmitted from the terminal device 10, and transmitted to the matching section 32. The collation section 32 of the central control device 30 compares and verifies the output of the unique address detection section 31 and the unique address stored in the unique address book 38, and generates an alarm when there is a mismatch. The storage device for the unique address book 38 also uses read-only memory to prevent incorrect settings.

従って、上記実施例の方式が適用される交換システムで
は別のシステムから持ち込んで接続する端末装置の固有
アドレスの設定は、付与された端末アドレスとは無関係
に所定の一つの固有アドレスでよく、かつシステム内で
はどの端末収容回路に接続してもそのまま使用できる。
Therefore, in an exchange system to which the method of the above embodiment is applied, the unique address of a terminal device brought in from another system and connected can be set to a single predetermined unique address, regardless of the assigned terminal address, and It can be used as is even if connected to any terminal accommodation circuit within the system.

上記実施例では、端末収容回路20の固有アドレスメモ
リ27は独立して固有アドレスを記録するように図示し
説明したが、固有アドレス帳38の情報を中央制御装置
の制御により転送記録することもできる。
In the above embodiment, the unique address memory 27 of the terminal accommodating circuit 20 is shown and described as independently recording unique addresses, but the information in the unique address book 38 can also be transferred and recorded under the control of the central controller. .

また、固有アドレス帳38を読取し専用メモリとして説
明したが、中央制御装置30に接続された制御卓から設
定変更可能なメモリであってもよい。
Further, although the unique address book 38 has been described as a read-only memory, it may be a memory whose settings can be changed from a control console connected to the central control device 30.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の端末アドレス設定方式に
よれば、端末収容回路が通信網制御に使用する端末アド
レスを記憶するほか、端末装置で設定する固有アドレス
を記憶して、固有アドレスと端末アドレスとを無関係に
するとともに、端末装置と通信網との間を転送するパケ
ットフレームの、発信時の発信元アドレスおよび着信時
の宛先アドレスを固有アドレスおよび端末アドレスのそ
れぞれで変換するので、端末装置の固有アドレスを単一
化することにより端末装置の移動時のアドレス設定の変
更による手間および誤設定の機会を減少できる効果が得
られる。
As explained above, according to the terminal address setting method of the present invention, the terminal accommodation circuit not only stores the terminal address used for communication network control, but also stores the unique address set in the terminal device, and stores the unique address and the terminal address. In addition to making the address irrelevant, the terminal device converts the source address at the time of transmission and the destination address at the time of arrival of the packet frame transferred between the terminal device and the communication network into a unique address and a terminal address, respectively. By unifying the unique address of the terminal device, it is possible to reduce the effort and chance of erroneous setting caused by changing the address setting when the terminal device is moved.

また、固有アドレスの単一化により端末装置からの誤設
定アドレスを取出して中央の固有アドレス帳と照合し7
不一致を検出して警報を発生することが、端末装置から
の発信パケットフレームを利用して可能となり、誤設定
の通知ができる効果がある。
In addition, by unifying unique addresses, incorrectly configured addresses from terminal devices are retrieved and checked against the central unique address book.
It is possible to detect a mismatch and generate an alarm by using the packet frame sent from the terminal device, which has the effect of being able to notify of incorrect settings.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す機能ブロック図、第2
図は従来の一例を示す機能ブロック図である。 10・・・・・・端末装置、20・・・・・・端末収容
回路、21・・・・・・パケット識別部、24・・・・
・・パケット検出部、25・・・・・・アドレスフィル
タ、26・・・・・・端末アドレスメモリ、27・・・
・・・固有アドレスメモリ、28・・・・・・宛先アド
レス変換部、29・・・・・・発信元アドレス変換部、
30・・・・・・中央制御装置、31・・・・・固有ア
ドレス検出部、32・・・・・・照合部、38・・・・
・・固有アドレス帳、39・・・・・・端末アドレス帳
、40・・・・・高速伝送路。
Fig. 1 is a functional block diagram showing one embodiment of the present invention;
The figure is a functional block diagram showing an example of the conventional technology. 10...Terminal device, 20...Terminal accommodation circuit, 21...Packet identification unit, 24...
... Packet detection section, 25 ... Address filter, 26 ... Terminal address memory, 27 ...
. . . Unique address memory, 28 . . . Destination address conversion section, 29 . . . Source address conversion section,
30...Central control unit, 31...Unique address detection unit, 32...Verification unit, 38...
... Unique address book, 39 ... Terminal address book, 40 ... High-speed transmission line.

Claims (2)

【特許請求の範囲】[Claims] (1)所定のパケット交換方式を適用する端末装置を収
容し高速伝送路に接続して伝送パケットフレームを送受
信する端末収容回路が、通信網での接続制御に使用する
ために端末装置ごとに付与された端末アドレスを交換シ
ステムごとに一括して予め登録する端末アドレス帳から
予め取出して記憶設定する端末アドレス設定方式におい
て、 前記端末収容回路に、収容接続する端末装置に付与され
た端末アドレスを端末アドレス帳から予め登録を受けて
記憶する端末アドレスメモリと、パケットフレームを前
記高速伝送路から受信したとき宛先の端末アドレスを識
別して前記端末アドレスメモリに記憶された端末アドレ
スに一致したパケットフレームだけを通過させるアドレ
スフィルタと、収容接続する端末装置が単独で設定する
固有アドレスを予め記憶する固有アドレスメモリと、前
記アドレスフィルタから受信したパケットフレームの宛
先アドレスを前記固有アドレスメモリから取出した固有
アドレスに置換えて前記端末装置に送出する宛先アドレ
ス変換部と、前記端末装置から受信した発信のパケット
フレームの発信元アドレスに前記端末アドレスメモリか
ら取出した端末アドレスを置換えて高速伝送路に送信す
る発信元アドレス変換部とを備えたことを特徴とする端
末アドレス設定方式。
(1) A terminal accommodating circuit that accommodates a terminal device that applies a predetermined packet switching method and connects to a high-speed transmission path to transmit and receive transmission packet frames is provided to each terminal device for use in connection control in the communication network. In the terminal address setting method, in which the terminal address assigned to the terminal device to be accommodated and connected is retrieved and stored in advance from a terminal address book in which the terminal address is registered in advance for each exchange system in advance, the terminal address given to the terminal device to be accommodated and connected is transferred to the terminal accommodation circuit. A terminal address memory that is registered in advance from an address book and stored; and when a packet frame is received from the high-speed transmission path, the destination terminal address is identified and only packet frames that match the terminal address stored in the terminal address memory are included. an address filter that allows the packet frame to pass through, a unique address memory that stores in advance a unique address set independently by a terminal device to be accommodated and connected, and a unique address that sets the destination address of the packet frame received from the address filter to the unique address extracted from the unique address memory. a destination address conversion unit that replaces the terminal address and sends it to the terminal device; and a source address that replaces the terminal address retrieved from the terminal address memory with the source address of an outgoing packet frame received from the terminal device and sends it to the high-speed transmission line. A terminal address setting method characterized by comprising a conversion section.
(2)前記発信元アドレス変換部が受信したパケットフ
レームから発信元アドレスを取出して送信する固有アド
レス検出送信部を前記端末収容回路に設け、さらに 少くとも交換システムごとに統一された一つの固有アド
レスを予め登録する固有アドレス帳と、 前記固有アドレス検出送信部から受信したアドレスを前
記固有アドレス帳が記憶する固有アドレスに比較照合し
て不一致のとき警報を発生する照合部を備える中央制御
装置と、 を有することを特徴とする請求項(1)記載の端末アド
レス設定方式。
(2) A unique address detection transmitter is provided in the terminal accommodation circuit to extract and transmit a source address from the packet frame received by the source address converter, and furthermore, at least one unique address unified for each switching system is provided. a central control device comprising: a unique address book in which the unique address is registered in advance; and a verification unit that compares the address received from the unique address detection transmitting unit with the unique address stored in the unique address book and generates an alarm when there is a mismatch; The terminal address setting method according to claim 1, characterized in that the terminal address setting method has the following.
JP2084183A 1990-03-30 1990-03-30 Terminal address setting system Pending JPH03283937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2084183A JPH03283937A (en) 1990-03-30 1990-03-30 Terminal address setting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2084183A JPH03283937A (en) 1990-03-30 1990-03-30 Terminal address setting system

Publications (1)

Publication Number Publication Date
JPH03283937A true JPH03283937A (en) 1991-12-13

Family

ID=13823370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2084183A Pending JPH03283937A (en) 1990-03-30 1990-03-30 Terminal address setting system

Country Status (1)

Country Link
JP (1) JPH03283937A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999049374A1 (en) * 1998-03-23 1999-09-30 Mitsubishi Denki Kabushiki Kaisha Data processor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999049374A1 (en) * 1998-03-23 1999-09-30 Mitsubishi Denki Kabushiki Kaisha Data processor
US6606635B1 (en) 1998-03-23 2003-08-12 Mitsubishi Denki Kabushiki Kaisha Data processing apparatus

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