JPH03283741A - Signal transfer circuit - Google Patents

Abstract

PURPOSE:To attain high speed operation and to reduce power consumption by sending a signal representing an electric characteristic of a reception circuit to a transmission circuit thereby controlling a current output level of the transmission circuit. CONSTITUTION:A reception circuit 2 outputs an electric characteristic of the circuit as a current or a voltage, a transmission circuit 1 receives the current or the voltage from the reception circuit 2 so as to control the current of a current signal to be sent in response to the input. Thus, even when there is a dispersion in the element characteristic between the transmission circuit 1 and the reception circuit 2, since the sender current varies with the difference, it is not required to set the current to be large in the design stage. Thus, low power consumption and high speed operation are attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a signal transmission circuit that transmits and receives digital signals with low current and low power on a printed circuit board or a hybrid IC board.

[Conventional technology]

Conventionally, TTL has been used as a method for transmitting and receiving digital signals between ICs on printed circuit boards or between ICs on hybrid boards.
There were circuits that operated in the voltage mode, such as the ECL interface, and circuits that operated in the current mode, which transmitted and received depending on the presence or absence of current or the magnitude of the current.

It is known that the ECL interface is excellent for transmitting and receiving high-speed digital signals.

The problem is that the operating current is large and it is not suitable for reducing power consumption.

On the other hand, as a circuit that operates in current mode, there is a cascode connection type circuit, for example, as described in "Analog Integrated Circuits" published by Kindai Kagakusha, February 1980, page 257.

FIG. 6 is a diagram of a conventional example of a circuit operating in the current mode as described above.

In FIG. 6, 21 is a transmitting circuit, 22 is a receiving circuit, 2
3 is a digital signal input terminal, 24 is a digital signal output terminal, and 25 is a wiring connecting the transmitter circuit 21 and the receiver circuit 22.

First, FIG. 6(a) shows the basic circuit format.

The transmitting circuit 21 is a constant current source. and current switch transistors Q3°, Q,1 for switching the current, and outputs a current signal corresponding to the digital signal input to the input terminal 23 to the wiring 25. In addition, the receiving circuit 2
consists of resistors R3° and R31 that convert the current signal input via the wiring 25 into a voltage signal.

For example, when the above-mentioned transmitting and receiving circuit is mounted on a printed board, the transmitting circuit 21 is mounted on an integrated circuit on the printed board, and the receiving circuit 22 is mounted on another integrated circuit on the same printed board. The connection will be made by wiring 25 provided on the printed board.

The operation of the above transmitting/receiving circuit is as follows.

When a digital signal is input to the input terminal 23 of the transmitting circuit 21, one of the transistors Q3°, Q,1 is turned on and the other is turned off in response. Therefore, a current flows through the wiring 25 to one of the resistors R30 and R1□ of the receiving circuit, and a potential drop occurs at that resistance, so a magnitude relationship of potentials occurs at the output terminal 24 of the receiving circuit 22, which is converted into a digital signal. Output as a signal.

In order to operate this circuit at high speed, it is necessary to speed up the charging and discharging of the capacitance of the wiring 25 on the printed circuit board and the resistors R3 and R1□.To do this, the resistance values of the resistors R, o, and R31 must be Make it smaller and use constant current. It is necessary to increase the value of Therefore, there was a problem that it was not suitable for reducing power consumption.

Next, the circuit shown in FIG. 6(b) is obtained by adding common base transistors Qa2 and Q33 to the receiving circuit 22-.

The operation of this circuit is almost the same as that shown in FIG. 6(a), but the potential of the wiring 25 is changed from the base applied voltage VBB by the common base transistors Q, 2, and Q 33 inserted in the current flow path. Base-emitter voltage (0,6~
Since the potential is kept almost constant at a potential lowered by about 0.9 V, the charging/discharging current of the wiring capacitor as described in FIG. 6(a) can be considerably suppressed. Therefore, constant current source engineering. High-speed operation can be achieved without increasing the current. However, what about the transmitting circuit 21 and the receiving circuit 22?

Constant current power supplies are generally composed of different integrated circuits.

, and the values of resistors R3゜ and R3□ may vary randomly by several tens of percent due to manufacturing variations. Therefore, the output amplitude of the receiving circuit 22 also varies randomly depending on the combination of integrated circuits. Become.

Therefore, in order to obtain the required output amplitude even with the worst combination, the constant current source must be set as a design value. It is necessary to design the resistors R1゜ and R1□ to be large, but such settings will increase the current consumption, and if the output amplitude fluctuates considerably, the transistors Q, 2,
Q3. There was a problem in that the current was saturated and high-speed operation was no longer possible.

[Problem to be solved by the invention]

As mentioned above, in conventional circuits, there are variations in element characteristics during manufacturing between different integrated circuits, so it is necessary to set the operating current to a large value. There were problems such as not being able to do it.

The present invention has been made to solve the problems of the prior art as described above, and provides a signal transmission circuit that enables high-speed operation with low power consumption even when element characteristics vary due to manufacturing variations. The purpose is to

[Means to solve the problem]

In order to achieve the above object, the present invention is configured as described in the claims.

That is, in one aspect of the present invention, the receiving circuit side outputs the electrical characteristics of the circuit as a current value or voltage value, and the transmitting circuit side inputs the current value or voltage value from the receiving circuit,
The current value of the current signal to be sent out is controlled according to the input value.

With the above configuration, in the present invention,
Even if there is variation in element characteristics between the transmitting circuit and the receiving circuit, the current value on the transmitting side changes in response to the difference, so there is no need to set a large current value at the design stage. Therefore, low power consumption and high speed operation are possible.

[Embodiments of the invention]

FIG. 1 is a block diagram of a first embodiment of the present invention.

In FIG. 1, 1 is a transmitting circuit, 2 is a receiving circuit, 3 is an input terminal for digital signals from the previous stage circuit to the transmitting circuit 1,
4 is a current signal output terminal, 5 is a characteristic input terminal of the receiving circuit,
6 is a characteristic detection circuit of the receiving circuit.

7 is a digital signal/current signal conversion circuit, 8 is a transmission diagram j
11 is a wiring that connects to the receiving circuit 2, 9 is a current signal input terminal of the receiving circuit, 10 is an output terminal for a digital signal from the receiving circuit 2 to a subsequent circuit, and 11 is a characteristic output terminal of the receiving circuit.

The above digital signal input terminal 3, current signal output terminal 4,
Wires 8, current signal input terminals 9, and digital signal output terminals 10 are provided as many as the number of digital signals to be transmitted.

The operation will be explained below.

The transmitting circuit 1 includes a characteristic detection circuit 6 and a conversion circuit 7.

The characteristic detection circuit 6 receives the voltage, current, or current of the characteristic input terminal 5 as an input, and outputs a signal for controlling the output current level to the conversion circuit 7 in accordance with the input.

The conversion circuit 7 inputs one or more digital signals from the input terminal 3, and outputs a current signal corresponding to the high/low level of the digital signal voltage from the current signal output terminal 4. The current level of the current signal is set by a control signal given from the characteristic detection circuit 6.

The received image jI2 detects the original digital signal from the presence or absence or magnitude of a current flowing through the current signal input terminal 9, and outputs it from the digital signal output terminal 1o. Also.

It is equipped with a circuit (not shown, detailed in FIG. 2 onwards) that outputs a current value or voltage value representing the electrical characteristics of the receiving circuit itself, and outputs the above current value or voltage value from the characteristic output terminal 11. .

Next, FIG. 2 is a detailed circuit diagram of the embodiment of FIG. 1. The specific operation will be explained below using FIG. 2. Note that in FIG. 2, the same symbols as in FIG. 1 indicate corresponding parts.

First, FIG. 2(a) shows an example of a circuit that transmits and receives three digital signals.

Diodes D8, D2 . in the receiving circuit 2 . Resistance R6, R□
and transistor Q1 constitute a constant current source.

This circuit is a circuit that outputs the element characteristics of the receiving circuit 2 as a current value.

This constant current AM outputs a constant current from the collector of the transistor Q□, which is sent from the characteristic output terminal 11 to the transmitting circuit 1 side.

The value of constant current is I, = Vt/R□ (1), where vT is the forward voltage drop of the PN junction and is 0.8
The value is about v.

The constant current factor described above is inversely proportional to the resistance R1 of the receiving circuit 2. The receiving circuit 2 is constructed of one integrated circuit, and the characteristics of each element tend to be the same, so the value of the resistance R□ is determined by the electrical characteristics of the receiving circuit 2 (
Therefore, the value of the constant current E indicates the electrical characteristics of the received image M2.

The characteristic detection circuit 6 in the transmitting circuit 1 receives the current output from the characteristic output terminal 11 of the receiving circuit 2 from the characteristic input terminal 5 . and transistors Q2, Ql, Q, ,Q
, three sets of currents are generated by a current mirror circuit composed of .

In this case, the size ratio of transistors Q, ,Q, ,Q, is set to Q
If it is N times as large as □, the collector current Ic of Ql, Q, , Q, is given by the following equation (2).

Ic:N1. (2) The conversion circuit 7 is composed of three sets of current switches each consisting of two transistors. Each current switch switches the current path according to the input digital signal, and outputs the collector current 1c of the transistors Q3, QiQ as a current signal from the current signal output terminal 4.

For example, a current switch including transistors Q and Q7 outputs the collector current Ic of transistor Q as a current signal.

The receiving circuit 2 inputs the current signal from the transmission diagram J11 from the current signal input terminal 9, and connects a resistor R2, a transistor Q, .
Q, and a constant current source that provides a fixed bias current. It is converted into a digital signal by a current detection circuit consisting of: This digital signal is output to the subsequent circuit through the digital signal output terminal 1o.

Output voltage V OUT of the above digital signal output terminal 1o
The low level V0UTL and high level VOUT)l are shown by the following equations (3) and (4).

Vourb=Vcc-R,X (Ic+I,
1)=Vcc Rz (N 11+ IO) −(3
)V0LITH=Vcc-R2I.
・(4) As mentioned above, the high level and low level of the output voltage V OUT are not directly related to the element characteristics of the transmitting circuit 1 (resistance value and transistor hpE), but are directly related to the transmitting circuit and the receiving circuit. Unaffected by variations in element characteristics between circuits. Therefore, even if the transmitting circuit 1 and the receiving circuit 2 are formed of different integrated circuits and the variation in element characteristics exhibits different trends, a stable output voltage can always be obtained without being affected by this.

Next, FIG. 2(b) shows a circuit in which the number of wiring lines 8 between the transmitting circuit 1 and the receiving circuit 2 is reduced.

This circuit uses only one side of the output of the current switch of the conversion circuit 7.

The configuration of this circuit is basically the same as that shown in FIG. 2(a), except that the current detection circuit in the receiving circuit 2 is a transistor Q. , resistor R2, resistor R0 that generates the threshold voltage
^, Rlg, and a comparator 12.

The above threshold voltage VTR is R1^+R,a is given by

Also, transistor Qyu. The collector potential v1 of is.

It is expressed by the same formula as VOLIT above.

The comparator 12 detects the magnitude between the collector potential v1 and the threshold voltage VTH, and the result is output as a digital signal from the digital signal output terminal 10. Therefore, in this case as well, the device is not affected by variations in elements between the transmitting circuit 1 and the receiving circuit 2, as described above.

Next, FIG. 2(c) shows the receiving circuit 2 of FIG. 2(a).
This is an embodiment in which the transistors Q1 and Q and the resistor R2 in FIG.

In Figure 2 (C), the collector current of transistor Q8 is input to a current mirror circuit made up of transistors Q□1 and Q12, and the current mirror circuit made up of transistors・Input to mirror circuit. Also, the collector current of transistor Q9 is Q1
3 and Q14, the collector of transistor Q14 and the collector of Q1& are connected, and the high/low potential thereof is output as a digital signal.

Next, FIG. 3 is a block diagram of a second embodiment of the present invention.

In this embodiment, by superimposing the transmission and reception of the characteristics of the receiving circuit on the wiring 8 for transmitting the current signal, the 11th! The wiring connecting between the characteristic input terminal 5 and the characteristic output terminal 11 in the embodiment I is omitted.

In FIG. 3, the receiving port N2 outputs a potential representing the characteristics of the receiving circuit to the wiring 8 as the potential of the current signal input terminal 9. The characteristic detection circuit 6 includes a wiring 8 for transmitting current signals.
The potential of is input from the input terminal 5.

In this embodiment, since there is no need for wiring to transmit the characteristics of the receiving circuit, it is possible to reduce the number of wiring lines.
There is an advantage.

FIG. 4 is a specific circuit example diagram of the embodiment of FIG. 3,
The case where one digital signal is transmitted will be exemplified.

In FIG. 4, a characteristic detection circuit 6 receives the potential of a wiring 8 for transmitting a current signal from an input terminal 5.

The input terminal 5 is connected to the bases of the emitter followers of the transistors Q2° and Q2□, and a resistor R2o is connected to the connection point of their emitters. The other end of the resistor R2° is connected to the input end of a current mirror circuit composed of transistors Q2□ and Q23. The output of the current mirror circuit is given to the conversion circuit 7.

The operation of the conversion circuit 7 is the same as that shown in FIG. 2(a).

The receiving circuit 2 passes the current input from the current signal input terminal 9 to the emitter of the common-base transistor Qx4, detects the original digital signal by the potential drop of the resistor R21 connected to the collector side, and converts it into a digital signal. It is output from the output terminal 10.

On the other hand, the potential V of the current signal input terminal 9 is determined by the potential drop of the resistor R0 and the transistor Q8. It can be expressed using the sum of the base-emitter junction potentials, as shown in equation (5) below.

V,=Vcc−Rzz(It”N+2Io)
-2"V"' (5) However, 1. =(Vs 2
Vt) /Riate.

Further, the base current of the transistor is ignored as it is sufficiently small.

From the above equation (5), the low level V0UTL and high level vOυTH of the output voltage of the digital signal output terminal 10 are:
It becomes as shown in the following formulas (6) and (7).

Vour+,=Vcc-R,2(I,N+2 I.)-
R, □ (rz・N+I.) ... (6) Vout
o=Vcc R22(I2N+ 2 IO) Rz
x・I.

... (7) Logic amplitude VHL (= VOUTH - VO
IJTL) is as shown in equation (8) below.

VHL:R81・I,・N R2 □ N R,.

As a specific value, for example, N=1. I. =0.1mA,
Vt=0.8V, Vcc=5V, R,,=
180Ω, R2□=100Ω, R3□=180Ω, then VH+, : 0,5 V.As a deviation of the resistance ratio, the resistance R on the integrated circuit is
If the ratio of 22 and Rli is 5%.

becomes. Further, the ratio of resistances R2° and R2□ on different integrated circuits varies greatly since there is no correlation.

If it is 50%, becomes.

Calculating the deviation of logic 111VHL from the above values.

The equation (9) below is obtained.

As can be seen from the above equations (10) and (11), even if the resistance deviation between the integrated circuits is ±50%, the deviation in the output logic amplitude is suppressed to about half, or ±27.5%.

Looking at this operation from another perspective, if the resistance value of transmitting circuit 1 is as designed, and the resistance value of receiving circuit 2 is half of the designed value, then the potential drop across resistor Raa is half of the designed value. Therefore, the potential of V increases. For this reason,
The current flow 2 flowing into the characteristic detection circuit 6 increases, and the conversion circuit 7
The output current of will also increase. Therefore, the resistance R21 of the receiving circuit 2
The current flowing through the resistor R2□ increases, and the output logic amplitude VI4L increases to compensate for the decrease in the resistance R2□ during manufacturing. Due to such a feedback operation, even if there is resistance deviation between integrated circuits, deviation in output logic amplitude can be suppressed.

Next, FIG. 5 is a diagram showing another example of each circuit in FIG. 4, with (a) showing a transmitting circuit and (b) showing another example of a receiving circuit.

First, FIG. 5(a) shows a constant current source in the receiving circuit 2 of FIG. This is an example of a transmitting circuit when the transmitting circuit 1 is provided on the transmitting circuit 1 side.

In this circuit, a transistor Q2 is added to the current mirror circuit in the characteristic detection circuit 6, and its collector current is directly connected to the current signal input terminal 4.

This is a constant current source. It is bound.

FIG. 5(b) shows another embodiment of the receiving circuit 2, in which the fluctuation of the voltage v9 at the current signal input terminal 9 is reduced to almost zero.
It was suppressed to

The potential difference between the PN junctions has current dependence, and in the circuits shown in FIGS. 2 and 4, the potential of the voltage vg is several 10
Varies by mV. In order to cancel this current dependence, diodes D8 and D4 are inserted between resistors R21 and R22, the base potential of transistor Q29 is supplied from the connection point of diode D3 and resistor R21, and diode D4
The base potential of the transistor Q211 is supplied from the connection point between the resistor R21 and the resistor R21.

As a result, the potentials vg^ and V of the current signal input terminal 9
, B are expressed by the following equations (12) and (13).

Vs^=Vcc R22 (IA + IB+ 2 I
n) V'r, Vt2+++ (12) V, a=
Vcc-R, □(IA+IB+2I+1) VT3
Vt4-(13) However, VT engineering: Potential drop of D4 Vt2: Voltage drop between BE of Qzs VT, : D
3 potential drop VT,: Voltage drop between BE of Q2g Here, if the voltage drop in the diode, that is, the above VT and VT, is VTD, where, VT: current flowing through the diode, CD: coefficient, k : Boltzmann's constant q: Electron charge T: #@ vs. temperature.

voltage drop across the transistor, Sunawa In other words, if the above VT2 and VT are assumed to be VTQ.

However, it is known that ■ = emitter current CQ: can be expressed as a coefficient, so by substituting these into equations (12) and (13) above, +Co -log (I^+ Io) +CQ... (
14) +Ce --log(In+In) +C.

...(15) becomes.

As can be seen from equations (14) and (15) above, v9^
=Vsa.

Therefore, if a single receiving circuit is used, even if the current at the current signal input terminal 9 increases or decreases according to the digital signal, ■, ^
, Vsa will no longer fluctuate in potential. Therefore, even if the capacitance parasitic to the wiring 8 is large, no charging/discharging current flows, allowing high-speed operation.

Note that although the explanation so far has focused on a circuit using an NPN transistor, it is easily understood that the same operation can be performed even when a PNP transistor is used. Also, an NPN transistor can be replaced with an N-channel FET, and a PNP
Even if the transistor is replaced with a P-channel FET, the same operation will occur.

〔Effect of the invention〕

As explained above, in the present invention, the electrical characteristics (resistance value or current value related to the resistance value) of the receiving circuit are sent to the transmitting circuit, thereby controlling the current output level of the transmitting circuit. As a result, the transmitting circuit and receiving circuit are mounted on separate integrated circuits, which increases the element deviation of each integrated circuit.

Even when the resistance deviation is large, the operating margin can be increased. Therefore, it is not necessary to trim the resistor on the integrated circuit or use an external individual resistor, so it is suitable for integration into an integrated circuit. In addition, since potential fluctuations in the wiring that transmits current signals can be made extremely small, high-speed operation is possible even if the parasitic capacitance of the wiring is large.

Furthermore, since it is less susceptible to the influence of parasitic capacitance of wiring, the current level can be reduced, resulting in many excellent effects such as lower power consumption.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the first embodiment of the present invention, and FIG. 2 (
a), (b), and (c) are respectively concrete circuit example diagrams of the embodiment of FIG. 1, FIG. 3 is a block diagram of the second embodiment of the present invention, and FIG. 4 is an implementation of the embodiment of FIG. A concrete circuit side diagram of the example, FIG. 5 is a diagram of another concrete circuit example of the embodiment of FIG. 3, and FIG.
Figures a) and (b) are circuit diagrams of conventional current mode transmitter/receiver circuits, respectively. <Explanation of symbols> 1... Transmission circuit 2... Receiving circuit 3... Digital signal input terminal 4... Current signal output terminal 5... Receiving circuit characteristics input terminal 6... Receiving circuit characteristics Characteristic detection circuit 7...Digital signal/current signal conversion circuit 8...Wiring 9...Current signal input terminal 10...Digital signal output terminal 11...Substitute for the characteristic output terminal of the receiving circuit Figure 2 (C) Figure 3 (a) (b) Figure 5

Claims (1)

[Claims] A transmitting circuit that converts a given digital signal into a current signal and sends it depending on the presence or absence of current or the magnitude of the current, and a transmission circuit that inputs the current signal, converts it to the original digital signal, and outputs the signal. A signal transmission circuit comprising a receiving circuit, wherein the receiving circuit includes a circuit that outputs the electrical characteristics of the circuit as a current value or a voltage value, and the transmitting circuit outputs the electrical characteristic of the circuit as a current value or a voltage value. What is claimed is: 1. A signal transmission circuit comprising: a circuit that inputs a current signal and controls a current value of a current signal to be sent out according to the input value.