JP3407848B2 - Interface circuit for signal transmission - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interface circuit for transmitting signals between electronic units, and more particularly to a technique for preventing a decrease in noise margin.

[0002]

[Prior art]

(Conventional example 1) A ground potential VGa between the electronic units 1 and 2,
When there is a difference in VGb or a difference in power supply voltages Va and Vb, it is general to use the differential transmission method as shown in FIG. Since the threshold voltage of the reception IC circuit 5 becomes the cross point of the positive signal level and the negative signal level, it has a property that it is hardly affected by the fluctuation of the ground potential or the power supply voltage. The positive signal line LP and the negative signal line LN may or may not be twisted together,
In both cases, noise of almost the same level is carried, so the deduction is zero, and there is a strong merit in the influence of noise. On the other hand, ECL (Emitter) is used as an interface IC that can transmit both negative and positive signals.
Coupled Logic) and special products must be used. However, special products are expensive. Meanwhile, ECL
Consumes a large amount of power and cannot be directly connected to TTL / CMOS, so a conversion circuit is required. (Embodiment 2) When TTL or CMOS is used as the interface circuit between the electronic units as shown in FIG. 5, the output voltage of L / H level is changed to VOL / VOH, L / H.
If the level input voltage is VIL / VIH, H level noise margin = VOHmin−VIHmin (1) L level noise margin = VILmax−VOLmax (2) For example, LS type (low power Schottky type) TTL
In the case of, if 0V is applied to the ground pin and 5.0V is applied to the power supply pin, VOHmin = 2.7V, VIHmin = 2.0V,
Since VILmax = 0.8V and VOLmax = 0.5V, H level noise margin = 2.7-2.0 = 0.7V (3) L level noise margin = 0.8-0.5 = 0. It becomes 3V (4).

[0003]

In the interface circuit of FIG. 5 using TTL / CMOS, the electronic unit 1,
If the ground potentials VGa and VGb of 2 fluctuate, the L level noise margin = VILmax-VOLmax may be reduced. Similarly, the power supply voltage V of the electronic units 1 and 2 is
When a and Vb change, H level noise margin = VOH
min-VIHmin may be small.

According to the present invention, TTL / CMOS can be used and the ground potential VG of two electronic units can be used.
It is an object of the present invention to provide an interface circuit that can reduce the decrease in the L level noise margin or the H level noise margin even if a, VGb change or the power supply voltages Va, Vb change.

[0005]

[Means for Solving the Problems]

(1) The invention of claim 1 relates to a signal transmission interface circuit including a transmission IC circuit mounted on a first electronic unit, a reception IC circuit mounted on a second electronic unit, and a ground voltage correction circuit. In the transmitter IC circuit, the first DC voltage (Ea) is applied to the positive power supply input terminal from the first power supply, and the first ground potential (VGa) is supplied to the negative power supply input from the first ground terminal that applies a common potential to the first electronic unit. Given to the terminal.

The receiving IC circuit receives the signal transmitted from the transmitting IC circuit and receives the first DC voltage (Ea) from the second power source.
A second DC voltage (Eb) having substantially the same magnitude is applied to the positive power supply input terminal. The ground voltage correction circuit has an operational amplifier and a pnp type transistor, and the operational amplifier is
The positive phase input terminal is the first ground terminal (first terminal) of the first electronic unit.
Has a ground potential), the negative-phase input terminal and the output terminal are respectively connected to the emitter and the base of the transistor, the collector of the transistor is connected to the negative power supply,
The emitter voltage held at the first ground potential is supplied to the negative power supply input terminal of the receiving IC circuit.

(2) The invention according to claim 2 is a signal transmission interface circuit comprising a transmission IC circuit mounted on the first electronic unit, a reception IC circuit mounted on the second electronic unit, and a power supply voltage correction circuit. Regarding In the transmitter IC circuit, the first DC voltage (Ea) is applied to the positive power supply input terminal from the first power supply, and the first ground potential (VGa) is supplied to the negative power supply input from the first ground terminal that applies a common potential to the first electronic unit. Given to the terminal.

The receiving IC circuit receives the signal transmitted from the transmitting IC circuit, and has a second ground terminal that gives a common potential to the second electronic unit and has a first ground potential of the first electronic unit and a size substantially equal to that of the first ground potential of the first electronic unit. 2 Ground potential (VGb) is applied to the negative power supply input terminal. The power supply voltage correction circuit has an operational amplifier and an npn-type transistor, and the operational amplifier is
The positive-phase input terminal is connected to the first power supply, the negative-phase input terminal and the output terminal are connected to the emitter and the base of the transistor, respectively, and the collector of the transistor is connected to the second DC voltage (Ea) higher than the second DC voltage (Ea). Eb) is connected to the second power supply, and the emitter voltage held at the first DC voltage of the first electronic unit is supplied to the positive power supply input terminal of the reception IC circuit.

(3) The invention of claim 3 comprises a transmitting IC circuit mounted on the first electronic unit, a receiving IC circuit mounted on the second electronic unit, a ground voltage correction circuit and a power supply voltage correction circuit. The present invention relates to a signal transmission interface circuit. The transmitter IC circuit has a first DC voltage (E
a) is applied to the positive power supply input terminal, and the first ground potential (V
Ga) is applied to the negative power supply input terminal.

The receiving IC circuit receives the signal transmitted from the transmitting IC circuit. The ground voltage correction circuit has an operational amplifier and a pnp type transistor, and the positive phase input terminal of the operational amplifier is connected to the ground terminal (having the first ground potential) of the first electronic unit, and the negative phase input terminal and The output terminal is connected to the emitter and the base of the transistor, respectively, and the collector of the transistor is connected to the negative power supply.
The emitter voltage held at the first ground potential of the electronic unit is supplied to the negative power supply input terminal of the reception IC circuit.

The power supply voltage correction circuit includes an operational amplifier and an npn.
The operational amplifier has a positive-phase input terminal connected to the first power supply, a negative-phase input terminal and an output terminal connected to the emitter and the base of the npn-type transistor, and the collector of the npn-type transistor is Connected to a second power supply having a second DC voltage (Eb) greater than one DC voltage (Ea), and supplying the emitter voltage held at the first DC voltage of the first electronic unit to the positive power supply input terminal of the receiving IC circuit. To do.

(4) According to the invention of claim 4, in any one of the above (1) 1 to (3), the transmitting IC circuit and the receiving I
C circuit is TTL (Transistor Transi)
Stor Logic) or CMOS (Complete)
menthry Metal-Oxide Semi
It is composed of an on-dector.
(5) According to the invention of claim 5, in any one of the above (1) to (3), a plurality of channels are provided for each of the transmission IC circuit and the reception IC circuit.

[0013]

DETAILED DESCRIPTION OF THE INVENTION

(Embodiment 1) When the power supply voltages Ea and Eb of the interface circuits of the electronic units 1 and 2 have little variation and level difference, and the ground potentials VGa and VGb vary,
In the invention, as shown in FIG. 2, the ground potential correction circuit 8 is provided in the electronic unit 2. In FIG. 2, the same reference numerals are used for the parts corresponding to those in FIGS.

In the electronic unit 1, the DC voltage Ea is applied from the first power supply 4 to the positive power supply input terminals of the transmission IC circuits 3 of a plurality of channels. In addition, the first ground potential VGa is applied to the negative power supply input terminal from the first ground terminal Ga that applies a common potential to the electronic unit 1. In the electronic unit 2, a DC voltage Eb having substantially the same magnitude as the DC voltage Ea is applied from the second power supply 6 to the positive power supply input terminals of the reception IC circuits 5 of the plurality of channels which receive the signals transmitted from the transmission IC circuit 3. To be

The ground voltage correction circuit 8 mounted on the electronic unit 2 has an operational amplifier 8a and a pnp-type transistor 8b. The positive terminal of the operational amplifier 8a is connected to the ground terminal Ga ( To ground potential VGa). Further, its negative phase input terminal and output terminal are respectively connected to the emitter and base of the transistor 8b, and the collector of the transistor 8b is the negative power source 1
Connected to 0.

Since the input impedance of the positive / negative phase input terminals of the operational amplifier 8a is extremely large, the input current flowing therethrough can be neglected, so that there is no voltage drop due to wiring resistance and the input voltage between the input terminals is It becomes VGa-EL. EL is the emitter voltage of the transistor 8b.
The output voltage of the operational amplifier 8a is Vo, the voltage amplification factor is A, and the base-emitter voltage of the transistor 8b is Vbe (≈−
0.7V), (VGa-EL) A = Vo (5) EL + Vbe = Vo (6) From (5) and (6), (VGa-EL) A = EL + Vbe ∴EL = (VGa-Vbe / A) / (1 / A + 1) (7) Since the voltage amplification factor A is a very large value, EL = VGa (8) The emitter voltage EL = VGa corresponds to each receiving IC circuit 5
It is supplied to the negative power source input terminal of.

Even if the ground potentials VGa and VGb fluctuate, the ground potential VGa of the electronic unit 1 is applied to the negative power supply terminal of each reception IC circuit 5 similarly to the transmission IC circuit 3, and both circuits 3 and 5 are supplied. There is no potential difference between the negative power pins. Therefore, the decrease of the L level noise margin due to the fluctuations of the ground potentials VGa and VGb is reduced accordingly. Electronic unit 2
In, the IC circuits 9 of a plurality of channels are connected after the interface circuit. However, when it is necessary to secure a large noise margin of this circuit, the positive power source input terminal is set to the second terminal.
It suffices to connect it to the power supply 6 and connect the negative power supply input terminal to the emitter of the ground potential correction circuit 8. However, by arranging each IC circuit 9 in the vicinity of the corresponding receiving IC circuit 5, the wiring distance becomes short and the superimposed noise can be made extremely small. Therefore, the noise margin is not necessary as much as the interface circuit. Can connect the negative electrode input terminal to the ground terminal Gb (having a ground potential VGa) of the electronic unit 2. The positive power supply input terminal can be connected to a power supply 11 (having an output voltage Ec substantially equal to the power supply voltage Eb) for supplying operating power to other circuits in the electronic unit 2, if any.

Although FIG. 2 shows the case where a shield line for preventing the intrusion of noise is used as the transmission line L between the transmission IC circuit 3 and the reception IC circuit 5, a twisted line or a pair cable may also be used. is there. In some cases, a single wire may be used as in FIG. This point is the same in the examples of FIGS. 3 and 1 described later. (Embodiment 2) Ground potentials VGa and V of the electronic units 1 and 2
When the power supply voltages Ea and Eb of the interface circuit fluctuate although there is almost no fluctuation in Gb and the level difference, in the invention of claim 2, the electronic unit 2 is provided with the power supply voltage correction circuit 7 as shown in FIG. At the same time, the power supply voltage Eb of the second power supply 6 is set higher than the power supply voltage Ea of the first power supply 4.

In the electronic unit 2, the second ground potential VGb having substantially the same size as the first ground potential VGa of the electronic unit 1 is supplied from the second ground terminal Ga which gives a common potential to the electronic unit 2 to the negative power source of the receiving IC circuit 5. It is given to the input terminal. The power supply voltage correction circuit 7 comprises an operational amplifier 7a and an npn-type transistor 7b. The operational amplifier 7a has a positive-phase input terminal connected to the first power supply 4 through the wiring Le, a negative-phase input terminal and an output terminal connected to the emitter and base of the transistor 7b, and a collector higher than the first power-supply voltage Ea. 2 connected to the power supply 6.

The emitter voltage of the transistor 7b is EH,
If the emitter-base voltage is Vbe ′ (≈0.7V), the output voltage of the operational amplifier 7a is Vo ′, and the voltage amplification factor is A, then (Ea−EH) A = Vo ′ (9) EH + Vbe ′ = Vo '(10) From (9) and (10) (Ea-EH) A = EH + Vbe' ∴EH = (Ea-Vbe '/ A) / (1 / A + 1) (11) The voltage amplification factor A is extremely large. Therefore, EH = Ea (12) The emitter voltage EH = Ea is supplied to the positive power supply input terminal of each receiving circuit 5.

Power supply voltages Ea and Eb of the interface circuit
Even if fluctuates, the positive power supply terminal of each receiving IC circuit 5
A voltage equal to the power supply voltage Ea of the transmission IC circuit 3 of the electronic unit 1 is applied, and there is no potential difference between the positive power supply pins between the circuits 3 and 5. Therefore, the decrease in the H level noise margin due to the fluctuations in the power supply voltages Ea and Eb is reduced.

In the electronic unit 2, when it is necessary to increase the noise margin of the IC circuit 9 connected after the interface circuit, the positive power supply input terminal is connected to the emitter of the power supply voltage correction circuit 7, and the negative power supply input is connected. The terminal may be connected to the ground terminal Gb (VGb = VGa) of the electronic unit 2. However, the receiving IC circuit 5 and the IC
Since it is close to the circuit 9, the amount of noise to be superimposed here is small. Therefore, in many cases, the positive power source input terminal supplies the power source 11 (which supplies the operating power source to other circuits of the electronic unit 2). The power supply voltage Ec has a value close to Ea), if any, can be connected to it. (Embodiment 3) Ground potentials VGa, V of electronic units 1 and 2
When Gb fluctuates and the power supply voltages Ea and Eb of the interface circuits of the respective units fluctuate, in the invention of claim 3, as shown in FIG. 1, the embodiment 1 (FIG. 2) and the embodiment 2 (FIG. The ground potential correction circuit 8 and the power supply voltage correction circuit 7 used respectively in 3) are used. Since the embodiment of FIG. 1 is apparent from the above description, detailed description will be omitted.

In the above description, the transmission IC circuit 3 and the reception IC circuit 5 are TTL or CMOS, but the present invention is not necessarily limited to this case and can be widely applied to general transmission / reception IC circuits. .

[0024]

As described above, according to the present invention, the TTL is
By using the ground potential correction circuit 8 in the conventional interface circuit of FIG. 5 using / CMOS, the ground potential V of the transmission IC circuit 3 is applied to the negative power supply input terminal of the reception IC circuit 5.
A potential EL = VGa equal to Ga can be applied.
As a result, the ground potentials VGa, V of the electronic units 1, 2
Even if Gb fluctuates, there is no difference in the ground potential between the transmission IC circuit 3 and the reception IC circuit 5, and the decrease in the L bell noise margin can be suppressed accordingly.

Further, by using the power supply voltage correction circuit 7, it is possible to apply a power supply voltage EH = Ea equal to the power supply voltage Ea of the transmission IC circuit 3 to the positive power supply input terminal of the reception IC circuit 5. As a result, the interface circuits, that is, the power supply voltages Ea, E of the transmission IC circuit 3 and the reception IC circuit 5
Even if b changes, there is no substantial difference in the power supply voltage between the two circuits, and the decrease in the H level noise margin can be suppressed.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the invention of claim 3;

FIG. 2 is a circuit diagram showing an embodiment of the invention of claim 1;

FIG. 3 is a circuit diagram showing an embodiment of the invention of claim 2;

FIG. 4 is a circuit diagram of a conventional signal transmission interface circuit using ECL.

FIG. 5 is a circuit diagram of a signal transmission interface circuit using a conventional TTL or CMOS.

Claims (5)

(57) [Claims] 1. A transmitter IC mounted on a first electronic unit
A signal transmission interface circuit comprising a circuit, a reception IC circuit mounted on a second electronic unit, and a ground voltage correction circuit, wherein the transmission IC circuit is connected to a first DC voltage (E) from a first power source.
a) is applied to a positive power supply input terminal, and a first ground potential (VGa) is applied to a negative power supply input terminal from a first ground terminal that applies a common potential to the first electronic unit. The signal transmitted from the IC circuit is received, and the first DC voltage (Ea) is supplied from the second power source.
A second direct current voltage (Eb) having substantially the same magnitude is applied to the positive power supply input terminal, the ground voltage correction circuit has an operational amplifier and a pnp type transistor, and the operational amplifier has a positive phase input terminal The first electronic unit is connected to the first ground terminal (having the first ground potential), the negative phase input terminal and the output terminal are connected to the emitter and the base of the transistor, respectively, and the collector of the transistor is connected to the negative power supply. Is
An interface circuit for signal transmission, wherein the emitter voltage held at the first ground potential is supplied to a negative power supply input terminal of the receiving IC circuit. 2. A transmission IC mounted on the first electronic unit
A signal transmission interface circuit comprising a circuit, a reception IC circuit mounted in a second electronic unit, and a power supply voltage correction circuit, wherein the transmission IC circuit is connected to a first DC voltage (E) from a first power supply.
a) is applied to a positive power supply input terminal, and a first ground potential (VGa) is applied to a negative power supply input terminal from a first ground terminal that applies a common potential to the first electronic unit. A second ground potential (VGb) having substantially the same size as the first ground potential of the first electronic unit is negative from a second ground terminal that receives a signal transmitted from the IC circuit and applies a common potential to the second electronic unit. The power supply voltage correction circuit has an operational amplifier and an npn-type transistor, and the operational amplifier has a positive phase input terminal connected to the first power supply and a negative phase input terminal and an output terminal. A second direct voltage (Eb) greater than the first direct voltage (Ea), the collector of the transistor being respectively connected to the emitter and the base of the transistor;
An interface circuit for signal transmission, which is connected to a power supply and supplies an emitter voltage held at a first DC voltage of the first electronic unit to a positive power supply input terminal of the reception IC circuit. 3. A transmission IC mounted on the first electronic unit
A circuit and a receiving IC circuit mounted on the second electronic unit,
A signal transmission interface circuit comprising a ground voltage correction circuit and a power supply voltage correction circuit, wherein the transmission IC circuit is a first DC voltage (E) from a first power supply.
a) is applied to a positive power supply input terminal, and a first ground potential (VGa) is applied to a negative power supply input terminal from a first ground terminal that applies a common potential to the first electronic unit. A signal transmitted from an IC circuit is received, and the ground voltage correction circuit has an operational amplifier and a pnp-type transistor, and the operational amplifier has a positive-phase input terminal that is the ground terminal of the first electronic unit (the first electronic unit). To the first ground potential of the first electronic unit, the negative phase input terminal and the output terminal are respectively connected to the emitter and the base of the transistor, and the collector of the transistor is connected to the negative power supply. The held emitter voltage is supplied to the negative power supply input terminal of the reception IC circuit, and the power supply voltage correction circuit has an operational amplifier and an npn-type transistor. The operational amplifier has a positive-phase input terminal connected to the first power supply, a negative-phase input terminal and an output terminal connected to the emitter and the base of the npn-type transistor, respectively, and the collector of the npn-type transistor is the first direct current. Second DC voltage (Eb) larger than voltage (Ea)
Is connected to a second power source having an emitter voltage held at the first DC voltage of the first electronic unit.
An interface circuit for signal transmission, which is supplied to a positive power source input terminal of the circuit. 4. The transmission IC circuit and the reception IC circuit according to claim 1, wherein the transmission IC circuit and the reception IC circuit are TTL (Trans).
istor Transistor Logic) or CMOS (Complementary Metal)
An interface circuit for signal transmission, which is configured by an Oxide Semiconductor. 5. The signal transmission interface circuit according to claim 1, wherein each of the transmission IC circuit and the reception IC circuit is provided with a plurality of channels.