JPH03280754A - Packet terminal equipment - Google Patents
Packet terminal equipmentInfo
- Publication number
- JPH03280754A JPH03280754A JP2082643A JP8264390A JPH03280754A JP H03280754 A JPH03280754 A JP H03280754A JP 2082643 A JP2082643 A JP 2082643A JP 8264390 A JP8264390 A JP 8264390A JP H03280754 A JPH03280754 A JP H03280754A
- Authority
- JP
- Japan
- Prior art keywords
- packet
- circuit
- transmission
- output
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 17
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000005021 gait Effects 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
Landscapes
- Data Exchanges In Wide-Area Networks (AREA)
- Communication Control (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はパケット端末装置に関し、特にパケット情報の
流量規制が可能なパケット端末装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a packet terminal device, and particularly to a packet terminal device capable of regulating the flow rate of packet information.
従来パケット情報の流量制御としては、送信したパケッ
トに対する受信側での受は入れ可否の応答により次のパ
ケットの送信の可否を判断するような手段でなされてい
る。Conventionally, the flow rate of packet information has been controlled by means of accepting a transmitted packet on the receiving side and determining whether or not to transmit the next packet based on a response indicating whether or not the next packet can be transmitted.
上述した従来のパケット端末装置は、送信したパケット
に対する受信側からの応答により、流量の制御を行って
いるので、送信装置における処理量の増加に対して高速
な伝送により処理量の増加を消化することが不可能にな
る欠点があった。The conventional packet terminal device described above controls the flow rate based on the response from the receiving side to the transmitted packets, so the increase in processing amount at the transmitting device can be accommodated by high-speed transmission. There was a drawback that made it impossible.
本発明のパケット端末装置は送信情報量があらかじめ定
めらたパケット端末装置において、送信要求の有ったパ
ケット情報を一時記憶する記憶回路と、この記憶された
パケット情報を伝送路に送出する送信回路と、定められ
た歩位のパケットを送信するごとにパルスを発タジする
パルス発生回路ど、このパルス発生回路に接続されたデ
ィジタルフィルタと、このディジタルフィルタの出力値
とあらか)二め定められた一定値とを比較する比較回路
と、この比較回路の結果によりあらかじめ定められた一
定値以下と判断された場合に記憶回路に記憶されたパケ
ットを送信する。The packet terminal device of the present invention is a packet terminal device in which the amount of information to be transmitted is predetermined, and includes a storage circuit that temporarily stores packet information requested for transmission, and a transmission circuit that sends out the stored packet information to a transmission path. , a pulse generation circuit that emits a pulse every time a packet of a predetermined gait is transmitted, a digital filter connected to this pulse generation circuit, and the output value of this digital filter). A comparison circuit compares the predetermined value with a predetermined value, and if the result of the comparison circuit determines that the packet is less than or equal to a predetermined value, the packet stored in the storage circuit is transmitted.
次に本発明について図面を参照して説明イる。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.
図において入力端子1よりパケット送信要求に基づきバ
ケット信号が入力される。入力されたパケットは記憶回
路8に記憶される。送信回路2において後述のごとく受
は入れて送信可能状態にあれば、パケットを送信可N2
を介して出力端子3に出力する。なお出力端子3はバク
ット中継装置、パケット・交換機などに接続されてバケ
ット信号を出力する。一方記憶回路8からの出力は分岐
しパルス発生口H54:も入力される。パルス発生回路
5においてはバケッI・が入力するごとに一定のパルス
が出力されディジタルフィルタ6に入力されるが、ディ
ジタルフィルタ6では例えば第2図に示されるように、
1次フィルタで構成され入力の平滑化効果を持つ。比較
回路7′τ゛は平滑出力と端子4に設定された一定値と
比較される7も!1.も平滑出力が一定値以上の場合に
は既に決められた以上のトラヒックが入力されソ4:、
と判断!2、送信不能状態としさもなければ送信可能状
態と判断する。In the figure, a bucket signal is input from an input terminal 1 based on a packet transmission request. The input packet is stored in the storage circuit 8. If the transmitting circuit 2 accepts the packet as described later and is in a transmittable state, the packet can be transmitted N2
It is output to output terminal 3 via. Note that the output terminal 3 is connected to a bucket relay device, a packet switch, etc., and outputs a bucket signal. On the other hand, the output from the memory circuit 8 is branched and also input to the pulse generation port H54:. In the pulse generating circuit 5, a constant pulse is output every time the bucket I is inputted and is inputted to the digital filter 6. In the digital filter 6, for example, as shown in FIG.
It is composed of a first-order filter and has the effect of smoothing the input. Comparison circuit 7'τ'' compares the smoothed output with a constant value set at terminal 4! 1. If the smoothed output is above a certain value, more traffic than the predetermined amount will be input.
Judgment! 2. It is determined that the state is not transmittable, otherwise it is determined that the state is capable of transmitting.
この比較出力は記憶回路8に入力される。記憶回路8に
おいては送信可能状態と判断された場合に、バク′ット
は送信回路2を介(〜て出力端子3に出力される。This comparison output is input to the storage circuit 8. In the storage circuit 8, when it is determined that the transmission is possible, the back cut is outputted to the output terminal 3 via the transmission circuit 2.
以上説明したように本発明は、パケットの送信量を比較
回路に入力させる一定値と比較計測することにより、簡
単な流量制御を行う。17たかってバケッ)・情報の流
量の多い高速なパケッ■・伝送網を構成できる効果があ
る。As described above, the present invention performs simple flow rate control by comparing and measuring the amount of packet transmission with a constant value input to a comparison circuit. 17) ・High-speed packets with a large flow of information ・It is effective in constructing a transmission network.
は本実施例で用いるディジタルフィルタの回路図である
。is a circuit diagram of a digital filter used in this embodiment.
1・・・入力端子、2・・・送信回路、3・・・出力端
子、4・・・端子、5・・・パルス発生回路、6・・・
ディジタルフィルタ、7・・・比較回路、8・・・記憶
回路。DESCRIPTION OF SYMBOLS 1... Input terminal, 2... Transmission circuit, 3... Output terminal, 4... Terminal, 5... Pulse generation circuit, 6...
Digital filter, 7... Comparison circuit, 8... Memory circuit.
Claims (1)
いて、送信要求の有ったパケット情報を一時記憶する記
憶回路と、この記憶されたパケット情報を伝送路に送出
する送信回路と、定められた単位のパケットを送信する
ごとにパルスを発生するパルス発生回路と、このパルス
発生回路に接続されたディジタルフィルタと、このディ
ジタルフィルタの出力値とあらかじめ定められた一定値
とを比較する比較回路と、この比較回路の結果によりあ
らかじめ定められた一定値以下と判断された場合に記憶
回路に記憶されたパケットを送信することを特徴とする
パケット端末装置。In a packet terminal device in which the amount of information to be transmitted is predetermined, there is a storage circuit that temporarily stores packet information that has been requested to be transmitted, a transmission circuit that sends out this stored packet information to a transmission path, and A pulse generation circuit that generates a pulse every time a packet is transmitted, a digital filter connected to this pulse generation circuit, a comparison circuit that compares the output value of this digital filter with a predetermined constant value, and this comparison circuit. 1. A packet terminal device that transmits a packet stored in a storage circuit when the result of the circuit is determined to be less than a predetermined value.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2082643A JPH03280754A (en) | 1990-03-29 | 1990-03-29 | Packet terminal equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2082643A JPH03280754A (en) | 1990-03-29 | 1990-03-29 | Packet terminal equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03280754A true JPH03280754A (en) | 1991-12-11 |
Family
ID=13780111
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2082643A Pending JPH03280754A (en) | 1990-03-29 | 1990-03-29 | Packet terminal equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03280754A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6342543A (en) * | 1986-08-08 | 1988-02-23 | Nippon Telegr & Teleph Corp <Ntt> | Packet flow controlling system |
JPH03147443A (en) * | 1989-11-02 | 1991-06-24 | Nec Corp | Packet multiplexer |
JPH03148939A (en) * | 1989-11-02 | 1991-06-25 | Nec Corp | Packet transmitter |
-
1990
- 1990-03-29 JP JP2082643A patent/JPH03280754A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6342543A (en) * | 1986-08-08 | 1988-02-23 | Nippon Telegr & Teleph Corp <Ntt> | Packet flow controlling system |
JPH03147443A (en) * | 1989-11-02 | 1991-06-24 | Nec Corp | Packet multiplexer |
JPH03148939A (en) * | 1989-11-02 | 1991-06-25 | Nec Corp | Packet transmitter |
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