GB2361139A - Flow control system for ethernet network devices - Google Patents

Flow control system for ethernet network devices Download PDF

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Publication number
GB2361139A
GB2361139A GB0008104A GB0008104A GB2361139A GB 2361139 A GB2361139 A GB 2361139A GB 0008104 A GB0008104 A GB 0008104A GB 0008104 A GB0008104 A GB 0008104A GB 2361139 A GB2361139 A GB 2361139A
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pause
buffer
time
memory
packets
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GB2361139B (en
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Bryan James Donoghue
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3Com Corp
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3Com Corp
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/11Identifying congestion
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/13Flow control; Congestion control in a LAN segment, e.g. ring or bus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/26Flow control; Congestion control using explicit feedback to the source, e.g. choke packets
    • H04L47/266Stopping or restarting the source, e.g. X-on or X-off
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/28Flow control; Congestion control in relation to timing considerations
    • H04L47/283Flow control; Congestion control in relation to timing considerations in response to processing delays, e.g. caused by jitter or round trip time [RTT]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/30Flow control; Congestion control in combination with information about buffer occupancy at either end or at transit nodes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/08Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0852Delays
    • H04L43/0864Round trip delays
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/16Threshold monitoring

Abstract

The generation of pause frames by a receiver of packets over a link is controlled by computing in a cycle short relative to the round trip delay of the link an actual or presumed change in the state of fullness of a packet buffer and selecting a pause time in accordance with the change. The pause time may vary up to the duration of a computing cycle. Various algorithms for computing the pause time employing different measures or parameters of the state of fullness of the buffer may be employed.

Description

2361139 FLOW CONTROL SYSTEM FOR ETHEKNET NETWORK DEVICES
Field of the Invention
This invention relates to flow control in packet-based communication networks and ill particular to a flow control system for network devices capable of sending over a duplex link control frames (hereinafter called 'pause frames') specifying a selectable pause in the Z sending of packets by a source connected to the other end of the link. The invention 1 h"ch is intended particularly relates to the generation of special pause frames in a manner w 1 1 1 to reduce storace requirements in network devices such as switches.
Z:- Background to the Invention
Packet-based communication systems such as Ethernet systems consist, in terins of hardware, of a multiplicity of links at each end of each of which two devices send addressed data packets to each other. In general, when a packet is received by a device the addressed data may be read to determine if required the next destination of the packet on its route to the ultimate end station. Typically the packet is temporarily stored. A packet may be stored in memory specifically dedicated to particular ports or may be stored in a common central memory. Typically, whether there is a common central memory or not, each port of a device has memory space associated with it. Whatever may be the arrangements for the temporary storage of packets before they are forwarded from a given device, it is a normal occurrence that a device (A) at one end of a link sends packets or frames to a receiving device at a rate higher than the receiving device can absorb them. The rate of 'absorption' may be influenced by a variety of factors, one being the rate at which the receiving device (B) can forward packets or frames. A second factor is tile traffic conditions on links from the device B to other devices. A third factor is the latency, for example inherent delays in processing in the devices A and B and so on. It is therefore customary to monitor the occupancy of memory space allotted to a given port or a group of ports and on the production of a signal, usually called watermark, indicating accordill(y to sonic selected criterion that the occupancy of memory exceeds a threshold, called watermark', a 'flow control' or 'pause' frame is sent by the device B to the source A of packets for that particular port or group of ports.
is It should be understood at this point that a group of ports may be linked together by nicans; of a trunk so as to Increase the rate of transmission of packets over a particular link. Further, the choice of a watermark is influenced by latency in the system. For example, It is normally necessary to allow for a round-trip time, i.e. a time including the time for a pause frame to travel to the source device A and for packets sent by the source to the receiver. For this reason the watermark usually denotes (directly or indirectly) sonic proportion of the allotted memory space rather less than the maximum physical capacity of the relevant memory space.
It Is normal practice in current systems, particularly those conforming to MEE Standard 802.3, to send 'flow control' or 'pause' frames which are organised to indicate a special globally assigned address, a relevant operation code and a pause time. A device conforming to that Standard will on receipt of such a control frame on a particular link, cease sending packets over the link for the time specified in the flow control frame. In the particular Standard, a pause frarne PAUSE (n) includes a number n, currently 16-bit, so that n may vary from zero (n = 0) to 216-1. If device A receives a PAUSE (n) frame from device B it will stop sending new data packets for a time proportional to n, conventionally defined as n5 12 bit times. It is also known to organise the sending of flow control fran-ies so that when the occupancy of the relevant memory space goes above an upper watermark a control frame specifying a very long pause time is sent whereas when the occupancy of the memory falls below a lower watermark, a control frame specifying a zero pause time. is sent. The former will be termed herein an XOFF frame whereas the latter will be termed an XON frame, since the latter may be interpreted by the source as allowing the sending of frames to recommence.
Owing to the need to accommodate wide variations in traffic conditions, systems sending an XOFF frame or XOFF frames when the memory contents exceed a watermark and an XON frame or XON frarnes when the contents fall below a watermark tend to require excessive memory. More particularly, if the receiving (buffer) memory has a 'high' watermark denotinc an extent of occupancy of the memory at which watermark an XOFF frame (n being a maximum or at least very large) Is sent, the occupancy of the mernory will continue to increase after the XOFF frame is sent. There will be a delay due to the propagation of the pause frame to source device A, a small but finite processing delay in device A before transmission of packets by device A over the link ceases and a further propagation delay until the last packet sent from the source device A before transmission ceased actually arrives at receiving device B. If X is the rate at which the source is sending packets and Y is the rate at which receiving, device is emptying the buffer memory and T is the 'round trip' delay, principally comprising the propagation and processing delays aforementioned, the additional memory space (known as the overflow memory) above the hlah watermark is (X-Y)T and in the worst case, if device B cannot empty the buffer at all, is XT.
It is therefore the general objection of the present invention to reduce the memory requirements in a system which employs pause frames for controlling the flow of packets over a duplex link.
Summary of the Invention
The invention is based on the sending of pause frames defining a pause time which is related to a measured or presumed change of the memory contents in an interval which is short compared with, for example, the round-trip delay and the times taken to fill or empty the memory completely. This may be achieved by computing a net increase in the memory contents in an interval of time and setting the pause time accordingly. The net increase may be negative, as when more bytes are removed during the interval than stored in it. It is possible to ignore negative values, by merely providing an XON frame, but in more sophisticated versions a 'credit' may be carried for-ward to a subsequent measurill(Y interval.
It is readily feasible to reduce the oscillation in the memory contents and reduce the size of the memory. However, as will be further explained, the effect of the reduction is in the memory space required below the high watermark.
Further features and objects of the invention will become apparent from the following description by way of example of a particular embodiment of the invention.
Brief Description of the Drawings
Flaure 1 illustrates by way of example the relevant parts of a network device which is c arranged to receive Tthernet' packets and frames over a duplex link., Flaure 2 illustrates packets and frames used by the link., Figure 3 is a diagram of a processing block used to implement the invention., 1 Ficure 4 is a dia,,raiii illustratin. a known form of flow control frame aeneration.
ZY C) 1-11 Figure 5 is a dia-i-am of periodic flow control frame generation in accordance with the invention Flaure 6 is a dia-i-am of another form of the processing block.
Detailed Description of Preferred Examples
Figure 1 illustrates by way of example only part of a network device for use in a packetbased data communication system. An example of such a device is a network switch, bridge, router or adapter which has a multiplicity of ports any one of which may be connected as one end of a communication link over sorne suitable transmission medium to another device. In normal circumstances sorne 6r all of the ports of such a device will be connected to other devices and may both send and receive data packets. For the sake of simplicity it will be presumed that the device shown in Figure 1 is for use as one end of a duplex communication link 10. and a port 11 is connected to that link. Typically, the port 11 contains several 'layers', such as the physical connection sub-layer, the media access control layer (MAC) and the media independent interface. For an explanation of these terms the reader is directed to the aforementioned Standard.
is The port 11 rnay be connected to a parser block 12 which reads for example addressed data from packets and controls by means of a pointer block 13 an interface 14 which determines where in a memory denoted 'R-x buffer' 15 a packet received by the port shall be stored. Typically the mernory 15 has respective memory space (which may vary) allotted to each of the ports. How this is organised is not important to the present invention. Data will be read out from the memory by means of a read controller 16 driving a read pointer and a read request to the interface 14 which will control the buffer 15. In this example, the occupancy of the memory space available for packets received by port 11 will be determined by the distance in terms of memory space between the read and write pointers obtainable from the RX pointer block 13 and the read controller 16. These pointers are employed by a processing block 17 for the initiation of pause frames by port 11, the flow control frames being generated in the prescribed format and in a manner known per se by the port 11.
It is emphasised that the architecture shown in Figure 1 is given only by way of example and, apart from the processing block 17, represents by way of example a large number of different types of network device- As will be apparent, the invention is applicable whatever the particular form of the memory provided that the state or degree of occupancy of the memory can be determined and compared with at least one predetermined or selected level or watermarks which defines a degree of occupancy of the memory and indicates a state in which flow control should be initiated.
The memory will have, M general, two predetermined levels or marks. Although the mernory may have a multiplicity of such marks, for the sake of simplicity only two will be idered, a 'high watermark.' (HWM) and a 'low watermark' (LWM). It is customary consi 1 n 1 to regard the memory space available over and above the high watermark as 'overflow' 1 C" memory, the memory space which has to be occupied before the low watermark is reached as the 'starvation' memory and the memory capacity between the hlch watermark and the low watermark as the 'hysteresis' memory- The hieh watermark and low watermark merely denote predetermined respective proportions (which may be controllably defined) of the respective available memory space. Whether the memory is above the HWM or below the LWM may be determined by comparing the difference between the read and write pointers with signals numerically representing the HWM and LWM.
It is commonplace to measure a length of a queue of packets by the length of a queue of pointers each of which identifies the location of the packet in memory. In such a case the available memory space may be represented in terms of the number of packets rather than the total space occupied by the packets. Accordingly, the read and write pointers may identify pointers themselves identifying locations of packets.
In some forms of the invention it is desirable to count the bytes of packets entering and leaving the memory 15. Recycling counters 15a and 15b may be used for this purpose. Such counters are well known perse.
Flaure 2 illustrates an ordinary data packet 20 which may be sent or received by the device shown in Figure 1 and a pause frame 21 which is conventionally prescribed for use as a flow control frarne The ordinary packet may consist (at a relevant time) of a start of frame delimiter (SFD), media access control address data usually constituted by a destination address (DA) and a source address (SA), protocol data, which may include for example a network or sub-net address, followed by message data and cyclic redundancy code (CRC) data. The usage of such packets Is well established and will not be described in detail.
Pause frame 21 shown ill Figure 2 is a conventionally defined control frame. Ill this embodiment of the invention it is intended to conform to the control frames described ill lEEE Standard 802.3, 1998 Edition, annexes 33 la and 3 lb, pages 1205-1215. As will be seen, the invention is applicable to analogous forms of flow control frames.
The particular form of control frame 21 described in the Standard includes, in place of the media access control data as shown for packet 20, a 'globally assigned' multicast address which is specified (and reserved) for use in MAC control pause frames to inhibit transmission of data frames from a data transmission entity in a full duplex mode. The control frame includes a special operation code, known as the 'pause' opcode and a request operand (n) which indicates the length of time for which inhibition of data frame transmission from the far end of the link is desired. The request operand is a 16-bit number and specifies a pause of n5 12 bit times.
As is described in the Standard, a data source which receives a flow control (pause) fra-nie of this nature is required to cease the sending of data frames or packets for the pause time and the arrival of a new pause frame overrides the action prescribed by any previous frame. How the source operates is not important to the present invention and is in any event at the choice of the user provided that the operation conforms to the Standard. Obviously, similar considerations must apply for other forms of flow control or pause frames.
Typically however a SOLUCC Will include a tinier which is set on receiving, a pause t 1 rarne and the source may recommence transmission of packets when the timer value reaches zero (i.e. tirnes out). If the received pause frame indicates a zero time, the tinier is immediately set to zero and transmission of packets may start or restart immediately.
It is known practice to define two types of pause control frames, of which one specifies substantially zero time, and thus defines a transmission ON state. The other may specify a pause time which is very long, n being a maximum or at least very large, and therefore can effectively define an 'OFF' state.
Flaure 3 illustrates scheniatically a processing block 17. It will receive on lines 30 and 3 1 the read and write pointers, signals representing the HWM and LWM on lines 32 and 33), a clock input on line 34, and signals denoting counts of bytes into and out of memory space on lines 35 and 36., the processing block will produce a flow control initiating signal on a line 37.
The invention will now be explained with reference to Figure 4, which illustrates conventional flow control and Figure 5 which illustrates a modified form of flow control. Both Figures show a variation of buffer content and pause status against time.
Flaure 4 illustrates a conventional method wherein a pause frame (XOFF) is sent by device B to device A when the high watermark is succeeded and an XON frame is sentby device B to device A when the low watermark is reached. It is assumed that the round-trip delay is T. Curve 40 shows the magnitude of the buffer contents against time. Graph 41 shows the 'pause status' of the device B. The sending of an XOFF pause frame is denoted by a necative-coine, transition such as 42 whereas the sendina of an XON frame is denoted by a positive-going transition such as 43. In a practical system the state of the memory Is 1 Z monitored at appropriate intervals and an initial XOFF frame may be followed by XOFF frames until the memory contents (curve 40) fall below the relevant mark. Likewise the -g- XON frame may be followed by further XON frames until the contents again reach the high watermark.
Also shown in Figure 4 is the transmit status 44 of the source device A. Since this device receives the control frames after a propagation delay slightly less than T/2, the transillit status resembles the pause status 4 1 but is correspondingly delayed.
In Ficure 4, the time to tO indicates the exceeding of the high watermark and the sending W of XOFF pause frame, as indicated in Figure 4 by the negative-going transition 42 at ti 1 ime tO. After the propagation delay from B to A and the processing delay in device A, the sending of packets by device A ceases but packets continue to arrive at B until the expiry of round trip delay T, at time t 1. The level of the memory at time t 1, exceeds the high watermark by (X-Y)T where X and Y are the filling rate and emptying rate for the buffer. Between time t 1 and time t') thebuffer contents decrease at rate Y. At time C the contents fall below the low watermark so the receiver generates an XON pause frai-ne 43. After the delay T, the content of the buffer will at time G) again start to increase. At time t4, the content of the buffer anin exceeds the high watermark and the events first described occur.
The time between t 1 and C is (assuming that X and Y are constant) given by the maximum height of the buffer content above LWM, (i.e. (X-Y)T+H where H is the difference between HWM and LWM, divided by the rate of absorption Y). The time between G and t4 is the difference between the lowest content level and the high watermark (YT+H) divided by the difference between the rate of transmission and the rate of absorption (XY).
The operation of processing unit for Figure 4 may be represented as follows:
If (status XON && buffer-contents > high-water-mark) send _pause (very_long-tinic) status = XOFF1.
else if (status XOFF &,& buffer-contents < low-water-mark) send_pause (zero_tlme),. status = XON.' The simple form of flow control shown in Figure 4 requires excessive memory principally because there is, or may be, a very large oscillation in the size of the contents of the buffer. The cause of the oscillation is the delay time 'T' between the sending of a pause frame and the consequent effect on data packets arriving at the device. Furthermore, if the device is not to suffer 'packet starvation', wherein there is no packet ill the buffer memory for processing then the starvation memory size 'below' the low watermark must be at least the product of Y, the rate at which device B can transfer packets from the memory, times the round trip propagation delay T.
1 If the memory requirement is to be reduced, the large oscillation in the buffer content as shown in Ficure 4 should be reduced. Obviously, some oscillation of the content of the Z:- buffer is inevitable, because the input buffer and its control mechanism form a control loop. The size of the oscillation is governed by the time period (T) of the feedback mechanisill.
The present invention reduces the time period of the control loop by measuring chances in the size of the buffer contents and in particular changes in the number of bytes read in and the number of bytes read out in a measuring interval At. which is at the choice of the designer provided that it is very much less than T. Since T is not necessarily known in advance, it is sufficient for At to be short, and preferably very short, in relation to the time taken to fill the memory in the worst case, when packets are read in at the maximum (design) rate and removed at a minimum rate (zero) and 'short' will be understood accordingly.
One possible algorithm for the operation of processing unit is set out in Algorithm 1 below.
Algorithm. 1 if (status BELOW-MARK &,& buffer-contents > high-water_mark) status = ABOVE-MARK,- else if (status = = ABOVE-MARK && buffer-contents < low-water-Mark) 1k status = BELOW-MARK,- buffer-credit bytes-out + (tick bytes-in) if (buffer_credit > tick) buffer-credit = tick; k 1 if (status ABOVE-MARK) send_pause(tick - buffer-credit),- 1 1 else It send_paLISC(O), 1 1 In algorithm 1, which is executed at the cycle time At, the quantity 'buffer-credit' is computed as the sum of 'tick' and the number of bytes read into memory minus the number of bytes read out of memory. The quantitly 'tick' is itself a product fo the time increment tt and a proportionality factor k representing a selected number of bytes. Other measures 1 direct or indirect of input and output rates may be employed.
While the contents of the memory are above the hleh watermark, the computation of 'buffer-credIt' is followed by the computation of the pause value (n) as the difference between 'tick' and 'buffer credit'.
It may be seen that n is in effect given by (bytes_lii content In the rneasurincy interval.
- bytes_out), i.e. the increase ill This results in the sending of a sequence of pause frames with a period At and a pause time which is less than At, as shown in Figure 5. After the delay T from the onset of such a sequence the content of the buffer oscillates but with a short cycle time. Thus the large oscillation in Flaure 4 is much reduced. Accordingly the size of the memory can be reduced because the oscillation occurs in the region above the high watermark and the requirement for memory space below the high watermark (and particularly the low watermark) is reduced.
Ill alerorlithm 1, if the content falls below the low watermark, so that the status is 'BELOW-MARK' an XON frame is sent, causing (after delay T) recommencement of the sending of frames by the source A. This is not essential. In particular it is feasible to send a sequence of XOFF and XON frames in a selected duty cycle as described in our copending application No.0007049.8 filed 24 March 2000, in order to limit more the memory space required in the buffer.
In algorithm 1 there is no storage of the buffer credit from one cycle of the algorithm (or implementincr state machine) to the next. A second algorithm provides in effect for the storacre of credits, by tracking the number of buffer credits issued in a preceding time ty period and issulno buffer credits if they are less than the free space in the buffer. A buffer credit is a defined period for which the link is riot halted by a pause frame.
A second algorithm is set out below as Algorithm 2.
Ali,orithni 2 total-credits = 0.1 for (time = tirne-now - T1 time ≤tli-ne-iiow, time = time + tick) total-credits = total-credits + credit (time),- free-credits = free-buffer - total-credits', if (free-credits > tick) ' buffer-credit = tick., else if (free_credits < 0) buffer credit= 0.1 else buffer-credit = free-credit.' 1 j for (time = time-now - T,- time ≤ time-now - tick; time = time + tick) It credit (time) = credit (time + tick); 1 1 send_pause(tick - buffer-Credit):
credit (time_now) = buffer-credit., AI-orithni 2 may be implemented by processing block 17a shown in Figure 6. Inserted of signals representing 'bytes in' and bytes out', it receives a signal denoting a selected time T, preferably correspondino to a worst case round trip time. The processing block also needs to know the size of the buffer memory in order to compute the free space available-, this may be built in or signalled to the block.
Algorithm 2 computes a quantity total-credits which represents the accumulated times of ON status of the receiver during a preceding time period T. The unoccupied memory space at any time is the quantity 'free buffer', from which 'total credits' is subtracted to give the quantity 'free_credits'. If this quantity is greater than 'tick', the value of 'buffer-credit' is equal to 'tick'. If 'free credits' is less than zero (indicating that the number of credits issued in the preceding time T is Greater than the current free space), buffer-credit is set to zero. Otherwise buffer-credit is equal to 'free-credit', and will be less than 'tick'.
The pause frame generated has the pause value (n) equal to 'tick' less the buffer credit.
c Although the second algorithm is more complex (and therefore more difficult to implement 1 1 in hardware) than the first, 'It has the advantage that measurement of the number of bytes into and out of the memory is not required.
The pause time defined in the pause frames [sent while the status is ABOVE-MARK] is a variable proportion of the time corresponding to 'tick'. It is not necessary to send any intervenin- XON frames because the ON status occurs on the expiry of the pause time.
A12withm 3 if (status = = BELOW-MARK &,&, buffer-contents > high-water_mark) status = ABOVE-MARK,spare-credits = 0.
else if (status ABOVE-MARK && buffer-contents < low-water-mark) 1k status BELOW-MARK,- if (status = = ABOVE-MARK) lk total-credits = bytes-out + (tick - bytes-in) + spare-credits if (total- credits > tick) 1, spare-credits = total-credits -tick; buffer-credit = tick., 4 1 else ' spare_credits = 0.1 buffer credit = total credits, send_pause(tick buffer credit):
1 f else 1 send_pause (0); 1 i Algorithm 3) requires the same inputs as Algorithm 1 and the pause time for status = ABOVE-MARK is computed in each cycle as (tick - buffer- Credit). However, the computation is modified by the value spare-credits, which is set to zero when the memory status chances to ABOVE-MARK. It is recomputed each time the algorithm is executed and the value carried for- ward to the next time the algorithm is executed. Thus 'spare-credits' is a persistent variable which carries its value from one execution cycle to the next. The value 'total-credits' is recomputed each time the algorithm is executed and is given by 'bytes_out' plus the previously computed value of 'spare_credits' plus 'tick' less 'bytes-iii'. The recomputed value of 'spare_credits' depends on whether 'total-credits' is areater than 'tick', whereupon 'spare-credits' becomes 'total-credits' minus 'tick' otherwise 'spare_credits' is set to zero. In the former case 'buffer-credit' is set to 'tick otherwise 'buffer-credit' becomes the newly computed value for 'total-credits'.
In this al-orithm the pause time for the ABOVE-MARK status varies up to 'tick', so that the OFF time in each cycle is represented by (tick buffer credit) and the ON m-ne H represented by 'buffei--credit'.
It is presumed in the foregoing that 'tick' is a constant this is preferable but not absolutely C necessary CI ai ills 1. A network device for receiving data packets over a transmission link and for providillu oil said lInk pause frames each of which prescribes the cessation of transmission of said packets to said device for a selectable pause tirne, cornprislila.
I- a memory for storing said packets., nleans for writing said data packets into said memory., is means for removing data packets from said memory.
means for indicating a state of fullness of said memory.
C 1 control means for repeatedly computing in a short cycle of operation a change in the state 1 g of fullness of the memory and operative to initiate a pause frame and to select the pause time thereof in accordance with said chanae in the state of fullness.
2, A network device accordina to claim 1 wherein said control means causes the production of a sequence of pause frames which alternately allow and inhibit tile transmission of packets on the link.
1 1 1 1 3. A network device according to claim 1 wherein said pause frame in each cycle prescribes a pause time which can vary up to the duration of the cycle.
4. A network device according to claim 3 wherein the control means determines said pause time in accordance with a net increase of the occupation of the memory space in a measurement cycle.
5. A network device according to claim 2 or 3 wherein said control means determines said 1 1 1 h pause time in accordance with an accumulation of values representing times during whic pause frames have allowed transmission on the link.
is
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Cited By (25)

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DE102005003016A1 (en) * 2005-01-21 2006-08-03 Infineon Technologies Ag Methods and apparatus for data transmission
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US8054832B1 (en) 2008-12-30 2011-11-08 Juniper Networks, Inc. Methods and apparatus for routing between virtual resources based on a routing location policy
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US9602439B2 (en) 2010-04-30 2017-03-21 Juniper Networks, Inc. Methods and apparatus for flow control associated with a switch fabric
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US10616143B2 (en) 2010-12-01 2020-04-07 Juniper Networks, Inc. Methods and apparatus for flow control associated with a switch fabric
US11711319B2 (en) 2010-12-01 2023-07-25 Juniper Networks, Inc. Methods and apparatus for flow control associated with a switch fabric
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