JPH03280149A - Carrier device for sheet paper or the like - Google Patents

Carrier device for sheet paper or the like

Info

Publication number
JPH03280149A
JPH03280149A JP2082030A JP8203090A JPH03280149A JP H03280149 A JPH03280149 A JP H03280149A JP 2082030 A JP2082030 A JP 2082030A JP 8203090 A JP8203090 A JP 8203090A JP H03280149 A JPH03280149 A JP H03280149A
Authority
JP
Japan
Prior art keywords
cpu
rank cpu
communication history
central processing
dual port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2082030A
Other languages
Japanese (ja)
Other versions
JP2604877B2 (en
Inventor
Toshiyuki Natori
名取 利幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Computertechno Ltd
Original Assignee
NEC Computertechno Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Computertechno Ltd filed Critical NEC Computertechno Ltd
Priority to JP2082030A priority Critical patent/JP2604877B2/en
Publication of JPH03280149A publication Critical patent/JPH03280149A/en
Application granted granted Critical
Publication of JP2604877B2 publication Critical patent/JP2604877B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To shorten the processing time of a whole system by providing plural storage means which hold communication history between central processing units and can be freely written and read from each of plural central processing units. CONSTITUTION:In the case a higher rank CPU 11 collects the communication history stored in a dual port RAM 15 between an intermediate rank CPU 12 and a lower rank CPU 13, the lower rank CPU 13 copies the contents of the dual port RAM 15 to the dual port RAM 16 before it sends a response to the intermediate rank CPU 12, and puts interruption into the higher rank CPU 11 at timing of the lower rank CPU 13 sends the response to the intermediate rank CPU 12. The higher rank CPU 11 refers to the contents of the dual port RAM 16 as processing for that interruption. Accordingly, the higher rank CPU 11 can collect the communication history between the intermediate rank CPU 12 and the lower rank CPU 13 at real time. Thus, the processing time of the whole system can be shortened.

Description

【発明の詳細な説明】 技術分野 本発明は紙葉類搬送装置に関し、特に紙葉類搬送装置に
おいて上位装置との通信と、紙葉類の送り出しと、紙葉
類の搬送とを夫々制御する複数の中央処理装置間の通信
履歴の採取方式に関する。
[Detailed Description of the Invention] Technical Field The present invention relates to a paper sheet conveying device, and in particular, in the paper sheet conveying device, communication with a host device, feeding out of paper sheets, and conveyance of paper sheets are controlled respectively. This invention relates to a method for collecting communication history between multiple central processing units.

従来技術 従来、紙葉類搬送装置においては、上位CPUが装置外
部にある上位装置との通信を制御し、中位CPUが装置
内のメカ制御全体を管理して紙葉類の搬送動作を制御し
、下位CPUが装置内のステッピングモータ等の特殊な
処理を管理して紙葉類の繰出し動作を制御していた。
Conventional technology Conventionally, in paper sheet conveyance devices, a host CPU controls communication with a host device outside the device, and a middle CPU manages overall mechanical control within the device to control sheet conveyance operations. However, the lower CPU managed special processing such as the stepping motor within the device and controlled the feeding operation of paper sheets.

この上位CPUは1動作が終了した後に通信履歴情報吸
い上げコマンドを中位CPUに発行して中位CPUか予
め採取しておいた通信履歴を採取しており、この通信履
歴を時間に対してシーケンシャルになるように編集する
ことにより中位CPUおよび下位CPUの通信履歴を採
取して装置の保守を行っていた。
After one operation is completed, this upper CPU issues a communication history information uptake command to the middle CPU, and the middle CPU collects the communication history that has been collected in advance. The communication history of the middle CPU and the lower CPU was collected by editing the information so that the communication history of the middle CPU and the lower CPU was collected and maintenance of the device was performed.

このような従来の紙葉類搬送装置では、上位CPUか中
位CPUに適時通信履歴情報吸い上げコマンドを発行し
てシステム全体の通信履歴を採取していたので、この通
信履歴情報吸い上げコマンドの処理によりシステム全体
の処理時間が余分にかかってしまうという問題があった
In such conventional paper sheet conveyance devices, the communication history of the entire system was collected by issuing a communication history information download command to the upper or middle CPU at a timely basis. There is a problem in that the entire system takes extra processing time.

発明の目的 本発明は上記のような従来のものの問題点を除去すべく
なされたもので、システム全体の処理時間を短縮するこ
とかできる紙葉類搬送装置の提供を目的とする。
OBJECTS OF THE INVENTION The present invention has been made in order to eliminate the problems of the conventional ones as described above, and it is an object of the present invention to provide a paper sheet conveying device that can shorten the processing time of the entire system.

発明の構成 本発明による紙葉類搬送装置は、上位装置との通信と、
紙葉類の送り出しと、前記紙葉類の搬送とを夫々制御す
る複数の中央処理装置を含む紙葉類搬送装置であって、
前記複数の中央処理装置間に夫々設けられ、前記中央処
理装置間の通信履歴を保持し、前記複数の中央処理装置
各々から書込み読出し自在な複数の記憶手段を有し、前
記複数の記憶手段を介して前記中央処理装置間の通信履
歴を採取するようにしたことを特徴とする。
Structure of the Invention The paper sheet conveying device according to the present invention has communication with a host device,
A paper sheet conveying device including a plurality of central processing units that respectively control the sending out of paper sheets and the conveyance of the paper sheets,
A plurality of storage means are provided between the plurality of central processing units, each of which holds a communication history between the central processing units, and can be freely written to and read from each of the plurality of central processing units; The communication history between the central processing units is collected through the central processing unit.

実施例 次に、本発明の一実施例について図面を参照して説明す
る。
Embodiment Next, an embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の構成を示すプロ・ツク図で
あり、第2図は本発明の一実施例の全体図である。これ
らの図において、紙葉類搬送装置2内の制御部1は装置
外部にある上位装置(図示せず)との通信を制御する上
位CPUIIと、装置内のメカ制御全体を管理して紙葉
類(図示せず)の搬送動作を制御する中位CPU12と
、装置内のステッピングモータ(図示せず)等の特殊な
処理を管理して紙葉類の繰出し動作を制御する下位CP
U1Bと、上位CPUIIと中位CPU12との間に設
けられ、中位CPU12の通信履歴を保持するデュアル
ポートRAM (ランダムアクセスメモリ)14と、上
位CPUIIと下位CPU13との間および中位CPU
12と下位CPUl3との間に夫々設けられ、下位CP
U13の通信履歴を保持するデュアルポートRAM1.
5.16とから構成されている。
FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention, and FIG. 2 is an overall diagram of one embodiment of the present invention. In these figures, a control unit 1 in a paper sheet conveying device 2 is connected to a host CPU II that controls communication with a host device (not shown) located outside the device, and controls overall mechanical control within the device to handle paper sheets. A middle-level CPU 12 that controls the conveyance operation of paper sheets (not shown), and a lower-level CPU that controls special processing such as a stepping motor (not shown) in the device and controls the feeding operation of paper sheets.
U1B, a dual port RAM (random access memory) 14 that is provided between the upper CPU II and the middle CPU 12 and holds the communication history of the middle CPU 12, and between the upper CPU II and the lower CPU 13 and between the middle CPU
12 and the lower CPU13, and the lower CPU
Dual port RAM 1. which holds the communication history of U13.
5.16.

デュアルポートRAM14は上位CPUI 1および中
位CPU12の双方向からアクセスすることができ、デ
ュアルポートRAM15は中位CPU12および下位C
PU13の双方向からアクセスすることができ、デュア
ルポートRAM16は上位CPUI 1および下位CP
U13の双方向からアクセスすることができるようにな
っている。
The dual port RAM 14 can be accessed from both the upper CPU 1 and the middle CPU 12, and the dual port RAM 15 can be accessed from both the middle CPU 12 and the lower CPU 12.
The dual port RAM 16 can be accessed from both sides of the PU 13, and the dual port RAM 16 can be accessed from both the upper CPU 1 and the lower CPU.
It can be accessed from both directions of U13.

上位CPUI 1が中位CPUI 2と下位CPU13
との間のデュアルポートRAM15に格納された通信履
歴を採取する場合、下位CP、U 1 Bはレスポンス
を中位CPU12に送出する前に、デュアルポートRA
M15の内容をデュアルポートRAM16に複写し、下
位CPU1Bがレスポンスを中位CPU12に送出する
タイミシクで上位CPUI 1に割込みを入れる。
Upper CPUI 1 is middle CPUI 2 and lower CPU 13
When collecting the communication history stored in the dual port RAM 15 between
The contents of M15 are copied to the dual port RAM 16, and the lower CPU 1B issues an interrupt to the upper CPU 1 at the timing when it sends a response to the middle CPU 12.

上位CPUI 1はその割込みに対する処理でデュアル
ポートRAM16の内容を参照する。
The host CPU 1 refers to the contents of the dual port RAM 16 in processing for the interrupt.

これにより、上位CPUIIは中位CPU12と下位C
PU13との間の通信履歴をリアルタイムに採取するこ
とができる。
As a result, the upper CPU II is connected to the middle CPU 12 and the lower CPU
The communication history with the PU 13 can be collected in real time.

このように、上位CPUIIと下位CPU13との間に
、中位CPU12と下位CPU1Bとの間の通信履歴を
格納するためのデュアルポートRAM16を設けるよう
にすることによって、従来中位CPUが予め採取してお
いた通信履歴を採取するために行っていた通信履歴情報
吸い上げコマンドの上位CPUから中位CPUへの発行
を行う必要がなくなり、システム全体の処理時間を短縮
することができる。
In this way, by providing the dual port RAM 16 between the upper CPU II and the lower CPU 13 for storing the communication history between the intermediate CPU 12 and the lower CPU 1B, the information collected by the intermediate CPU in advance can be saved. It is no longer necessary to issue a communication history information siphoning command from a high-level CPU to a middle-level CPU, which was used to collect the communication history that has been stored, and the processing time of the entire system can be shortened.

発明の詳細 な説明したように本発明によれば、上位装置との通信と
、紙葉類の送り出しと、紙葉類の搬送とを夫々制御する
複数の中央処理装置間に、これら中央処理装置間の通信
履歴を保持し、複数の中央処理装置各々から書込み読出
し自在な複数の記憶手段を夫々設けるようにすることに
よって、システム全体の処理時間を短縮することができ
るという効果がある。
As described in detail, according to the present invention, a plurality of central processing units that control communication with a host device, feeding of paper sheets, and conveyance of paper sheets, respectively, are connected to each other. By providing a plurality of storage means that hold the communication history between the two and can be written to and read from each of the plurality of central processing units, the processing time of the entire system can be reduced.

【図面の簡単な説明】 第1図は本発明の一実施例の構成を示すブロック図、第
2図は本発明の一実施例の全体図である。 主要部分の符号の説明 1・・・・・・制御部 2・・・・・・紙葉類搬送装置 11・・・・・・上位CPU 1 2・・・・・・中位C 3・・・・・・下位CPU 14〜1 6・・・・・・デュアルポー トRAM
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is an overall diagram of the embodiment of the present invention. Explanation of symbols of main parts 1... Control unit 2... Paper sheet conveying device 11... Upper CPU 1 2... Middle C 3... ...Lower CPU 14-1 6...Dual port RAM

Claims (1)

【特許請求の範囲】[Claims] (1)上位装置との通信と、紙葉類の送り出しと、前記
紙葉類の搬送とを夫々制御する複数の中央処理装置を含
む紙葉類搬送装置であって、前記複数の中央処理装置間
に夫々設けられ、前記中央処理装置間の通信履歴を保持
し、前記複数の中央処理装置各々から書込み読出し自在
な複数の記憶手段を有し、前記複数の記憶手段を介して
前記中央処理装置間の通信履歴を採取するようにしたこ
とを特徴とする紙葉類搬送装置。
(1) A paper sheet conveying device including a plurality of central processing units that respectively control communication with a host device, feeding out of paper sheets, and transportation of the paper sheets, the plurality of central processing units A plurality of storage means are provided between the central processing units, each of which holds a communication history between the central processing units, and can be written to and read from each of the plurality of central processing units, and the central processing unit A paper sheet conveying device characterized in that a communication history between the two is collected.
JP2082030A 1990-03-29 1990-03-29 Paper transport device Expired - Lifetime JP2604877B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2082030A JP2604877B2 (en) 1990-03-29 1990-03-29 Paper transport device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2082030A JP2604877B2 (en) 1990-03-29 1990-03-29 Paper transport device

Publications (2)

Publication Number Publication Date
JPH03280149A true JPH03280149A (en) 1991-12-11
JP2604877B2 JP2604877B2 (en) 1997-04-30

Family

ID=13763133

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2082030A Expired - Lifetime JP2604877B2 (en) 1990-03-29 1990-03-29 Paper transport device

Country Status (1)

Country Link
JP (1) JP2604877B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63288335A (en) * 1987-05-20 1988-11-25 Nec Corp Multi-processor system
JPH01248207A (en) * 1988-03-30 1989-10-03 Mitsubishi Electric Corp Numerical controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63288335A (en) * 1987-05-20 1988-11-25 Nec Corp Multi-processor system
JPH01248207A (en) * 1988-03-30 1989-10-03 Mitsubishi Electric Corp Numerical controller

Also Published As

Publication number Publication date
JP2604877B2 (en) 1997-04-30

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