JPH03278593A - Circuit board - Google Patents

Circuit board

Info

Publication number
JPH03278593A
JPH03278593A JP7916290A JP7916290A JPH03278593A JP H03278593 A JPH03278593 A JP H03278593A JP 7916290 A JP7916290 A JP 7916290A JP 7916290 A JP7916290 A JP 7916290A JP H03278593 A JPH03278593 A JP H03278593A
Authority
JP
Japan
Prior art keywords
circuit
board
circuit board
heat
laminated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7916290A
Other languages
Japanese (ja)
Inventor
Mitsuaki Yamakawa
山川 光明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Lighting and Technology Corp
Original Assignee
Toshiba Lighting and Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Lighting and Technology Corp filed Critical Toshiba Lighting and Technology Corp
Priority to JP7916290A priority Critical patent/JPH03278593A/en
Publication of JPH03278593A publication Critical patent/JPH03278593A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make it possible to obtain a highly reliable circuit board capable of reducing its film thickness and being free of off-set and cracks of wiring patterns by forming a circuit board with a board raw material made of thermally deformable resin, and a circuit raw material which forms wiring patterns with conductors where conductive substance-made powder is dispersed in the thermally deformable resin. CONSTITUTION:A circuit board 10 comprises a board element assembly 11 made of thermal plasticity resin and a circuit raw material 12 where wiring patterns are printed- formed with conductors in which metal powder is dispersed in the thermally deformable resin. On one side of this board raw material 11 are printed connection electrodes for other circuit boards or mounted components. Circuit raw materials 12 are respectively polymerized on one side of a plurality of board raw materials 1 so that the board raw material 11 may be laminated and heated and contact-bonded with a heating press so that a plurality of circuit boards 10 may be laminated and bonded integrally. The lamination bonding by this heating contact bond produces the surface of the circuit element assemblies 12 on the same level of the board element assemblies 11 so that they may be integrally bonded under an exposed state, which makes it possible to form the circuit elemental assemblies 10 in several layers lamented into one piece.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は電子機器などに用いられる回路基板に係り、回
路基板体を複数層に一体的に結合して実装密度を高めた
ものに関する。
[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention relates to a circuit board used in electronic equipment, etc., and relates to a circuit board used in electronic devices, etc., which increases the packaging density by integrally bonding a circuit board body into multiple layers. related to things.

(従来の技術) 近時、電子機器の小形化、多様化に伴い複数枚の回路基
板の一体化が要望され、このような要請から従来は、第
7図に示すように、布状に編んだガラス繊維にエポキシ
樹脂などの熱硬化性樹脂を含浸させて成型したガラス・
エポキシ樹脂基板1の一面または両面に銅箔を加熱圧着
し、この基板1の銅箔面を化学エツチングして配線パタ
ーン2を形成し、さらに、この配線パターン2,3の交
差部分に電気絶縁性を有する樹脂ペーストにより絶縁層
4を形成し、次いで、樹脂中に金属粒子を分散させた導
電体にて形成されるジャンパー線5にて配線パターン2
,3の交差部にて配線パターン2を絶縁層4の外側面を
跨いで交差する配線パターン3と絶縁して接続し、高密
度化を図った構造が知られている。
(Prior art) In recent years, with the miniaturization and diversification of electronic devices, there has been a demand for the integration of multiple circuit boards. Glass made by impregnating glass fiber with thermosetting resin such as epoxy resin.
Copper foil is heat-pressed onto one or both sides of the epoxy resin substrate 1, the copper foil surface of the substrate 1 is chemically etched to form the wiring pattern 2, and the intersection of the wiring patterns 2 and 3 is electrically insulated. An insulating layer 4 is formed with a resin paste having a
, 3, a structure is known in which the wiring pattern 2 is insulated and connected to the crossing wiring pattern 3 across the outer surface of the insulating layer 4 to achieve high density.

また、第8図に示すように、布状に編んだガラス繊維に
エポキシ樹脂などの熱硬化性樹脂を含浸させて成型した
ガラス・エポキシ樹脂基板1の一面に銅箔を加熱圧着し
、この基板lの銅箔面を化学エツチングして配線パター
ン2を形成し、さらに、この基板1の配線パターン2を
形成した面に布状に編んだガラス繊維にエポキシ樹脂な
どの熱硬化性樹脂を含浸させて成型した半硬化させたプ
リプレグ6を重合し、このシート状のプレプレグ6の表
面に銅箔を配置して加圧プレスし、この銅箔をエツチン
グして配線パターン7を形成した構造の回路基板が知ら
れている。
In addition, as shown in FIG. 8, copper foil is heat-pressed onto one surface of a glass/epoxy resin substrate 1, which is formed by impregnating glass fibers woven into a cloth shape with a thermosetting resin such as epoxy resin, and A wiring pattern 2 is formed by chemically etching the copper foil surface of the board 1, and then glass fibers woven into a cloth are impregnated with a thermosetting resin such as an epoxy resin on the surface of the board 1 on which the wiring pattern 2 is formed. A circuit board having a structure in which a semi-cured prepreg 6 molded by polymerization is polymerized, a copper foil is placed on the surface of this sheet-like prepreg 6, pressure pressed, and a wiring pattern 7 is formed by etching the copper foil. It has been known.

(発明が解決しようとする課題) 前記第7図に示す構造の回路基板では、樹脂中に金属粒
子を分散させた導電体にて形成されるジャンパー線5に
て配線パターン2,3の交差部を絶縁層4の外側面を跨
いで交差する配線パターン3と絶縁して配線パターン2
を接続する構造のため、ジャンパー線印刷において、絶
縁層4に急激な立ち上がり、立ち下がり段差が形成され
るため、ジャンパー線の印刷、硬化による形成中に段切
れ、クラックの発生などの不都合が生じることが往々に
あり、印刷条件の管理が困難であり、また配線パターン
の交差部の絶縁部4は絶縁ペーストによる厚膜印刷にて
形成しているため、配線パターンの薄膜化に限界がある
問題があった。
(Problems to be Solved by the Invention) In the circuit board having the structure shown in FIG. The wiring pattern 2 is insulated from the wiring pattern 3 crossing the outer surface of the insulating layer 4.
Due to the structure of connecting the jumper wires, abrupt rising and falling steps are formed in the insulating layer 4 when printing the jumper wires, resulting in inconveniences such as breakage and cracks during the printing and curing of the jumper wires. This problem often occurs, making it difficult to control printing conditions.Also, since the insulating parts 4 at the intersections of the wiring patterns are formed by thick-film printing using insulating paste, there is a problem in that there is a limit to how thin the wiring pattern can be made. was there.

また第8図に示す構造の回路基板では、基板1の配線パ
ターン2の表面上にプリプレグ6を重合し、プレプレグ
6の表面上に配線パターン7を形成するため、各層毎に
順次積層するため、薄膜化に限界があるとともに各層毎
に銅箔のエツチング処理が必要で製造作業が繁雑である
などの問題があった。
In addition, in the circuit board having the structure shown in FIG. 8, the prepreg 6 is polymerized on the surface of the wiring pattern 2 of the substrate 1, and the wiring pattern 7 is formed on the surface of the prepreg 6, so that each layer is sequentially laminated. There are problems in that there is a limit to how thin the film can be made, and the manufacturing process is complicated because etching of the copper foil is required for each layer.

本発明は上記問題点に鑑みなされたもので、熱変形性樹
脂からなる基板素体と、熱変形性樹脂中に導電性物質の
粉末を分散させた導電体による配線パターンを形成した
回路素体とにて回路基板体を形成することにより、回路
素体を基板素体に没入させて薄膜化することができると
ともに、配線パターンの段切れ、亀裂が生じることがな
く、信頼性の高い回路基板を提供するものである。
The present invention has been made in view of the above-mentioned problems, and consists of a substrate element made of a heat-deformable resin and a circuit element in which a wiring pattern is formed using a conductor made of a conductive substance powder dispersed in the heat-deformable resin. By forming the circuit board body in this way, it is possible to immerse the circuit body into the board body and make it a thin film, and there is no breakage or cracks in the wiring pattern, resulting in a highly reliable circuit board. It provides:

(発明の構成〕 (課題を解決するための手段) 請求項1に記載の発明の回路基板は、熱変形性樹脂から
なる基板素体と、熱変形性樹脂中に導電性物質の粉末を
分散させた導電体による配線パターンを形成した回路素
体とからなり、この基板素体の少なくとも一面に前記回
路素体を加熱圧着しこの回路素体を前記基板素体に少な
くとも一部を没入させて表面を露出した状態で一体的に
結合される回路基板体を複数層に加熱圧着により積層形
成したものである。
(Structure of the Invention) (Means for Solving the Problems) The circuit board of the invention according to claim 1 includes a substrate body made of a heat-deformable resin, and a conductive substance powder dispersed in the heat-deformable resin. a circuit element on which a wiring pattern is formed using a conductive material, the circuit element is heat-pressed onto at least one surface of the substrate element, and at least a portion of the circuit element is immersed in the substrate element. A plurality of circuit board bodies are laminated by heating and pressure bonding to form a plurality of circuit board bodies that are integrally bonded with their surfaces exposed.

請求項2に記載の発明の回路基板は、熱変形性樹脂から
なる基板素体と、熱変形性樹脂中に導電性物質の粉末を
分散させた導電体による配線パターンを形成した回路素
体とからなり、この基板素体の少なくとも一面に前記回
路素体を加熱圧着しこの回路素体を前記基板素体に少な
くとも一部を没入させて表面を露出した状態で一体的に
結合される回路基板体を複数層に加熱圧着により積層形
成し、前記積層された回路基板体の基板素体は、前記回
路素体の交差部分の厚みを薄(したものである。
The circuit board of the invention according to claim 2 comprises: a board element made of a heat-deformable resin; and a circuit element in which a wiring pattern is formed using a conductor in which powder of a conductive substance is dispersed in the heat-deformable resin. A circuit board which is integrally bonded with the circuit element on at least one surface of the substrate element by heat-pressing the circuit element and immersing at least a portion of the circuit element into the substrate element with the surface exposed. The circuit board body is formed by laminating a plurality of layers by heat and pressure bonding, and the board body of the laminated circuit board body is thinned at the intersection portion of the circuit body.

請求項3に記載の発明の回路基板は、熱変形性樹脂から
なる基板素体と、熱変形性樹脂中に導電性物質の粉末を
分散させた導電体による配線パターンを形成した回路素
体とからなり、この基板素体の少な(とも−面に前記回
路素体を加熱圧着しこの回路素体を前記基板素体に少な
くとも一部を没入させて表面を露出した状態で一体的に
結合される回路基板体を複数層に加熱圧着により積層形
成し、前記積層された回路基板体の回路素体は、この回
路素体の交差部分の厚みを薄くしたものである。
The circuit board of the invention according to claim 3 comprises: a board element made of a heat-deformable resin; and a circuit element in which a wiring pattern is formed using a conductor in which powder of a conductive substance is dispersed in the heat-deformable resin. The circuit element is heat-pressed onto the lower (both sides) of the substrate element, and the circuit element is immersed at least partially into the substrate element to be integrally bonded with the surface exposed. A plurality of circuit board bodies are laminated by heat and pressure bonding in a plurality of layers, and the circuit elements of the laminated circuit board bodies are made thinner at the intersection portions of the circuit elements.

(作用) 請求項1に記載の発明の回路基板は、積層される回路基
板体が熱変形性樹脂からなる基板素体と、熱変形性樹脂
中に導電性物質の粉末を分散させた導電体による配線パ
ターンを形成した回路素体とからなるため、加熱圧着に
より、この基板素体に回路素体が没入されて薄膜化され
、配線パターンが一体的化されて段切れ、クラックが生
じることがない。
(Function) In the circuit board of the invention according to claim 1, the circuit board bodies to be laminated include a board body made of a heat-deformable resin, and a conductor in which powder of a conductive substance is dispersed in the heat-deformable resin. The circuit element is immersed into this substrate element by heat compression bonding, and the circuit element is made into a thin film, and the wiring pattern is integrated, which prevents breaks and cracks from occurring. do not have.

請求項2に記載の発明の回路基板は、回路基板体の配線
パターンの交差部において、基板素体の厚みが薄くなり
、配線パターンの段切れ、クラックが生じることがなく
、薄膜化がより可能となる。
In the circuit board of the invention according to claim 2, the thickness of the board element is thinner at the intersection of the wiring patterns of the circuit board body, and there is no breakage or cracking of the wiring pattern, making it possible to make the film thinner. becomes.

請求項3に記載の発明の回路基板は、回路基板体の配線
パターンの交差部において、前記積層された回路基板体
の回路素体の交差部分の厚みを薄くでき、配線パターン
の段切れ、クラックが生じることがなく、薄膜化がより
可能となるものである。
In the circuit board according to the third aspect of the invention, the thickness of the intersection of the circuit elements of the laminated circuit board bodies can be reduced at the intersection of the wiring patterns of the circuit board body, and the thickness of the intersection of the circuit elements of the laminated circuit board body can be reduced, thereby preventing breakage and cracks in the wiring pattern. Therefore, it is possible to make the film thinner.

(実施例) 次に本発明の一実施例の構成を図面第1図および第2図
について説明する。
(Embodiment) Next, the configuration of an embodiment of the present invention will be described with reference to FIGS. 1 and 2.

10は回路基板体で、この回路基板体10は熱変形性樹
脂、例えば、熱可塑性樹脂からなる基板素体1】と、熱
変形性樹脂、例えば、熱可塑性樹脂中に導電性物質、例
えば、金属の粉末を分散させた導電体による配線パター
ンを印刷形成した回路素体I2とから構成され、さらに
、この基板素体11の一面には他の回路基板または実装
部品の接続用電極(図示せず)が印刷形成されている。
Reference numeral 10 denotes a circuit board body, and the circuit board body 10 includes a substrate body 1 made of a heat deformable resin, for example, a thermoplastic resin, and a conductive substance, for example, in the heat deformable resin, for example, a thermoplastic resin. It is composed of a circuit element I2 on which a wiring pattern is printed using a conductor in which metal powder is dispersed.Furthermore, on one side of this circuit element 11, there are electrodes (not shown) for connecting other circuit boards or mounted components. ) is printed.

そして、この複数の基板素体11の一面にそれぞれ前記
回路素体12を重合し、この複数の基板素体11を積層
して熱プレス機の定板にて一定圧力で加熱圧着して複数
の回路基板体10を一体的に積層結合する。この加熱圧
着による積層結合で、各回路素体12は前記基板素体1
1に原形を保持しつつ没入され、基板素体11は回路素
体12の没入により側方に流動し1、回路素体12の表
面が基板素体11の表面と同一面となって、露出した状
態で一体的に結合され、回路基板体10を複数層に一体
的に積層形成される。
Then, each of the circuit elements 12 is superposed on one surface of the plurality of substrate elements 11, and the plurality of substrate elements 11 are laminated and heat-pressed at a constant pressure using a fixed plate of a heat press machine to form a plurality of circuit elements 12. The circuit board body 10 is integrally laminated and bonded. By this laminated bonding by heat and pressure bonding, each circuit element 12 is bonded to the substrate element 1.
1, the circuit element body 11 flows laterally as the circuit element body 12 is immersed, and the surface of the circuit element body 12 becomes flush with the surface of the circuit element body 11, and is exposed. The circuit board body 10 is integrally laminated into a plurality of layers.

このようにして形成された回路基板の厚みは基板素体1
1の和となり、導電パターンを形成する回路素体12は
リジェクトされた凹凸、段差が形成されない。
The thickness of the circuit board formed in this way is 1
The sum is 1, and the circuit element 12 forming the conductive pattern has no rejected unevenness or step.

そして、基板素体11の熱変形性樹脂と、回路素体12
の熱変形性樹脂との硬化温度の異なる樹脂、すなわち、
基板素体11の樹脂より回路素体12の樹脂の硬化温度
を低くすることにより回路素体12は変形されることな
く基板素体11に没入される。
Then, the heat deformable resin of the substrate body 11 and the circuit body 12
Resins with different curing temperatures from the heat deformable resins, i.e.
By setting the curing temperature of the resin of the circuit element 12 lower than that of the resin of the circuit element 11, the circuit element 12 is immersed into the substrate element 11 without being deformed.

次に他の実施例を第3図および第4図について説明する
Next, another embodiment will be described with reference to FIGS. 3 and 4.

前記実施例に示すように、回路基板体10は熱変形性樹
脂からなる基板素体11と、熱変形性樹脂中に分散させ
た導電性物質による配線パターンを印刷形成した回路素
体12とから構成され、さらに、この基板素体11の一
面には電極(図示せず)が印刷形成されている。そして
、この複数の基板素体11の一面にそれぞれ前記回路素
体12を重合し、この複数の基板素体11を積層して熱
プレス機の定板にて一定圧力で加熱圧着して複数の回路
基板体lOを一体的に積層結合する。この加熱圧着によ
る積層結合で、各回路素体12は前記基板素体IIに没
入され、基板素体11は回路素体12の没入により側方
に流動し、回路素体12の表面が基板素体11の表面と
同一面となって霧出した状態で一体的に結合され、各基
板素体11は回路素体12が形成されている部分が他の
部分より薄く形成され、さらに、各回路素体12の上下
位置で交差する部分で基板素体11は側方に流動され、
この基板本体11の厚みは回路素体I2の交差しない部
分より薄く形成されるとともに、回路素体12は交差部
において、内方となる回路素体12は上側の基板素体1
1の突出によりさらに没入され、回路基板体1Gを複数
層に一体的に積層形成される。
As shown in the above embodiment, the circuit board body 10 is made up of a board body 11 made of a thermodeformable resin and a circuit body 12 on which a wiring pattern is printed and formed using a conductive material dispersed in the thermodeformable resin. Furthermore, an electrode (not shown) is printed on one surface of the substrate element 11. Then, each of the circuit elements 12 is superposed on one surface of the plurality of substrate elements 11, and the plurality of substrate elements 11 are laminated and heat-pressed at a constant pressure using a fixed plate of a heat press machine to form a plurality of circuit elements 12. The circuit board bodies IO are integrally stacked and bonded. Through this laminated bonding by heat and pressure bonding, each circuit element 12 is immersed into the substrate element II, and the substrate element 11 flows laterally as the circuit element 12 is immersed, so that the surface of the circuit element 12 becomes the substrate element. Each substrate element 11 is formed so that the part where the circuit element 12 is formed is thinner than the other part, and furthermore, each circuit element 11 is formed to be thinner than the other part. The substrate element 11 is flowed laterally at the intersection between the upper and lower positions of the element 12,
The thickness of this board body 11 is formed to be thinner than the non-intersecting portions of the circuit elements I2, and the inner circuit elements 12 are formed at the intersections with the upper circuit elements 12.
The circuit board body 1G is further recessed due to the protrusion of the circuit board 1G, and the circuit board body 1G is integrally laminated into a plurality of layers.

このようにして形成された回路基板の厚みは各基板素体
11と各回路素体12の和となり、導電パターンを形成
する回路素体12はリジェクトされた凹凸、段差が形成
されない。
The thickness of the circuit board thus formed is the sum of each board element 11 and each circuit element 12, and the circuit element 12 forming the conductive pattern is free from rejected irregularities and steps.

そして、基板素体11の熱変形性樹脂と、回路素体12
の熱変形性樹脂との硬化温度の異なる樹脂、すなわち、
基板素体11の樹脂より回路素体】2の樹脂の硬化温度
を低くすることにより回路素体12の変形が容易となり
基板素体11に没入される。
Then, the heat deformable resin of the substrate body 11 and the circuit body 12
Resins with different curing temperatures from the heat deformable resins, i.e.
By making the curing temperature of the resin of circuit element 2 lower than that of the resin of the circuit element 11, the circuit element 12 can be easily deformed and immersed in the circuit element 11.

次に他の実施例を第5図および第6図について説明する
Next, another embodiment will be described with reference to FIGS. 5 and 6.

前記実施例と同様に、回路基板体lOは熱変形性樹脂か
らなる基板素体11と、熱変形性樹脂熱可塑性樹脂中に
分散させた導電性物質による配線パターンを印刷形成し
た回路素体12とから構成され、さらに、この基板素体
11の一面には電極(図示せず)が印刷形成されている
。そして、この複数の基板素体11の一面にそれぞれ前
記回路素体12を重合し、この複数の基板素体IIを積
層して熱プレス機の定板にて一定圧力で加熱圧着して複
数の回路基板体10を一体的に積層結合する。この加熱
圧着による積層結合で、回路素体12は基板本体11に
没入され、基板素体1】は回路素体12の没入により側
方に流動し、回路素体12の表面が基板素体11の表面
と同一面となって露出した状態で一体的に結合され、各
回路素体12の上下位置で交差する部分で回路素体12
がこの回路素体12が交差されていない他の部分より薄
く形成され、回路基板体10を複数層に一体的に積層形
成される。
Similar to the embodiment described above, the circuit board body 10 includes a board body 11 made of a thermodeformable resin, and a circuit body 12 on which a wiring pattern made of a conductive material dispersed in a thermoplastic resin is printed. Furthermore, an electrode (not shown) is printed on one surface of the substrate element 11. Then, each of the circuit elements 12 is superposed on one surface of the plurality of substrate elements 11, and the plurality of substrate elements II are laminated and heat-pressed at a constant pressure using a fixed plate of a heat press machine to form a plurality of circuit elements 12. The circuit board body 10 is integrally laminated and bonded. By this laminated bonding by heat and pressure bonding, the circuit element body 12 is immersed into the substrate body 11, and the circuit element body 1] flows laterally due to the insertion of the circuit element body 12, and the surface of the circuit element body 12 is brought into contact with the substrate body 11. The circuit elements 12 are connected integrally in an exposed state flush with the surface of the circuit elements 12, and the circuit elements 12
However, this circuit element body 12 is formed thinner than other parts that are not crossed, and the circuit board body 10 is integrally laminated into a plurality of layers.

このようにして形成された回路基板の厚みは各基板素体
11と各回路素体12の和となり、表面側の導電パター
ンを形成する回路素体12の厚みはリジェクトされた凹
凸、段差が形成されない。
The thickness of the circuit board formed in this way is the sum of each board element 11 and each circuit element 12, and the thickness of the circuit element 12 forming the conductive pattern on the front side is formed by the rejected irregularities and steps. Not done.

そして、基板素体11の熱変形性樹脂と、回路素体12
の熱変形性樹脂との硬化温度の異なる樹脂、すなわち、
基板素体11の樹脂より回路素体12の樹脂の硬化温度
を高くすることにより回路素体12は変形されることな
く基板素体12に没入される。
Then, the heat deformable resin of the substrate body 11 and the circuit body 12
Resins with different curing temperatures from the heat deformable resins, i.e.
By setting the curing temperature of the resin of the circuit element body 12 higher than that of the resin of the circuit element body 11, the circuit element body 12 is immersed into the circuit element body 12 without being deformed.

前記実施例では、基板素体11の表面から回路素体12
が突出されないように表面を同一面に形成したが、回路
素体12の一部を基板素体11に一部を没入させて回路
素体12は基板本体11の表面から多少突出させた構成
とすることもできる。
In the embodiment, from the surface of the substrate body 11 to the circuit body 12
Although the surfaces of the circuit element 12 are formed on the same plane so as not to protrude, a part of the circuit element 12 is partially immersed in the substrate element 11 so that the circuit element 12 protrudes somewhat from the surface of the substrate body 11. You can also.

また、回路素体12は基板素体11の両面に設けて両面
に配線パターンを形成することもできる。
Further, the circuit element 12 can be provided on both sides of the substrate element 11, and wiring patterns can be formed on both sides.

さらに、前記実施例では、回路基板体10は二層積層し
た構成について説明したが、二層構造に限られるもので
はなく、複数層に形成できる。
Further, in the above embodiments, the circuit board body 10 is described as having a two-layered structure, but it is not limited to a two-layer structure, and can be formed in a plurality of layers.

また前記基板素体11と回路素体12を形成する熱変形
性樹脂は熱硬化性樹脂、または熱軟化性樹脂を用いるこ
とができ、また、熱変形性樹脂は、例えば、ポリカーボ
ネート、ポリ塩化ビニル、ポリスチレン、飽和ポリエス
テル、ポリスチレン、ポリプロピレン、ポリフェニレン
オキシド、ポリスルフォン、ポリフェニレンサルファイ
ド、ポリアセタール、ポリアミドなどが適用できる。
Further, the heat deformable resin forming the substrate body 11 and the circuit body 12 may be a thermosetting resin or a thermosoftening resin, and the heat deformable resin may be, for example, polycarbonate or polyvinyl chloride. , polystyrene, saturated polyester, polystyrene, polypropylene, polyphenylene oxide, polysulfone, polyphenylene sulfide, polyacetal, polyamide, etc. are applicable.

さらに、回路素体12は熱変形性樹脂をバインダーとし
て、例えば、銀、銅、ニッケル、金、白金、アルミニュ
ームなどの金属微粉末を混練りし、必要に応じて溶媒を
適宜添加した組成からなる厚膜導電ペーストを印刷する
ことにより形成する。
Furthermore, the circuit element 12 is made of a composition obtained by kneading fine metal powder such as silver, copper, nickel, gold, platinum, aluminum, etc., using a heat deformable resin as a binder, and adding a solvent as necessary. It is formed by printing a thick film conductive paste.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、熱変形性樹脂からなる基板素体と、熱
変形性樹脂中に導電性物質の粉末を分散させた導電体に
よる配線パターンを形成した回路素体とにて回路基板体
を形成することにより、回路素体を基板素体に没入させ
て薄膜化することができるとともに、配線パターンの段
切れ、亀裂が生じることがなく、信頼性の高い実装密度
の高い回路基板が得られるものである。
According to the present invention, a circuit board body is formed by a substrate body made of a heat-deformable resin and a circuit body on which a wiring pattern is formed using a conductor in which powder of a conductive substance is dispersed in the heat-deformable resin. By forming this, it is possible to immerse the circuit element into the substrate element and make it a thin film, and there is no breakage or cracking in the wiring pattern, resulting in a highly reliable circuit board with high packaging density. It is something.

また、請求項2に記載の発明によれば、回路基板体の配
線パターンの交差部において、基板素体の厚みが薄くな
り、配線パターンの段切れ、クラックが生じることがな
く、薄膜化がより可能となるものである。
Further, according to the invention described in claim 2, the thickness of the substrate body becomes thinner at the intersections of the wiring patterns of the circuit board body, and there is no breakage or cracking of the wiring patterns, and the film thickness can be further reduced. It is possible.

請求項3に記載の発明によれば、回路基板体の配線パタ
ーンの交差部において、前記積層された回路基板体の回
路素体の交差部分の厚みを薄くでき、配線パターンの段
切れ、クラックが生じることがなく、薄膜化がより可能
となるものである。
According to the third aspect of the invention, at the intersection of the wiring patterns of the circuit board body, the thickness of the intersection of the circuit elements of the laminated circuit board body can be reduced, and breakage and cracks in the wiring pattern can be reduced. This makes it possible to make the film thinner.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す回路基板の製造工程を
示す正面図、第2図は同上回路基板の縦断正面図、第3
図は本発明の他の実施例を示す回路基板の製造工程を示
す正面図、第4図は同上回路基板の縦断正面図、第5図
はさらに本発明の他の実施例を示す回路基板の製造工程
を示す正面図、第6図は同上回路基板の縦断面図、第7
図は従来の回路基板の縦断面図、第8図は他の従来の回
路基板の縦断面図である。 10・・回路基板体、11・・基板素体、12・・回路
素体。
FIG. 1 is a front view showing the manufacturing process of a circuit board according to an embodiment of the present invention, FIG. 2 is a longitudinal sectional front view of the same circuit board, and FIG.
The figure is a front view showing the manufacturing process of a circuit board showing another embodiment of the present invention, FIG. 4 is a longitudinal sectional front view of the same circuit board, and FIG. Figure 6 is a front view showing the manufacturing process; Figure 6 is a vertical cross-sectional view of the same circuit board;
The figure is a longitudinal sectional view of a conventional circuit board, and FIG. 8 is a longitudinal sectional view of another conventional circuit board. 10... Circuit board body, 11... Board element body, 12... Circuit element body.

Claims (3)

【特許請求の範囲】[Claims] (1)熱変形性樹脂からなる基板素体と、熱変形性樹脂
中に導電性物質の粉末を分散させた導電体による配線パ
ターンを形成した回路素体とからなり、この基板素体の
少なくとも一面に前記回路素体を加熱圧着しこの回路素
体を前記基板素体に少なくとも一部を没入させて表面を
露出した状態で一体的に結合される回路基板体を複数層
に加熱圧着により積層形成したことを特徴とする回路基
板。
(1) Consisting of a substrate element made of a heat-deformable resin, and a circuit element formed with a wiring pattern made of a conductor in which powder of a conductive substance is dispersed in the heat-deformable resin, at least The circuit element body is heat-pressed on one side, and the circuit element body is immersed at least partially into the board element body to be integrally bonded with the surface exposed. Multiple layers of the circuit board body are laminated by heat-press bonding. A circuit board characterized in that:
(2)熱変形性樹脂からなる基板素体と、熱変形性樹脂
中に導電性物質の粉末を分散させた導電体による配線パ
ターンを形成した回路素体とからなり、この基板素体の
少なくとも一面に前記回路素体を加熱圧着しこの回路素
体を前記基板素体に少なくとも一部を没入させて表面を
露出した状態で一体的に結合される回路基板体を複数層
に加熱圧着により積層形成し、 前記積層された回路基板体の基板素体は、前記回路素体
の交差部分の厚みを薄くしたことを特徴とする回路基板
(2) Consisting of a substrate element made of a heat-deformable resin and a circuit element in which a wiring pattern is formed using a conductor in which powder of a conductive substance is dispersed in the heat-deformable resin, at least The circuit element body is heat-pressed on one side, and the circuit element body is immersed at least partially into the board element body to be integrally bonded with the surface exposed. Multiple layers of the circuit board body are laminated by heat-press bonding. A circuit board, characterized in that the board elements of the laminated circuit board bodies have a reduced thickness at the intersection portions of the circuit elements.
(3)熱変形性樹脂からなる基板素体と、熱変形性樹脂
中に導電性物質の粉末を分散させた導電体による配線パ
ターンを形成した回路素体とからなり、この基板素体の
少なくとも一面に前記回路素体を加熱圧着しこの回路素
体を前記基板素体に少なくとも一部を没入させて表面を
露出した状態で一体的に結合される回路基板体を複数層
に加熱圧着により積層形成し、 前記積層された回路基板体の回路素体は、この回路素体
の交差部分の厚みを薄くしたことを特徴とする回路基板
(3) Consisting of a substrate element made of a heat-deformable resin and a circuit element in which a wiring pattern is formed using a conductor in which powder of a conductive substance is dispersed in the heat-deformable resin, at least The circuit element body is heat-pressed on one side, and the circuit element body is immersed at least partially into the board element body to be integrally bonded with the surface exposed. Multiple layers of the circuit board body are laminated by heat-press bonding. A circuit board, characterized in that the circuit elements of the laminated circuit board bodies have a reduced thickness at the intersection portions of the circuit elements.
JP7916290A 1990-03-28 1990-03-28 Circuit board Pending JPH03278593A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7916290A JPH03278593A (en) 1990-03-28 1990-03-28 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7916290A JPH03278593A (en) 1990-03-28 1990-03-28 Circuit board

Publications (1)

Publication Number Publication Date
JPH03278593A true JPH03278593A (en) 1991-12-10

Family

ID=13682262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7916290A Pending JPH03278593A (en) 1990-03-28 1990-03-28 Circuit board

Country Status (1)

Country Link
JP (1) JPH03278593A (en)

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