JPH03278469A - Thin-film semiconductor device - Google Patents

Abstract

PURPOSE:To reduce influences upon thin-film semiconductor layers due to etching and eliminate influences of protective film compositions during formation of protective films after electrodes are formed. CONSTITUTION:A gate electrode 1 composed of Cr is formed on an insulating substrate G. A gate insulation layer 2 of amorphous hydride Si3N4, a first thin- film semiconductor layer 4 having the same composition as above, a second semiconductor layer 5, an N<+>-type layer 6 are in turn laminated on entire surface of the insulating substrate G. At this time, the conditions of laminating the first and second semiconductor layers 4, 5, which are feature portions of this method, are: the flow rate of gas SiH4 used is 10 SCCM; pressure, 0.07Torr; temperature of substrate, 230 deg.C, and discharge power, 4W. Photoconductivity is suppressed to a small value. Thereafter, the entire surface is converted with an N<+>-type layer 6 which serves as an ohmic contact layer. Etching is selectively performed by using a resist mask 10 having a predetermined pattern so that the laminate other than the gate electrode 1 is selectively removed. Upper electrodes 7, 8 are provided, and these electrodes are enclosed by a protective layer 9.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to thin film semiconductor devices used in displays, image scanners, etc., and in particular to equalization of electrical characteristics as thin film transistors and thin film transistor type photosensors increase in area. and a thin film semiconductor device capable of achieving high reliability.

[Prior Art] In recent years, with the advent of office automation, input/output devices such as displays, image scanners, etc.
It is considered important as a man-machine interface for A equipment, and is required to be lightweight, thin, and low-priced.

From this point of view, thin film semiconductors, such as hydrogenated amorphous silicon or polysilicon, are formed on large-area insulating substrates to create active matrix liquid crystal displays (thin film transistors) and photoelectric conversion (photoelectric sensors). Development of equipment, etc. is progressing.

FIG. 13(A) is a schematic vertical cross-sectional view showing an example of the structure of a conventional thin film transistor.

A gate insulating layer 2 is deposited on the gate electrode 1, and a thin film semiconductor layer 4 that becomes a channel, such as a hydrogenated amorphous silicon (hereinafter referred to as a-3i +H) layer, is further provided.

Furthermore, between the metal electrodes of the source-drain electrodes 7 and 8, n
One layer 6 is provided, which has ohmic properties for electrons,
By forming a junction that blocks holes, it operates as an n-channel transistor. 18 is the thin film semiconductor surface on the upper surface of the channel portion.

FIG. 13(B) is a plan view of FIG. 13(A). In particular, FIG. 13(B) shows a thin film transistor having a planar type (<edge-tooth type) electrode structure, which has been proposed in order to solve the problem of increased channel length and process problems.

Note that the thin film transistors in FIGS. 13(A) and 13(B) are 2
It can also be applied as a second photocurrent type optical sensor (for example, Japanese Patent Application Laid-open No. 101940/1983). Hereinafter, this optical sensor will be referred to as a thin film transistor type optical sensor.

FIG. 14 is a schematic vertical sectional view showing an example of the structure of a conventional coplanar optical sensor, which is a secondary photoelectric type. 13th
The thin film transistor explained using the diagram and the gate electrode l
Except for this, it has a similar structure and functions as a secondary photocurrent type optical sensor.

15(A) and 15(B) are process diagrams showing a method of manufacturing the conventional thin film transistor of FIG. 13.

A method for manufacturing such a thin film transistor is disclosed in, for example, Japanese Patent Application Laid-Open No. 63-9157.

In FIG. 15(A), G is a glass substrate, and 1 is Cr which becomes a gate electrode. After selectively forming the gate electrode 1, for example, a silicon nitride film, which will become the gate insulating layer 2, is deposited by 3000 people using a plasma CVD method, and a-5i, which will become the thin film semiconductor layer 4:
Continuously deposit 5,000 layers of H< and 61,500 layers of n. Further, aluminum, which will become the source-drain electrodes 7.8, is deposited by sputtering or the like. After that, a photosensitive resin is applied to the entire surface, followed by exposure and buttering. 1st
Figure 5 (Bl shows the state after buttering the aluminum that is the source-drain electrode. At this time, there is a photosensitive resin 10 on the electrode. Using this photosensitive resin 10 as a mask, the n layer 6 After etching to a predetermined depth by etching such as RIE, the photosensitive resin is peeled off.Furthermore, the thin film transistors are separated between elements, as shown in FIG. 13(A).
thin film transistors are created.

After the above process, the surface of the semiconductor thin film of conventional thin film transistors is easily affected by the atmosphere, and if oxygen gas or water vapor directly adsorbs or diffuses onto these surfaces, the semiconductor thin film is extremely thin. , the electrical characteristics are thick (variable). Therefore, the surface of the element is made of silicon nitride (SiJJ) or aluminum oxide (AIJ-
) or a protective film made of a metal oxide such as silicon oxide (Sin2) has been considered (for example, Japanese Patent Laid-Open No. 59-61964).

Furthermore, methods have also been proposed in which a polyimide resin film polymerized by heat treatment is used as a protective film.

Furthermore, in order to further improve stability, a method has been proposed in which a second protective film made of the same material as that of the thin film semiconductor layer 4 is laminated on top of the polymerized polyimide resin film (
For example, Japanese Patent Application Laid-Open No. 1-137674).

[Problems to be Solved by the Invention] Generally, thin film transistors and optical sensors using thin film semiconductors are required to have uniform characteristics within five large-area substrates.
The thin film transistors and optical sensors formed in the steps shown in FIGS. 5(A) and 5(B) cannot be electrically etched when, for example, RIE (reactive ion etching) is used in the n'' layer etching step shown in FIG. 15(B). For example, the threshold voltage, which determines the operating characteristics of a thin film transistor, causes a distribution of several volts within the substrate, which is a serious problem for thin film transistors, and in active matrix displays, it is difficult to see. In addition, in an optical sensor, its basic characteristics, photocurrent and dark current, are widely distributed, causing significant deterioration of the read image.

Furthermore, when a protective film on a thin film transistor or optical sensor with non-uniform characteristics is made of an organic material such as polyimide, environmental stability such as moisture resistance cannot be expected.

On the other hand, when the protective film is made of an inorganic material (for example, a-SiNx:H), depending on the process of forming the protective film and the composition of the formed protective film, the distribution of characteristics similar to those described above or undesirable electrical When it comes to characteristics, they can be compared. For example, while considering the relationship between the composition of the insulating layer and the thin film semiconductor layer 4 as a gate interface of a thin film transistor, the relationship between the composition of the gate insulating film 2 (SiN, :H) and the thin film semiconductor layer 4 (a-Si:H) ) suggests that the gate insulating film composition greatly influences the band state of the thin film semiconductor layer 4 (J, Appl, phy
s, 62(5), P2129~(19g?) and J
, Appl, phys, 60 (12), P4
294-(1986)). Moreover, it is thought that the moisture resistance also largely depends on the composition of the insulating layer as a protective film.

[Means for Solving the Problems] The thin film semiconductor device of the present invention has at least an active semiconductor layer, an inactive semiconductor layer, an ohmic layer, and a metal layer sequentially laminated on a substrate, and electrodes are formed by the ohmic layer and the metal layer. It is characterized by:

[Function] The present invention aims to reduce the influence of etching such as RIE on the surface of a thin film semiconductor layer, and to reduce the influence of the formation process and the composition of the protective film when providing a protective film after electrode formation. The layer is composed of an active semiconductor layer and an inactive semiconductor layer, and when the ohmic layer and metal layer are partially removed to form electrodes, the inactive semiconductor layer is exposed between the electrodes. be.

[Example] Hereinafter, an example of the present invention will be described in detail using the drawings.

(Example 1) FIG. 1 is a process diagram showing a method for manufacturing a thin film transistor and a thin film transistor type optical sensor of the present invention.

As shown in FIG. 1(A), first, a gate electrode 1 is selectively formed using Cr on an insulating substrate G, which becomes a base, and then a hydrogenated amorphous silicon nitride film (hereinafter referred to as a-3iNx) is formed, which becomes a gate insulating layer 2. :H) by 3,000 people and hydrogenated amorphous silicon (hereinafter referred to as a-5) which will become the first thin film semiconductor layer 4.
i:H) of 5,000 people, and a that becomes the second semiconductor layer 5
-St:H was made into about 700 layers, and 61,500 layers were sequentially deposited by the plasma CVD method to become an ohmic layer.

The deposition conditions for a-Si:H, which are the first and second semiconductor layers, which are the characteristic part of the present invention, are SfH, flow rate: 1105C.
C. Pressure crab 0.07 Torr, substrate temperature: 230°C constant, and discharge power was varied.

The deposition conditions for the a-St:H film are shown in the table below.

a-3i: H film deposition conditions a-3i prepared under ■～■:
FIG. 2 shows the hydrogen content rate with respect to the discharge power of the H film.

The inactive semiconductor layer has the above-mentioned a-S
i: Under the deposition conditions for the H film, it is deposited with a relatively large discharge power, and the photocurrent is one to two orders of magnitude smaller, making it a semiconductor layer with low light conductivity.As shown in Figure 2, the hydrogen in the inactive semiconductor layer The content is large compared to the active semiconductor layer. A detailed explanation of this inactive semiconductor layer can be found in Japanese Patent Application Laid-Open No. 1988-61.
29170, JP 61-85859, JP 62-13274, JP 62-13371
It is stated in the No.

In this example, the first and second semiconductor layers were deposited under the above-mentioned a-5i:H deposition conditions, and the first active semiconductor layer was
The second semiconductor layer, which is an inactive semiconductor layer, was placed under the deposition condition (2), and the second semiconductor layer, which was an inactive semiconductor layer, was placed under the deposition condition (2).

As shown in FIG. 1(^), aluminum, which will become the source and drain electrodes 7 and 8, is then deposited to a thickness of 1 μm by sputtering, and then a photosensitive resist 10 for patterning the source and drain electrodes is applied.

As shown in FIG. 1(B), after patterning the photosensitive resist into a desired pattern, source and drain electrodes 7.8 are formed by wet etching using the photosensitive resist 10 as a mask. Using this as a mask, the n9 layer 6 was etched away by RIE.

In addition, the etching removal was carried out by 1500 people and a-
It was used as a part of the second semiconductor layer 5, which is an inactive semiconductor layer under the Si:H deposition condition (2). Therefore, the first semiconductor layer 4, which is an active semiconductor, is not etched, and the first semiconductor layer 4 is protected by the second semiconductor layer 5.

This figure shows the state after the photosensitive resist 10 has been further removed.

As shown in FIG. 1(C), a photosensitive resist was then applied, and after patterning the photosensitive resist into a desired pattern, elements were separated by RIE and the photosensitive resist was peeled off. Next, the protective film 9 is made of polyimide (for example, LP5).
2 (manufactured by Hitachi Chemical) was applied using a spinner and heat-treated.

As described above, FIGS. 1(A) to (C) show the creation method of this example.
Through each step, a thin film transistor or a thin film transistor type optical sensor was created.

In order to clarify the effects of the present invention, the thin film transistor of the present invention and the conventional method (15
The thin film transistor (1st
As shown in FIG. 3 (A), a conventional thin film transistor was fabricated in which the same protective film (polyimide) as in this example was provided in the same process.

In FIG. 3, + indicates the manufacturing position of the thin film transistor. Further, the 0 point corresponds to approximately the center of the board.

FIG. 4 is a characteristic diagram showing the distribution of the threshold voltage vth in the dark current of the thin film transistor along line A-A' in FIG.

As is clear from FIG. 4, the thin film transistor of the present invention has improved distribution compared to the conventional thin film transistor. It goes without saying that the characteristics, dark current, etc. of the thin film transistor (not shown) are also the same here.

According to the present invention, only a portion of the second semiconductor layer, which is an inactive semiconductor layer, is etched by RIE, and the first semiconductor layer, which is an active semiconductor layer, is not etched, thereby reducing the influence on the characteristics. , good characteristics were uniformly obtained on a large-area substrate.

In this example, the inactive semiconductor layer is a-Si:H.
Although the film deposition condition (2) was used, the same effect could be obtained if the hydrogen content of the a-3i:H film was 20% or more and the forbidden band width was expanded by 0.1 to 0.2 eV or more.

When a thin film transistor type optical sensor was fabricated using the same structure and manufacturing method as the thin film transistor described above, the dark current distribution of the thin film transistor was also similar to the characteristics shown in Figure 4, and the Ip distribution when used as an optical sensor. The dark current was also improved.

(Example 2) From the first example, in order to further ensure moisture resistance, the thin film transistor and the thin film transistor type optical We will explain how to create a sensor.

The process is the same as the first embodiment until the resist for isolation between elements and the resist for isolation between elements shown in FIGS. In this example, the protective film 9 to be formed thereafter was deposited by 3000 people using a plasma CVD method to form a thin film transistor and a thin film transistor type photosensor.

The conditions for depositing the a-SiN++:H film, which is the M retention film 9, are shown below.

In the thin film transistor manufactured in this example, the first semiconductor layer 4, which is an active semiconductor layer, is protected by the second semiconductor layer 5, which is an inactive semiconductor layer, as in the first example. The effect of etching by RIE on the active semiconductor layer is reduced, and the influence of the formation process when depositing the protective film 9 and the composition of the protective film on the characteristics is also reduced, and the first embodiment shown in FIG. Similarly, in a large-area substrate, the distribution of the threshold voltage V0 in the dark current was improved, and good characteristics were obtained.

Next, in order to evaluate the environmental stability, especially the moisture resistance, of the thin film transistor of the present invention, the substrate shown in FIG.
Figure 13 (A) created using the manufacturing method of (B)
A thin film transistor (A) in which the same protective film as in the first embodiment was formed on a conventional thin film transistor in a similar process, and a thin film transistor of the present invention (B) formed in the first embodiment.
), the thin film transistor of the present invention (C
) A high-temperature high-temperature storage test (for example, 60° C. 90% storage test) was conducted on each thin film transistor at the 0 point on the line AA' in FIG. 3.

FIG. 5 is a characteristic diagram showing an example of the results of a high-temperature storage test. The figure shows drain voltage Vd=10■ and gate voltage Vd for each thin film transistor as an index of moisture resistance.
The dark current Id at g=OV is monitored, and changes with respect to each standing time are plotted.

As is clear from Fig. 5, the increase in dark current is (A) > (
The values increase in the order of B) > (C), which indicates that the present invention suppresses water intrusion, and that the second semiconductor layer 5, which is an inactive semiconductor layer, has an effect on moisture resistance and also By providing a protective film that has a high effect on moisture resistance, it was possible to improve moisture resistance without impairing the initial characteristics.

When a thin film transistor type optical sensor was manufactured using the same structure and manufacturing method as the thin film transistor described above, the threshold voltage (■) in the dark current was the same as the characteristic diagram shown in FIG. distribution was improved, and moisture resistance was also improved without impairing the initial properties.

(Example 3) FIG. 6 is a schematic vertical sectional view showing a coplanar type optical sensor produced according to the present invention. The creation method is the first
, is the same as the second embodiment except for the gate electrode 1 and the gate insulating layer 2.

Further, as shown in FIG. 7, an inactive semiconductor layer 3 similar to the second semiconductor layer 5 in the first and second embodiments is formed on the substrate.
It is also possible to provide

The optical sensor created in this example was evaluated in almost the same way as in the first and second examples, and the uniformity of characteristics such as dark current on a large area substrate was good, and the moisture resistance was also evaluated. A similar effect was obtained.

(Embodiment 4) A fourth embodiment of the present invention is a one-dimensional sensor array in an image reading device such as a facsimile machine, in which a drive circuit consisting of an optical sensor and a thin film transistor of the present invention is mounted on the same substrate as the second embodiment. They were created at the same time using the same process.

FIG. 8 is a circuit configuration diagram showing an example of a circuit of a one-dimensional sensor array composed of the thin film transistor type optical sensor and thin film transistors of the present invention.

However, here we will take up the case of a sensor array having nine optical sensors. In the same figure, optical sensors E1 to E9
Three blocks constitute one block, and three blocks constitute a photosensor array. The same applies to capacitors 01 to C9 and switching transistors T1 to T9, which correspond to optical sensors E1 to E9, respectively.

In addition, individual electrodes having the same order within each block of photosensors E1 to E9 are switching transistors T1 to T1, respectively.
It is connected to one of the common lines 102-104 via T9.

In detail, the first switching transistors TI, T'4 . T7 is connected to the common line 102, and the second switching transistors T2 . T5. T8
to the common line 103, and the third switching transistors T3°T6 . of each block. T9 to common line 104,
each connected. The common lines 102 to 104 are connected via switching transistors TIO to T12, respectively.
It is connected to amplifier 105.

The gate electrodes of the switching transistors STI to ST9 are connected in common for each block, similarly to the gate electrodes of the switching transistors T1 to T9, and are connected to the parallel output terminals of the shift register 201 for each block.

Therefore, depending on the shift timing of the shift register 201, the switching transistors STI to ST9 are sequentially turned on for each block.

Further, in FIG. 8, common uAs 102 to 104 are left alone via capacitors 010 to C12, respectively, and are grounded via switching transistors CTI to CT3.

The capacitance of capacitor 010~C12 is capacitor 01~C
Make it sufficiently larger than that of 9.

Each gate electrode of the switching transistors CTI to CT3 is connected in common and connected to a terminal 10g. That is, by applying a high level to the terminal 10g,
Switching transistors CT1 to CT3 are simultaneously turned on, and common lines 102 to 104 are grounded.

FIG. 9 shows a partial plan view of a one-dimensional sensor array created based on the circuit diagram shown in FIG.

In the figure, 20 is a wiring section formed in a matrix;
Reference numeral 21 indicates an optical sensor section using a thin film transistor type optical sensor according to the present invention, 22 indicates a charge storage section, 23a indicates a transfer switch using a thin film transistor according to the present invention, and 24b indicates a thin film transistor according to the present invention that resets the charge in the charge accumulation section 22. 25 is a lead line for connecting the signal specific power of the transfer switch to a signal processing IC, and 24 is a load capacitor for accumulating and reading out the charge transferred by the transfer switch 23a.

In addition, in Fig. 9, in order to avoid complication, the upper and lower
Only the electrode wiring of the layer is shown, and the photoconductive semiconductor layer and the insulating layer are not shown. Furthermore, an n''' layer 39 (shown in FIGS. 10(A) and 10(B)) is formed at the interface between the upper electrode wiring and the semiconductor layer to form an ohmic contact.

FIG. 1O (A) shows a longitudinal cross-sectional view of the optical sensor section 21, which includes a lower electrode wiring 31 as a gate electrode, an insulating layer 32 as a gate insulating layer, an active semiconductor layer 33, and an insulating layer 33. It is composed of an active semiconductor layer 34, an upper layer electrode wiring 36 serving as a source electrode, an upper layer electrode wiring 35 serving as a drain electrode, and a protective layer 40. Note that, as in the second embodiment, an inactive semiconductor layer is provided on the surface of the active semiconductor layer between the source and train electrodes.

Next, FIG. 10(B) shows a longitudinal sectional view of the transfer switch 23a and the discharge switch 23b.
a shows a lower electrode wiring 37 serving as a gate electrode, an insulating layer 32 serving as a gate insulating layer, an active semiconductor layer 33, an inactive semiconductor layer 34, and an upper electrode arrangement 136 serving as a source electrode.
, an upper layer electrode wiring 38 serving as a drain electrode, and a protective film 40
It consists of Also in the discharge switch 23b,
It has the same configuration as the transfer switch 23a described above.

The transfer switch 23a and the discharge switch 23b also have an inactive semiconductor layer on the active semiconductor surface between the source and drain electrodes, similar to the optical sensor section described above.

As mentioned above, the ohmic contact layer 39 is provided at the interface between the upper electrode wiring 35, 36° 38 of the optical sensor section, the transfer switch, and the discharge switch and the inactive semiconductor layer 34.
is formed.

As described above, in the one-dimensional sensor array fabricated on a large-area substrate according to the present invention, the active semiconductor layer 33 is protected by the inactive semiconductor layer 34, as in the second embodiment. The effects of the etching removal of the ohmic contact layer 39 during electrode formation of the discharge switch, the protective film formation process after electrode formation, and the composition of the protective film are reduced, and good characteristics can be uniformly obtained on a large-area substrate. And high reliability was obtained.

Furthermore, the one-dimensional sensor array of the present invention includes a lens that forms a document image on the optical sensor section using a 1-magnification imaging lens 12 (for example, a SELFOC lens (manufactured by Nippon Sheet Glass)) as shown in FIG. It can be used for both a digital image reading device and a lensless image reading device that reads a document P by forming a wear-resistant layer 11 on the top of the optical sensor shown in FIG. 12 and illuminating the sensor from the back side with a light source 13. It is.

In addition, in FIG. 11, 14 is a sensor array board, 1
5 is a housing. Further, in FIG. 12, 16 is a light entrance window, and 17 is a photoelectric conversion section. In FIG. 12, other structural members are the same as those shown in FIG. 9 and FIGS.

In the embodiments of the present invention described above, a hydrogenated amorphous silicon film is used as the active semiconductor layer, but it may also contain halogen atoms such as fluorine atoms. Further, the protective film is also made of polyimide or hydrogenated amorphous silicon nitride film, but is not limited to polyimide or nitride film.

[Effects of the Invention] As explained above, in the thin film semiconductor device of the present invention, at least an active semiconductor layer, an inactive semiconductor layer,
Since the ohmic layer is sequentially laminated, and the ohmic layer and metal electrode layer have an inactive semiconductor layer between the formed electrodes, there are various problems and protection caused by directly etching the semiconductor active layer between the electrodes by RIE etc. Problems in the process when forming the layer, variations in the band state of the active semiconductor layer that occur depending on the composition of the protective layer, etc. are reduced, and the degree of freedom in the composition of the protective layer made of inorganic material is increased. Therefore, it is possible to select a protective layer with good moisture resistance, so it is possible to use thin film semiconductor devices that require almost uniform electrical characteristics on large-area substrates, such as active matrix type thin film transistors, thin film transistor type photosensors, coplanar type photosensors, etc. For photoelectric conversion devices such as displays and one-dimensional optical sensor arrays, it is inexpensive, has excellent electrical properties with little distribution in the substrate, and has environmental stability such as moisture resistance.
A highly reliable device can be provided.

[Brief explanation of the drawing]

FIGS. 1(A) to 1(C) are process diagrams showing a method for manufacturing a thin film transistor and a thin film transistor type optical sensor of the present invention. FIG. 2 is a characteristic diagram showing the hydrogen content rate with respect to the discharge power under the deposition conditions of the a-Si:H film. FIG. 3 is an explanatory diagram showing the manufacturing position of a semiconductor device within a large-area glass substrate. FIG. 4 is a characteristic diagram showing the distribution of the threshold voltage in the dark current of the thin film transistor on the line A-A' of FIG. FIG. 5 is a characteristic diagram showing an example of the results of a 60° C. 90% humidity test of a thin film transistor. FIG. 6 is a longitudinal cross-sectional view of the coplanar sensor of Example 3. FIG. 7 is a longitudinal sectional view of a coplanar sensor in which an inactive semiconductor layer is also provided on the substrate. FIG. 8 is a circuit configuration diagram showing an example of a circuit of an image reading device. FIG. 9 is a partial plan view of a one-dimensional sensor array created based on the circuit shown in FIG. 8. FIG. 10 is a partial cross-sectional view of a one-dimensional sensor array created based on the circuit shown in FIG. FIG. 11 is an explanatory diagram showing an example of an image reading device with a lens according to the present invention. FIG. 12 is an explanatory diagram showing an example of the lensless image reading device of the present invention. FIG. 13(A) is a longitudinal cross-sectional view of a conventional thin film transistor. FIG. 13(B) is a plan view of a conventional thin film transistor. FIG. 14 is a longitudinal sectional view of a conventional coplanar sensor. FIGS. 15(A) and 15(B) are process diagrams showing a conventional method for manufacturing a thin film transistor. G, 30 glass substrate 1, 31, 37: Gate electrode 2. 32: Gate insulating layer 3. 5, 34: Inactive semiconductor layer 4, 33: Active semiconductor layer 6. 39 + n'' layer (ohmic contact layer) 7, 8
, 35.36.38+upper electrode layer 9.40: protective layer
10: Resist 11: Wear-resistant layer 12: Same-magnification imaging lens 13: Light source 14: Sensor array substrate processing 5: Housing 16: Light entrance window 17:
Photoelectric conversion section 18: Surface of active semiconductor layer 20: Matrix-formed wiring section 21: Photosensor section 22: Charge storage section 23a: Transfer switch 23b: Discharge switch 24: Load capacitor 25: Signal output lead line E1-E9: Optical sensor C1-C9: Capacitor CI
O~C12: Capacitor STI~ST9 Niswitching transistor T1~T
9 Niswitching transistors CTI to CT3 Niswitching transistors TIO to T12 Niswitching transistors 101: Bias power supply 105: Anbu 1
02-104: Common line 108: Terminal 106.107
．． 201: Shift register P: Engraving of manuscript drawings Figure 4 Figure 4 Resistance LLL'-%'! B't Ps'l (44L
Figure 9 Figure 10 Figure 1? Figure 2-73 Figure 3 Figure 4 Procedural Amendment May 9, 1990

Claims (6)

[Claims] (1) A thin film semiconductor device in which at least an active semiconductor layer, an inactive semiconductor layer, an ohmic layer, and a metal layer are sequentially laminated on a substrate, and electrodes are formed by the ohmic layer and the metal layer. (2) The thin film semiconductor device according to claim 1, further comprising an inactive semiconductor layer between planar electrodes formed by an ohmic layer and a metal layer. (3) The thin film semiconductor device according to claim 1, wherein the inactive semiconductor layer contains at least Si atoms and H atoms,
A thin film semiconductor device characterized in that the forbidden band width of the active semiconductor layer is expanded by the H content than that of the active semiconductor layer. (4) The thin film semiconductor device according to claim 1, wherein the thin film semiconductor device is a thin film transistor. (5) The thin film semiconductor device according to claim 1, wherein the thin film semiconductor device is a thin film transistor type optical sensor. (6) The thin film semiconductor device according to claim 1, wherein the thin film semiconductor device is a coplanar optical sensor.