JPH03277117A - Overcurrent protective circuit - Google Patents

Overcurrent protective circuit

Info

Publication number
JPH03277117A
JPH03277117A JP2311008A JP31100890A JPH03277117A JP H03277117 A JPH03277117 A JP H03277117A JP 2311008 A JP2311008 A JP 2311008A JP 31100890 A JP31100890 A JP 31100890A JP H03277117 A JPH03277117 A JP H03277117A
Authority
JP
Japan
Prior art keywords
point
load
level
current
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2311008A
Other languages
Japanese (ja)
Inventor
Yuichi Inoue
優一 井上
Shinichi Fukumoto
福本 真一
Isato Torii
勇人 鳥居
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furuno Electric Co Ltd
Original Assignee
Furuno Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furuno Electric Co Ltd filed Critical Furuno Electric Co Ltd
Priority to JP2311008A priority Critical patent/JPH03277117A/en
Publication of JPH03277117A publication Critical patent/JPH03277117A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To cut off the current supply to the load when a device gets in an over-current condition and an over current is detected and to resume the current supply automatically after elimination of the cause of the over current by making up the device from an oscillation circuit, a circuit to detect an over current and a flip-flop circuit. CONSTITUTION:In the case that a current is less than a rated value, a transistor Q1 is in an OFF condition and a transistor Q2 in an OFF condition. When an over current flows in the load, the transistor Q1 is switched ON by a voltage drop in a resistor R1 with a 'd' point at the 'L' level and an 'e' point at the 'H' level. Then, the transistor Q2 turns OFF followed by the cutoff of the current supply to the load. When the resistor Q1 turns OFF, the 'd' point comes to the 'H' level, however, the 'e' point is held at the 'H' level until the 'L' level pulse is applied to a 'c' point. With the 'L' level pulse applied to the 'c' point from an IC 1 for a timer, the 'e' point changes to the 'L' level and the transistor Q2 turns ON and finally the current supply to the load is resumed.

Description

【発明の詳細な説明】 (a)産業上の利用分野 この発明は、電源装置などに用いられる過電流保護回路
に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to an overcurrent protection circuit used in power supplies and the like.

(1))従来の技術 一般じ、;a装置として用いられる直流電圧安定化電源
回路は、入力電圧の変動に係わらす出力電圧を安定化さ
せる電圧安定化回路とともに負荷およびt源装置を過電
流から保護するための過電流保護回路が設けられている
(1)) Conventional technology in general: A DC voltage stabilizing power supply circuit used as a device has a voltage stabilizing circuit that stabilizes the output voltage in response to fluctuations in the input voltage, as well as a voltage stabilizing circuit that stabilizes the output voltage in response to fluctuations in the input voltage. An overcurrent protection circuit is provided to protect against

一般的な過電流保護回路は、負荷電流路中にスイッチ素
子を直列接続するとともに負荷供給電流を検出するlt
i検出回路を設け、負荷供給電流が一定値を越えたとき
上記スイッチ素子をオフする動作停止型と、過電流検出
時に負荷供給電圧を低下させ、過電流状態が解除された
ときに元の定電圧に復帰する自動復帰垂下型とがあり、
負荷に応して或いは過電流保護の目的に応してそのいず
れかの方法が採られている。
A typical overcurrent protection circuit connects a switching element in series in the load current path and detects the load supply current.
There are two types: one is equipped with an i detection circuit and turns off the switch element when the load supply current exceeds a certain value, and the other is a stop type that reduces the load supply voltage when an overcurrent is detected and returns to the original setting when the overcurrent condition is released. There is an automatic return drooping type that returns to voltage.
Either method is adopted depending on the load or the purpose of overcurrent protection.

(C)発明が解決しようとする課題 上述の過電流保護回路のうち動作停止型のものでは、−
旦過電流状態となれば、過電流状態が復帰されても電源
の再投入操作を行なわなければならない。自動復帰垂下
型のものではそのような不都合がないものの、過電流状
態で負荷供給電圧が定格電圧より大幅に低下するため、
定格電圧でのみ正常動作し、低電圧では誤動作または故
障するような負荷に対しては用いることができない。
(C) Problems to be Solved by the Invention Among the above-mentioned overcurrent protection circuits, the operation stop type has -
Once the overcurrent condition occurs, the power must be turned on again even if the overcurrent condition is restored. Automatic return droop type does not have such inconvenience, but the load supply voltage drops significantly below the rated voltage in an overcurrent condition, so
It cannot be used for loads that operate normally only at the rated voltage and malfunction or break down at low voltages.

この発明の目的は、負荷に対する電源電圧供給時には常
に定格電圧を供給し、過電流検出により負荷供給電流を
遮断し、その後の過電流原因解除により自動復帰させる
ようにした過電流保護回路を提供することにある。
An object of the present invention is to provide an overcurrent protection circuit that always supplies a rated voltage when supplying power supply voltage to a load, cuts off the load supply current by detecting an overcurrent, and then automatically restores it when the cause of the overcurrent is removed. There is a particular thing.

(d1課題を解決するための手段 この発明の過電流保護回路は、一定周期の矩形波信号を
発生する発振回路と、過大電流を検出する回路と、上記
過大電流検出回路の検出出力によりセットされ、上記発
振回路の出力信号によりリセットされるフリップフロッ
プと、上記フリップフロップのリセット状態で導通する
、負荷電流路中に直列接続されたスイッチ素子とからな
る。
(Means for Solving Problem d1) The overcurrent protection circuit of the present invention is set by an oscillation circuit that generates a rectangular wave signal of a constant period, a circuit that detects an overcurrent, and a detection output of the overcurrent detection circuit. , a flip-flop that is reset by the output signal of the oscillation circuit, and a switch element that is connected in series in a load current path and is conductive in the reset state of the flip-flop.

(e)作用 この発明の過電流保護回路では、発振回路が一定周期の
矩形波信号を発生し、フリップフロップは過電流検出回
路の過電流検出によりセットされ、上記発振回路の出力
信号によりリセットされる。また負荷電流路中には直列
にスイッチ素子が設けられていて、上記フリ・ノブフロ
ップのり七ノド状態で導通ずる。従ってフリップフロッ
プがリセットされている通常状態では上記スイッチ素子
が導通状態となって負荷電流が供給されるが、過電流検
出回路が過電流状態を検出すればフリップフロップがセ
ットされ、これに伴い上記スイッチ素子が遮断状態とな
って負荷および電源回路が過電流保護状態となる。上記
フリップフロップは発振回路より出力される矩形波信号
により一定周期でリセットされる。このフリップフロッ
プのリセット状態で上記スイッチ素子が再び導通し負荷
に対し定格電圧が供給される。この時点てまだ過電流状
態の原因が解除されていなければ再び過電流検出回路に
よる検出出力によりフリップフロップがセットされスイ
ッチ素子が遮断状態となる。過電流状態の原因が解除さ
れたのちは、発振回路より出力される矩形波信号により
上記フリップフロップかりセットされてスイッチ素子が
導通する。その後は過電流検出回路が過電流状態を検出
しないため負荷に対する電流供給が継続される。すなわ
ち自動復帰する。
(e) Function In the overcurrent protection circuit of the present invention, the oscillation circuit generates a rectangular wave signal with a constant period, and the flip-flop is set by the overcurrent detection of the overcurrent detection circuit and reset by the output signal of the oscillation circuit. Ru. Further, a switch element is provided in series in the load current path, and conducts in the above-mentioned free-knob flop state. Therefore, in the normal state when the flip-flop is reset, the above-mentioned switch element becomes conductive and the load current is supplied, but if the overcurrent detection circuit detects an overcurrent state, the flip-flop is set, and accordingly, the above-mentioned The switch element enters a cutoff state, and the load and power supply circuit enter an overcurrent protection state. The flip-flop is reset at regular intervals by a rectangular wave signal output from an oscillation circuit. When the flip-flop is in the reset state, the switching element becomes conductive again and the rated voltage is supplied to the load. If the cause of the overcurrent condition has not been eliminated at this point, the flip-flop is again set by the detection output from the overcurrent detection circuit, and the switch element is turned off. After the cause of the overcurrent condition is removed, the flip-flop is set by the rectangular wave signal output from the oscillation circuit, and the switch element becomes conductive. After that, the overcurrent detection circuit does not detect an overcurrent condition, so current supply to the load continues. In other words, it automatically returns.

このように過電流保護状態では負荷供給電流は完全に遮
断され、しかも過電流状態の原因が解除された時点(正
確にはその後発振回路から矩形波信号が出力された最初
の時点)で自動復帰される。そのため自動復帰型であり
ながら負荷の特性上定格電圧以外の電源電圧を供給でき
ない負荷に対しても適用できるようになる。
In this way, in the overcurrent protection state, the load supply current is completely cut off, and it automatically recovers as soon as the cause of the overcurrent state is removed (more precisely, at the first point in time when a square wave signal is output from the oscillation circuit). be done. Therefore, although it is an automatic reset type, it can also be applied to loads that cannot be supplied with a power supply voltage other than the rated voltage due to the characteristics of the load.

(fl実施例 この発明の実施例に係る過電流保護回路の例とその各部
の波形を第1図および第2図に示す。第1図においてI
Nは電源入力端子、OUTは電源出力端子、Sは負荷供
給電流が正常範囲内であるか否かの判定結果を出力する
端子である。抵抗R1は負荷電流の検出用に用いられ、
その値は、トランジスタQ2を経由して0LITより供
給される電流が許容最大値となったとき、抵抗両端の電
圧が0.6Vとなるよう選択する。トランジスタQ1は
抵抗R1両端の電圧が0.6V以下であるとオフ状態で
あり、そのときb点はoVとなる。尚、Ql、R1,R
2,R3によってこの発明に係ろ過大電流検出回路を構
成する。ICIはこの発明に係る発振回路に相当するタ
イマ用ICであり、一定周期でCのラインへ第2図中C
で示すような矩形波信号を出力する。IC2の1,2番
ピンにはbの電圧が供給されるで、その出力3番ピンd
点にはb点の反転した信号が現れる。このIC2はその
4.5.6番ピンおよび1),12.13番ビンの接続
によってこの発明に係るフリップフロップ(R−Sフリ
ップフロップ)を構成していて、d点が一度“L”レベ
ルとなると、その後d点が“H”レベルに戻ってもC点
に”L″レベルパルスが印加されるまでe点は”H”レ
ベルを維持する。
(fl Embodiment) An example of an overcurrent protection circuit according to an embodiment of the present invention and the waveforms of each part thereof are shown in FIGS. 1 and 2.
N is a power input terminal, OUT is a power output terminal, and S is a terminal that outputs a determination result as to whether the load supply current is within a normal range. Resistor R1 is used for detecting load current,
Its value is selected so that when the current supplied from 0LIT via transistor Q2 reaches the maximum allowable value, the voltage across the resistor becomes 0.6V. The transistor Q1 is in an off state when the voltage across the resistor R1 is 0.6V or less, and in that case, the point b becomes oV. In addition, Ql, R1, R
2 and R3 constitute a filtering large current detection circuit according to the present invention. ICI is a timer IC corresponding to the oscillation circuit according to the present invention, and the line C in FIG.
Outputs a rectangular wave signal as shown in . Voltage b is supplied to pins 1 and 2 of IC2, and its output pin 3 is d.
At the point, an inverted signal of point b appears. This IC2 constitutes a flip-flop (R-S flip-flop) according to the present invention by connecting pins 4, 5, and 6 and pins 1) and 12, and 13, and point d is once at "L" level. Then, even if point d subsequently returns to the "H" level, point e remains at the "H" level until an "L" level pulse is applied to point C.

トランジスタQ2はこの発明に係るスイッチ素子に相当
するもので、抵抗R4を通してe点に接続しているため
、e点が“L”レベル(0■)となれば、抵抗R4を通
してベース電流が供給されトランジスタQ2が導通状態
となり、出力端OUTへ電流を供給する。逆に、e点が
“H”レベル(5■)の場合トランジスタQ2は遮断状
態となる。
The transistor Q2 corresponds to the switch element according to the present invention, and is connected to the point e through the resistor R4, so when the point e reaches the "L" level (0■), the base current is supplied through the resistor R4. Transistor Q2 becomes conductive and supplies current to output terminal OUT. Conversely, when the point e is at the "H" level (5■), the transistor Q2 is cut off.

トランジスタQ3のベースには、出力端OUTの電圧が
抵抗R8,R9で分圧された電圧が供給されている。Q
3のエミッタは電源入力端子IN(5V)に接続してい
るのでg点の電圧が4.4V以下(Q3のベース−エミ
ッタ間電圧が0.6V以上)となった場合、Q3がオン
状態となりh点を“H”レベルとする。なお、抵抗R8
に接続したダイオードD1は、抵抗R1,R8,R9お
よびトランジスタQ2などによる負荷供給電流検出回路
の温度補償用として作用し、周囲温度にかかわらず負荷
供給電流が定格範囲未満のときトランジスタQ3がオフ
する。
A voltage obtained by dividing the voltage at the output terminal OUT by resistors R8 and R9 is supplied to the base of the transistor Q3. Q
Since the emitter of 3 is connected to the power supply input terminal IN (5V), if the voltage at point g becomes 4.4V or less (the voltage between the base and emitter of Q3 is 0.6V or more), Q3 turns on. Let point h be the "H" level. In addition, resistance R8
The diode D1 connected to the resistor R1, R8, R9 and the transistor Q2 acts as a temperature compensation circuit for the load supply current detection circuit, and the transistor Q3 turns off when the load supply current is below the rated range regardless of the ambient temperature. .

さて、出力端子OUTから負荷に供給される電流が定格
範囲未満の場合、トランジスタQ1はオフし、b点が“
L”レベル、d点が“H″レベルe点が“L”レベルと
なってQ2はオン状態となる。また負荷供給電流が少な
いため、抵抗R1による電圧降下は少なく、g点は4,
4V以上となる。従ってトランジスタQ3がオフ状態、
h点が“L”レベルとなってi点が“H”レベルとなり
、これが端子Sより出力される(第2図の定格未満領域
参照)。
Now, if the current supplied from the output terminal OUT to the load is less than the rated range, the transistor Q1 is turned off and the point b becomes "
"L" level, point d becomes "H" level, point e becomes "L" level, and Q2 turns on. Also, since the load supply current is small, the voltage drop due to resistor R1 is small, and point g becomes 4,
It becomes 4V or more. Therefore, transistor Q3 is in the off state,
Point h becomes "L" level and point i becomes "H" level, which is output from terminal S (see below-rated area in FIG. 2).

負荷供給電流が正常である場合、抵抗R1による電圧降
下により、g点の電圧は4.4V以下に低下する。その
結果、トランジスタQ3はオン状態となりh点は“H”
レベルとなる。このとき抵抗R1の降下電圧は未だ0.
6Vに達しないためトランジスタQ1はオフのままであ
る。従ってi点は“L”レベルとなってこれが端子Sよ
り出力される(第2図の定格負荷領域参照)。
When the load supply current is normal, the voltage at point g decreases to 4.4V or less due to the voltage drop caused by the resistor R1. As a result, transistor Q3 is turned on and point h becomes "H".
level. At this time, the voltage drop across resistor R1 is still 0.
Since the voltage does not reach 6V, transistor Q1 remains off. Therefore, the i point becomes the "L" level, which is output from the terminal S (see the rated load area in FIG. 2).

負荷に過大な電流が流れた場合、抵抗R1による電圧降
下が0.6Vを超え、その結果トランジスタQ1がオン
し、d点は°L″ e点は“H”となってトランジスタ
Q2がオフし、これにより負荷供給電流が遮断される。
When an excessive current flows through the load, the voltage drop across resistor R1 exceeds 0.6V, and as a result, transistor Q1 turns on, and point d becomes "L" and point e becomes "H", turning transistor Q2 off. , this cuts off the load supply current.

この遮断によって抵抗R1の電圧降下がOとなって、Q
lがオフしd点が“H“レベルとなるが、e点のレベル
は0点に“L”レベルのパルスが印加されるまで“H”
レベルヲ維持スる。0点のレベルが“H”レベルである
期間、i点が“H”レベルとなってこれが端子Sより出
力される。0点に“L”レベルのパルスが印加されると
、e点は“L”レベルに変化し、トランジスタQ2がオ
ンし、負荷への電流供給が再開される。このとき負荷が
過負荷状態のままであると、再度トランジスタQ1がオ
ンとなってトランジスタQ2が遮断されるという動作を
繰り返す(第2図の過負荷領域参照)。
Due to this interruption, the voltage drop across resistor R1 becomes O, and Q
l is turned off and point d becomes "H" level, but the level of point e remains "H" until a "L" level pulse is applied to point 0.
Maintain the level. During the period when the level of the 0 point is the "H" level, the i point becomes the "H" level, which is output from the terminal S. When a "L" level pulse is applied to point 0, point e changes to "L" level, transistor Q2 is turned on, and current supply to the load is restarted. If the load remains in the overload state at this time, the operation of turning on the transistor Q1 and cutting off the transistor Q2 is repeated (see the overload region in FIG. 2).

このように負荷供給電流が定格範囲内であれば電流を供
給し、短絡などの過負荷状態である場合にはその原因が
除かれるまで電流の供給を中断する。そして過負荷状態
が解消されたなら速やかに自動復帰する。
In this way, if the load supply current is within the rated range, the current is supplied, and if there is an overload condition such as a short circuit, the current supply is interrupted until the cause is removed. When the overload condition is resolved, the system automatically returns to normal operation.

第1図に示した回路は、負荷供給電流が定格範囲内(下
限≦負荷電流≦上限)であるか否かの状態を示す判定結
果出力機能を有するため、これを利用して過電流保護状
態の表示や負荷状態の表示を行うこともできる。
The circuit shown in Figure 1 has a judgment result output function that indicates whether or not the load supply current is within the rated range (lower limit ≦ load current ≦ upper limit). It is also possible to display the load status and load status.

(g1発明の効果 この発明によれば、過電流状態となったときに負荷供給
電流が完全に遮断されるため、負荷に定格電圧未満の低
電圧が印加されることがなく負荷の誤動作または故障を
防止することができ、しかも過電流状態の原因が解除さ
れたなら、その後は自動的に負荷電流が供給されるため
、電源スィッチの切断および再投入などの手動操作が不
要となる。
(g1 Effect of the invention According to this invention, the load supply current is completely cut off when an overcurrent condition occurs, so that a low voltage lower than the rated voltage is not applied to the load, resulting in malfunction or failure of the load.) Moreover, once the cause of the overcurrent condition is removed, the load current is automatically supplied after that, so manual operations such as turning off and turning on the power switch are no longer necessary.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施例に係る過電流保護回路の回路
図である。第2図は同回路各部の信号波形図である。 ICl−タイマ用IC0
FIG. 1 is a circuit diagram of an overcurrent protection circuit according to an embodiment of the invention. FIG. 2 is a signal waveform diagram of each part of the circuit. ICl-IC0 for timer

Claims (1)

【特許請求の範囲】[Claims] (1)一定周期の矩形波信号を発生する発振回路と、過
大電流を検出する回路と、上記過大電流検出回路の検出
出力によりセットされ、上記発振回路の出力信号により
リセットされるフリップフロップと、上記フリップフロ
ップのリセット状態で導通する、負荷電流路中に直列接
続されたスイッチ素子とからなる過電流保護回路。
(1) an oscillation circuit that generates a rectangular wave signal with a constant period, a circuit that detects excessive current, and a flip-flop that is set by the detection output of the overcurrent detection circuit and reset by the output signal of the oscillation circuit; An overcurrent protection circuit comprising a switch element connected in series in a load current path and conductive when the flip-flop is in a reset state.
JP2311008A 1990-03-16 1990-11-15 Overcurrent protective circuit Pending JPH03277117A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2311008A JPH03277117A (en) 1990-03-16 1990-11-15 Overcurrent protective circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2067922A JPH03268519A (en) 1990-03-16 1990-03-16 Receiver
JP2311008A JPH03277117A (en) 1990-03-16 1990-11-15 Overcurrent protective circuit

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2067922A Division JPH03268519A (en) 1990-03-16 1990-03-16 Receiver

Publications (1)

Publication Number Publication Date
JPH03277117A true JPH03277117A (en) 1991-12-09

Family

ID=13358892

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2067922A Pending JPH03268519A (en) 1990-03-16 1990-03-16 Receiver
JP2311008A Pending JPH03277117A (en) 1990-03-16 1990-11-15 Overcurrent protective circuit

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP2067922A Pending JPH03268519A (en) 1990-03-16 1990-03-16 Receiver

Country Status (1)

Country Link
JP (2) JPH03268519A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012157088A (en) * 2011-01-21 2012-08-16 Rinnai Corp Overcurrent protection device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08229014A (en) * 1995-02-28 1996-09-10 Tochigi Nippon Denki Kk Electrocardiograph
JP5819212B2 (en) * 2012-02-13 2015-11-18 アルプス電気株式会社 Load connection status detection circuit

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JPS58204722A (en) * 1982-05-21 1983-11-29 株式会社東芝 Current controller
JPS61199416A (en) * 1985-02-28 1986-09-03 富士電機株式会社 Short-circuiting protection circuit

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JPH01190130A (en) * 1988-01-26 1989-07-31 Matsushita Electric Works Ltd Booster power supply circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58204722A (en) * 1982-05-21 1983-11-29 株式会社東芝 Current controller
JPS61199416A (en) * 1985-02-28 1986-09-03 富士電機株式会社 Short-circuiting protection circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012157088A (en) * 2011-01-21 2012-08-16 Rinnai Corp Overcurrent protection device

Also Published As

Publication number Publication date
JPH03268519A (en) 1991-11-29

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