JPH03277041A - Signal processing unit - Google Patents

Signal processing unit

Info

Publication number
JPH03277041A
JPH03277041A JP2078149A JP7814990A JPH03277041A JP H03277041 A JPH03277041 A JP H03277041A JP 2078149 A JP2078149 A JP 2078149A JP 7814990 A JP7814990 A JP 7814990A JP H03277041 A JPH03277041 A JP H03277041A
Authority
JP
Japan
Prior art keywords
signal processing
processing circuit
test
circuit
fault
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2078149A
Other languages
Japanese (ja)
Inventor
Koichi Murata
村田 幸一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2078149A priority Critical patent/JPH03277041A/en
Publication of JPH03277041A publication Critical patent/JPH03277041A/en
Pending legal-status Critical Current

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  • Monitoring And Testing Of Exchanges (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To discriminate whether a cause to a fault resides in a signal processing circuit or an opposite equipment by loading a test circuit to the signal processing circuit on the occurrence of the fault so as to implement communication test between the signal processing circuit detecting the fault and a test signal processing circuit. CONSTITUTION:When a signal processing circuit 11 detects a fault, a host controller 7 allows a man-machine interface device 10 to type out a message informed of fault occurrence from the signal processing circuit 11. A maintenance personnel connects contacts of a rotary switch 17 and output lines 221, 222, 223 by using a connector 9, connect contacts of a rotary switch 16 and input lines 231, 232, 233 to load a test circuit 8 to the signal processing circuit and uses the rotary switches 16,17 to select required input and output lines 231, 221. When the recovery of the fault is confirmed by the maintenance personnel, the test circuit 8 is removed to make the test complete.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は信号処理装置に関し、特に、複数の回線のそれ
ぞれに対応して設けられ当該回線に接続される出力線と
入力線とを有する信号処理回路と、これら信号処理回路
と上位制御ml@置の間で制御情報と送受信データの中
継制御を行うインタフェース制御回路とを有する信号処
理装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a signal processing device, and particularly to a signal processing device having an output line and an input line provided corresponding to each of a plurality of lines and connected to the lines. The present invention relates to a signal processing device having a processing circuit and an interface control circuit that performs relay control of control information and transmission/reception data between these signal processing circuits and a host control device.

〔従来の技術〕[Conventional technology]

従来、この種の信号処理装置は、回線ごとに設けられた
信号処理回路の1つに障害が発生した場合、その信号処
理回路を交換し、その後に相手装置との通信を開始して
異常がないことにより障害の修復を確認していた。
Conventionally, in this type of signal processing device, when a failure occurs in one of the signal processing circuits provided for each line, that signal processing circuit is replaced, and communication is then started with the other device to resolve the problem. It was confirmed that the failure was corrected by not having any problems.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の信号処理装置では、信号処理回路で過信
異常などの障害の発生を検出したとき、障害がその信号
処理回路の異常によるものなのか相手側装置の異常によ
るものなのかの判定が容易ではなく、また信号処理回路
を交換した後の障害の修復の確認が相手装置との通信を
開始するまで行えないという欠点がある。
In the conventional signal processing device described above, when a fault such as an overconfidence abnormality is detected in the signal processing circuit, it is easy to determine whether the fault is caused by an abnormality in the signal processing circuit or the other device. Moreover, there is a drawback in that it is not possible to confirm that the fault has been repaired after replacing the signal processing circuit until communication with the partner device is started.

本発明の目的は、障害の原因が信号処理回路にあるのか
相手側装置にあるのかの判定が容易に行なえ、信号処理
回路交換後の障害の修復の確認を相手装置との通信を利
用しなくても行うことのできる信号処理装置を提供する
ことにある。
The purpose of the present invention is to easily determine whether the cause of a fault is in the signal processing circuit or the other device, and to confirm that the fault has been repaired after replacing the signal processing circuit without using communication with the other device. The object of the present invention is to provide a signal processing device that can perform the following operations.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の信号処理装置は、 出力線と入力線とを有する試験用信号処理回路と、該試
験用信号処理回路の出力線が共通端子に接続された第1
のロータリスイッチと、該試験用信号処理回路の入力線
が共通端子に接続された第2のロータリスイッチとを有
し、前記信号処理装C1,:@It12可蛯である試験
用回路と、各信号処理回路の人力線と第1のロータリス
イッチのそれぞれの接点を接続し、各信号処理回路の出
力線と第2のロータリスイッチのそれぞれの接点を接続
し、該試験用信号処理回路とインタフェース制御回路と
を接続するコネクタとを有し、前記インタフェースll
llm1回路は、被試験信号処理回路の番号を含む試験
コマンドを上位制御装置より受取ると、該番号の信号処
理回路および該試験用信号処理回路と上位制御!D装茸
との間で制御情報と送受信データの中継制御を行う。
The signal processing device of the present invention includes a test signal processing circuit having an output line and an input line, and a first test signal processing circuit to which the output line of the test signal processing circuit is connected to a common terminal.
and a second rotary switch to which the input line of the test signal processing circuit is connected to a common terminal, and the test circuit is the signal processing device C1, :@It12, and each Connect the human power line of the signal processing circuit to each contact of the first rotary switch, connect the output line of each signal processing circuit to each contact of the second rotary switch, and interface control with the test signal processing circuit. and a connector for connecting the interface ll to the circuit.
When the llm1 circuit receives a test command including the number of the signal processing circuit under test from the higher-level control device, the llm1 circuit communicates with the signal processing circuit of that number, the test signal processing circuit, and the higher-level control! Relay control of control information and transmission/reception data is performed with the D-equipped mushroom.

〔作用〕[Effect]

障害の発生を検出したとき、試験用回路を信号処理装置
に装着し、それぞれのロータリスイッチで障害が発生し
た信号処理回路の入力線と出力線を選択すると、障害が
発生した信号処理回路と試験用信号処理回路の間で対向
ルートが形成され、障害が発生した信号処理回路の番号
を含む試験コマンドを投入することによって、この信号
処理回路と試験用信号処理回路の間で通信試験を行うこ
とができる。この通信試験で異常が検出されなければ前
記の信号処理回路は正常に動作していると判断できるの
で、この通信試験によって、障害が検出された信号処理
回路に異常があるのか、相手側装置に異常があるのかを
判断でき、また信号処理回路の交換後にこの通信試験を
行うことによって障害の修復確認を行うことができる。
When a fault is detected, attach the test circuit to the signal processing device and select the input line and output line of the faulty signal processing circuit using each rotary switch. A communication test is performed between this signal processing circuit and the test signal processing circuit by forming an opposing route between the test signal processing circuit and inputting a test command that includes the number of the signal processing circuit in which the fault has occurred. I can do it. If no abnormality is detected in this communication test, it can be determined that the signal processing circuit described above is operating normally, so this communication test will determine whether there is an abnormality in the signal processing circuit in which the fault was detected. It is possible to determine whether there is an abnormality, and by performing this communication test after replacing the signal processing circuit, it is possible to confirm that the fault has been repaired.

〔実施例) 次に、本発明の実施例について図面を参照して説明する
[Example] Next, an example of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の信号処理装置の構成を示す
ブ【】ツタ図である。
FIG. 1 is a diagram showing the configuration of a signal processing device according to an embodiment of the present invention.

本実施例は、3台の相手装置!21+ 、212゜21
3のそれぞれに接続されている出力回線227.222
.223および入力回線231232.233と、これ
ら3組の回線に対応して設けられた信号処理回路11,
12.13と、信号処理回路11.12.13の出力1
21.22゜23に出力された信号を出力回線221,
222 。
In this example, there are three partner devices! 21+, 212°21
Output line 227.222 connected to each of 3
.. 223 and input lines 231, 232, 233, and the signal processing circuit 11 provided corresponding to these three sets of lines.
12.13 and the output 1 of the signal processing circuit 11.12.13
21.22゜The signal outputted to 23 is sent to the output line 221,
222.

223に送出するドライバ4+ 、42.43と、入力
回線231  232.233から入力してくる信号を
信号処理回路1+ 、12.13の入力線3+ 、32
.33に出力するレシーバ5+ 、52 。
The signals input from the drivers 4+ and 42.43 and the input lines 231 and 232.233 are sent to the signal processing circuit 1+ and the input lines 3+ and 32 of 12.13.
.. 33, the receivers 5+, 52.

53と、インタフェース制御回路6と、マンマシンイン
タフェース8110が接続された上位制御装置7と、着
脱可能である試験用回路8と、コネクタ9とから構成さ
れている。インタフェース制御回路6は、信号処理回路
1+ 、12.13と上位制御1装置7との間で制@情
報と送受信データの中継制御を行い、さらに被試験信号
処理回路の番号を含む試験コマンドを上位制御装置7よ
り受取ると、その番号の信号処理回路1+ 、12.1
3および試験用信号処理回路11と上位制御装置7との
間で制御情報と送受信データの中継制御を行う。試験用
回路8は、出力線12と入力線13とを有する試験用信
号処理回路11と、ロータリスイッチ16.17と、出
力線12に出力された信号をロータリスイッチ16の共
通端子に送出するドライバ14と、ロータリスイッチ1
7の共通端子から入力する信号を入力I!13に出力す
るレシーバ15とから構成されている。コネクタ9は、
試験用回路8を本体に装着する際、出力回線22+ 、
222.223とロータリスイッチ17のそれぞれの接
点を接続し、入力回線231232.233とロータリ
スイッチ16のそれぞれの接点を接続し、インタフェー
ス制御回路6と試験用信号処理回路11とを接続する。
53, an interface control circuit 6, a host control device 7 to which a man-machine interface 8110 is connected, a removable test circuit 8, and a connector 9. The interface control circuit 6 performs relay control of control information and transmission/reception data between the signal processing circuits 1+, 12.13 and the higher-level control 1 device 7, and also transmits test commands including the number of the signal processing circuit under test to the higher-level controller. When received from the control device 7, the signal processing circuit 1+, 12.1 of that number
3 and performs relay control of control information and transmission/reception data between the test signal processing circuit 11 and the host control device 7. The test circuit 8 includes a test signal processing circuit 11 having an output line 12 and an input line 13, rotary switches 16 and 17, and a driver that sends the signal output to the output line 12 to a common terminal of the rotary switch 16. 14 and rotary switch 1
Input the signal input from the common terminal of 7 I! 13, and a receiver 15 for outputting to the receiver 13. The connector 9 is
When installing the test circuit 8 to the main body, the output line 22+,
222, 223 and the respective contacts of the rotary switch 17 are connected, input lines 231,232, 233 and the respective contacts of the rotary switch 16 are connected, and the interface control circuit 6 and the test signal processing circuit 11 are connected.

次に、本実施例の動作について説明する。Next, the operation of this embodiment will be explained.

(1)障害が発生していないとき 障害が発生していないときには、試験用回路8は取りは
ずされている。信号処理回路11,12゜13は、上位
制御装N7からインタフェース制御回路6を経て送られ
てくるtiI1111I情報に従って動作し、相手装置
211,212.213が入力回線231 232.2
33に送出し、レシーバ5152.53を経て入力線3
1.32.33から入力する信号を処理し、必要なデー
タをインタフェース制御回路6を経由して上位制御装置
7とやりとりする。そして出力線21,22.23に信
号を出力し、出力された信号は、ドライバ4142.4
3によって出力回線22+ 、222 。
(1) When no failure occurs When no failure occurs, the test circuit 8 is removed. The signal processing circuits 11, 12 and 13 operate according to the tiI1111I information sent from the host control device N7 via the interface control circuit 6, and the partner devices 211, 212.213 operate on the input lines 231, 232.2.
33, and input line 3 via receiver 5152.53.
It processes signals input from 1.32.33 and exchanges necessary data with the upper control device 7 via the interface control circuit 6. Then, a signal is output to the output lines 21, 22.23, and the output signal is transmitted to the driver 4142.4.
3 by the output lines 22+, 222.

223に送出されて、相手装置21+ 、212 。223, and the other party devices 21+, 212.

213によって受信される。213.

(2)障害発生時 信号処理回路L+ 、12.13のいずれかで通信異常
などの障害が発生して検出されると、インタエース制御
回路6を経て、上位制御装置7にその旨通知される。例
えば、信号処理回路1+において障害が発生して検出さ
れると、上位IIIIIll装置7は、マンマシンイン
タフェース装置10に、信号処理回路11で障害発生を
知らせるメツセージをタイプアウトさせる。保守者はこ
のメツセージを確認すると、コネクタ9によって出力回
線221.222.223とロータリスイッチ17のそ
れぞれの接点を接続し、入力回線231232.233
とロータリスイッチ16のそれぞれの接点を接続して試
験用回路8を本信号処即装冒に装着し、ロータリスイッ
チ16.17によって、それぞれ入力口123+ 、出
力回線221を選択する。ロータリスイッチ16.17
でそれぞれ入力口123+ 、出力回線221を選択し
たので、信号処理回路11.出力12+、ドライバ41
、出力回線221.0−タリスイツチ17゜レシーバ1
5.入力線13.試験用信号処理回路11というルート
と、試験用信号処理回路11゜出力線12.ドライバ1
4.ロータリスイッチ16、入力回線231.レシーバ
51.入力線31、信号処理回路11というルートが生
成し、信号処理回路11と試験用信号処理回路11との
間に対向ルートが設定されたことになる。次に、保守者
はマンマシンインタフェース装置10から上位IIJi
装置7に対して信号処理回路11の試験を行うためのコ
マンドを投入する。上位制御l装置7がこのコマンドを
受取りインタフェース制御回路6に信号処理回路11の
回路番号を含む試験コマンドを送ると、インタフェース
11回路6は信号処理回路11と試験用信号処理回路1
1と上位制御装置7との間で制御情報と送受信データの
中継11HDを行い、前記の対向ルートで実際に信号が
送受信されて信号処理回路11と試験用信号処理回路1
10間での通信試験が行なわれる。上位制御装N7はこ
の通信試験の結果をマンマシンインタフェース装置10
にタイプアウトさせる。保守者は、タイプアウトされた
試験結果を見て、試験結果が良好であれば相手装@21
1に起因する障害と判断して試験用回路8を取りはずし
て試験を終了する。一方、保守者は、試験結果が不良で
あれば信号処理回路11の故障と判断して信号処理回路
11を交換し、再度信号処理回路11の試験を行なうた
めのコマンドを投入して前記の通信試験を行ない、マン
マシンインタフェースH8t1゜からタイプアウトされ
る試験結果によって障害が修復されたかどうかのWL認
を行なう。保守者は障害の修復を確認したら試験用回路
8を取りはずし試験を終了する。
(2) When a failure occurs: If a failure such as a communication abnormality occurs and is detected in any of the signal processing circuits L+ and 12.13, the host control device 7 is notified of this via the interface control circuit 6. . For example, when a fault occurs and is detected in the signal processing circuit 1+, the higher-level device 7 causes the man-machine interface device 10 to type out a message informing the signal processing circuit 11 of the fault occurrence. After confirming this message, the maintenance person connects the output line 221.222.223 and each contact of the rotary switch 17 using the connector 9, and connects the input line 231,232.233.
The test circuit 8 is attached to the present signal processing equipment by connecting the contacts of the rotary switch 16 and the rotary switch 16, and the input port 123+ and the output line 221 are respectively selected by the rotary switches 16 and 17. Rotary switch 16.17
Since input port 123+ and output line 221 were selected respectively in signal processing circuit 11. Output 12+, driver 41
, output line 221.0 - tally switch 17° receiver 1
5. Input line 13. The test signal processing circuit 11 route and the test signal processing circuit 11° output line 12. Driver 1
4. Rotary switch 16, input line 231. Receiver 51. A route including the input line 31 and the signal processing circuit 11 is generated, and an opposing route is set between the signal processing circuit 11 and the test signal processing circuit 11. Next, the maintenance person accesses the upper IIJi from the man-machine interface device 10.
A command for testing the signal processing circuit 11 is input to the device 7. When the host control device 7 receives this command and sends a test command including the circuit number of the signal processing circuit 11 to the interface control circuit 6, the interface 11 circuit 6 tests the signal processing circuit 11 and the test signal processing circuit 1.
A relay 11HD of control information and transmission/reception data is performed between the signal processing circuit 11 and the higher-level control device 7, and signals are actually transmitted and received through the above-mentioned opposing route, and the signal processing circuit 11 and the test signal processing circuit 1
A communication test will be conducted between 10 people. The host control device N7 sends the results of this communication test to the man-machine interface device 10.
Type it out. The maintenance person looks at the typed-out test results, and if the test results are good, sends the other device @21
It is determined that the failure is caused by 1, and the test circuit 8 is removed to complete the test. On the other hand, if the test result is bad, the maintenance person determines that the signal processing circuit 11 is malfunctioning, replaces the signal processing circuit 11, and inputs a command to test the signal processing circuit 11 again. A test is performed, and WL verification is performed to determine whether the fault has been repaired based on the test results typed out from the man-machine interface H8t1°. After confirming that the fault has been repaired, the maintenance person removes the test circuit 8 and finishes the test.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、試験用信号処理回路とロ
ータリスイッチとからなる信号処理回路に対し着脱可能
な試験用回路を設け、障害発生時4 に試験用回路を信号処理装置に装着して、障害を検出し
た信号処理回路と試験用信号処理回路との間で通信試験
を行うことにより、障害の原因が信号処理回路にあるの
か相手側装置にあるのかの判断が容易にでき、また、信
号処理回路の交換後の修復確認を相手装置との通信を行
うことなくできるという効果があり、試験用回路は着脱
可能なので、複数の信号処理装置の本体に対し一つの試
験用回路を用意すればよく、コストが下がるという効果
もある。
As explained above, the present invention provides a removable test circuit for a signal processing circuit consisting of a test signal processing circuit and a rotary switch, and attaches the test circuit to the signal processing device when a fault occurs. By conducting a communication test between the signal processing circuit in which the fault has been detected and the test signal processing circuit, it is possible to easily determine whether the cause of the fault is in the signal processing circuit or in the other party's device. This has the effect of being able to confirm the repair after replacing the signal processing circuit without communicating with the other device, and since the test circuit is removable, one test circuit can be prepared for multiple signal processing devices. It also has the effect of reducing costs.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の信号処理装置の構成を示す
ブロック図である。 1+ 、12.13・・・信号処理回路、21.22.
23・・・出力線、 31.32.33・・・入力線、 41.42.43・・・ドライバ、 51.52.53・・・レシーバ、 6・・・インタフェース制御回路、 7・・・上位制御1装置、 8・・・試験用回路、 9・・・]ネクタ、 10・・・マンマシンインタフェース装置、11・・・
試験用信号処理回路、 12・・・出力線、 13・・・入力線、 14・・・ドライバ、 15・・・レシーバ、 16.17・・−ロータリスイッチ、 21+ 、212.213・・・相手装置、22童、2
22.223・・・出力回線、231  232.23
3・・・入力回線。
FIG. 1 is a block diagram showing the configuration of a signal processing device according to an embodiment of the present invention. 1+, 12.13... signal processing circuit, 21.22.
23... Output line, 31.32.33... Input line, 41.42.43... Driver, 51.52.53... Receiver, 6... Interface control circuit, 7... Upper control 1 device, 8...Test circuit, 9...] connector, 10...Man-machine interface device, 11...
Test signal processing circuit, 12... Output line, 13... Input line, 14... Driver, 15... Receiver, 16.17...-rotary switch, 21+, 212.213... Partner Equipment, 22 children, 2
22.223...Output line, 231 232.23
3...Input line.

Claims (1)

【特許請求の範囲】 1、複数の回線のそれぞれに対応して設けられ当該回線
に接続される出力線と入力線とを有する信号処理回路と
、これら信号処理回路と上位制御装置の間で制御情報と
送受信データの中継制御を行うインタフェース制御回路
を有する信号処理装置において、 出力線と入力線とを有する試験用信号処理回路と、該試
験用信号処理回路の出力線が共通端子に接続された第1
のロータリスイッチと、該試験用信号処理回路の入力線
が共通端子に接続された第2のロータリスイッチとを有
し、前記信号処理装置に着脱可能である試験用回路と、 各信号処理回路の入力線と第1のロータリスイッチのそ
れぞれの接点を接続し、各信号処理回路の出力線と第2
のロータリスイッチのそれぞれの接点を接続し、該試験
用信号処理回路と該インタフェース制御回路とを接続す
るコネクタとを有し、前記インタフェース制御回路は、
被試験信号処理回路の番号を含む試験コマンドを上位制
御装置より受取ると、該番号の信号処理回路および該試
験用信号処理回路と上位制御装置との間で制御情報と送
受信データの中継制御を行うことを特徴とする信号処理
装置。
[Claims] 1. A signal processing circuit provided corresponding to each of a plurality of lines and having an output line and an input line connected to the line, and control between these signal processing circuits and a host control device. In a signal processing device having an interface control circuit that performs relay control of information and transmitted/received data, a test signal processing circuit having an output line and an input line, and an output line of the test signal processing circuit connected to a common terminal. 1st
and a second rotary switch to which the input line of the test signal processing circuit is connected to a common terminal, the test circuit being removable from the signal processing device; Connect the input line and each contact of the first rotary switch, and connect the output line of each signal processing circuit to the contact of the second rotary switch.
a connector that connects each contact of the rotary switch and connects the test signal processing circuit and the interface control circuit, the interface control circuit comprising:
When a test command including the number of the signal processing circuit under test is received from the higher-level control device, relay control of control information and transmission/reception data is performed between the signal processing circuit with that number, the test signal processing circuit, and the higher-level control device. A signal processing device characterized by:
JP2078149A 1990-03-27 1990-03-27 Signal processing unit Pending JPH03277041A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2078149A JPH03277041A (en) 1990-03-27 1990-03-27 Signal processing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2078149A JPH03277041A (en) 1990-03-27 1990-03-27 Signal processing unit

Publications (1)

Publication Number Publication Date
JPH03277041A true JPH03277041A (en) 1991-12-09

Family

ID=13653850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2078149A Pending JPH03277041A (en) 1990-03-27 1990-03-27 Signal processing unit

Country Status (1)

Country Link
JP (1) JPH03277041A (en)

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