JPH03273658A - Film carrier tape for assembling semiconductor - Google Patents
Film carrier tape for assembling semiconductorInfo
- Publication number
- JPH03273658A JPH03273658A JP2023852A JP2385290A JPH03273658A JP H03273658 A JPH03273658 A JP H03273658A JP 2023852 A JP2023852 A JP 2023852A JP 2385290 A JP2385290 A JP 2385290A JP H03273658 A JPH03273658 A JP H03273658A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- semiconductor element
- device hole
- semiconductor
- carrier tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 62
- 239000011347 resin Substances 0.000 claims abstract description 32
- 229920005989 resin Polymers 0.000 claims abstract description 32
- 238000013508 migration Methods 0.000 abstract description 5
- 230000005012 migration Effects 0.000 abstract description 5
- 238000007747 plating Methods 0.000 abstract description 3
- 238000004544 sputter deposition Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 230000015556 catabolic process Effects 0.000 abstract 1
- 230000008020 evaporation Effects 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 238000007789 sealing Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 7
- 238000005260 corrosion Methods 0.000 description 4
- 230000007797 corrosion Effects 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 239000000956 alloy Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- -1 polyethylene Polymers 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 239000004734 Polyphenylene sulfide Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000008602 contraction Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 229920000106 Liquid crystal polymer Polymers 0.000 description 1
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 1
- 239000004696 Poly ether ether ketone Substances 0.000 description 1
- 239000004695 Polyether sulfone Substances 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- 238000002679 ablation Methods 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000004760 aramid Substances 0.000 description 1
- 229920003235 aromatic polyamide Polymers 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229920002492 poly(sulfone) Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920006393 polyether sulfone Polymers 0.000 description 1
- 229920002530 polyetherether ketone Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は半導体組立用フィルムキャリヤテープに関し、
さらに詳しくは、半導体素子を樹脂て封止することによ
り生じる問題点を解決した半導体組立用フィルムキャリ
ヤテープに関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a film carrier tape for semiconductor assembly;
More specifically, the present invention relates to a film carrier tape for semiconductor assembly that solves problems caused by sealing semiconductor elements with resin.
［従来の技術および発明か解決すべき課１ｉ１近年、電
子機器は高機能化・軽薄短小化が進められ、それに搭載
される半導体も高集積化が求められ、そのパッケージに
も小型化、薄型化が要求されている。[Conventional technology and inventions or issues to be solved 1i1 In recent years, electronic devices have become more sophisticated, lighter, thinner and smaller, and the semiconductors installed in them are also required to be highly integrated, and their packages are also becoming smaller and thinner. is required.
このような要求に応えるべく、フィルムキャリヤテープ
を用いたＴ Ａ Ｂ （Ｔａｐｅ Ａｕｔｏｍａｔｅｄ
Ｂｏｎｄｉｎｇ ）方式によるパッケージが登場した。In order to meet these demands, we developed TAB (Tape Automated) using film carrier tape.
A package using the bonding method has appeared.
このＴＡＢ方式とは、第３図に示すように、絶縁性フィ
ルム１と接着剤Ｎ５と導電Ｎ２とからなるフィルムキャ
リヤテープ（なお、キャリヤフィルムは導電層２そのも
ので、あるいは導電Ｍ２と絶縁性フィルムｌとで形成さ
れる場合もある）を用いて、導電層２の配線リードに半
導体素子４の配線バッドをハング６等を介して装着する
方式のことで、半導体素子４の表面は樹脂３で封止する
ことによって、パッケージが得られる。このパッケージ
は実装工程に供される。This TAB method is a film carrier tape consisting of an insulating film 1, an adhesive N5, and a conductive layer N2 (the carrier film may be the conductive layer 2 itself, or the conductive layer 2 and the insulating film), as shown in Figure 3. This is a method in which the wiring pad of the semiconductor element 4 is attached to the wiring lead of the conductive layer 2 via a hang 6 etc. using a resin 3. A package is obtained by sealing. This package is subjected to a mounting process.
ＴＡＢ方式では、従来のボンディングワイヤに相当する
リードの部分が、導電層のエツチングや導電性金属の蒸
着・鍍金・スパッタリング等の手段により形威されるの
で、配線パターンの高密度化やパッケージの小型化、薄
型化が可能になる。In the TAB method, the lead portion, which corresponds to the conventional bonding wire, is shaped by means such as etching the conductive layer, vapor deposition, plating, or sputtering of a conductive metal, which allows for higher density wiring patterns and smaller packages. It becomes possible to make the product thinner and thinner.
しかしながら、このＴＡＢ方式によるパッケージも、従
来のＤ Ｉ Ｐ （Ｄｕａｌ １ｎ−Ｌｉｎｅ Ｐａｃ
ｋａｇｅ）やＱ Ｆ Ｐ （Ｑｕａｄ Ｆｌａｔ Ｐａ
ｃｋａｇｅ）に代表されるパッケージと同様に、樹脂封
止に起因する種々の問題を抱えている。However, this TAB method package is also different from the conventional DIP (Dual 1n-Line Pack).
kage) and Q F P (Quad Flat Pa
Similar to packages such as ckage), there are various problems caused by resin sealing.
すなわち、封止時の樹脂の流れによる応力や、硬化時の
樹脂の収縮による応力、あるいはテストや実装後の熱履
歴による素材間の熱膨張係数の差Ｃより発生する応力等
に起因する、半導体素子の配線およびリードの変形や断
線あるいはストレスマイグレーション、封止用樹脂中の
不純物と吸湿された水分とに起因する配線腐食やエレク
トロマイグレーション等である。In other words, semiconductor These include deformation, disconnection, or stress migration of the wiring and leads of the element, and wiring corrosion and electromigration caused by impurities in the sealing resin and absorbed moisture.
本発明は上記事情を改善するためになされたものである
。The present invention has been made to improve the above situation.
すなわち、本発明の目的は、上記ＴＡＢ方式において樹
脂封止に起因する諸問題を解決した半導体組立用フィル
ムキャリヤテープを提供することにある。That is, an object of the present invention is to provide a film carrier tape for semiconductor assembly that solves various problems caused by resin sealing in the TAB method.
［課題を解決するための手段］
前記目的を達成するための本発明の第一の態様は、半導
体素子の素子形成面と絶縁性フィルムとの間に空隙を設
けて前記半導体素子を絶縁性フィルム上に配置してなる
ことを特徴とする半導体組立用フィルムキャリヤテープ
であり、
本発明の第二の態様は、デバイスホールを有する導電層
を、デバイスホールか覆われる状態で、絶縁性フィルム
上に形威し、このデバイスホール中に露出する絶縁フィ
ルムに対して空隙を有する状態て、しかも前記デバイス
ホールに素子形成面を臨ませて半導体素子を設け、この
半導体素子を樹脂て封止してなることを特徴とする半導
体組立用フィルムキャリヤテープてあり、
前記第二の発明においては、前記絶縁性フィルムか、そ
のデバイスホールを覆う部分の厚みが、絶縁性フィルム
の他の部分の厚みよりも小さく形成されるのが好ましい
。[Means for Solving the Problems] A first aspect of the present invention for achieving the above object is to provide a gap between the element forming surface of the semiconductor element and the insulating film, and to cover the semiconductor element with the insulating film. A second aspect of the present invention is a film carrier tape for semiconductor assembly, characterized in that a conductive layer having a device hole is placed on an insulating film with the device hole covered. A semiconductor element is provided in such a manner that there is a void in the insulating film exposed in the device hole, and the element forming surface faces the device hole, and the semiconductor element is sealed with a resin. There is a film carrier tape for semiconductor assembly, characterized in that, in the second invention, the thickness of the insulating film or a portion thereof covering the device hole is smaller than the thickness of the other portion of the insulating film. Preferably, it is formed.
［作用］
前記構成によると、半導体素子形成面が絶縁性フィルム
に対して空隙を有するように半導体素子が絶縁性フィル
ムに設置されるので、絶縁性フィルム上の半導体素子を
樹脂で封止しても、半導体の素子形成面には封止用樹脂
が接することかない、従って、樹脂封止時の樹脂の流れ
による応力や、樹脂硬化時の樹脂の収縮による応力、あ
るいはテストや実装後の熱履歴による半導体素子形成面
と他の素材との熱膨張係数の差に基づき発生する応力に
起因する、半導体素子の配線やリードの変形または断線
、あるいはストレスマイグレ−ションか生じない。[Function] According to the above configuration, the semiconductor element is installed on the insulating film so that the semiconductor element forming surface has a gap with respect to the insulating film, so the semiconductor element on the insulating film is sealed with resin. However, the encapsulating resin does not come into contact with the semiconductor element formation surface, so there is stress due to the flow of the resin during resin encapsulation, stress due to resin contraction during resin curing, or thermal history after testing and mounting. There will be no deformation or disconnection of the wiring or leads of the semiconductor element, or stress migration due to stress generated due to the difference in thermal expansion coefficient between the semiconductor element forming surface and other materials.
さらには、封止樹脂中の不純物と吸湿された水分とに起
因する配線腐食やエレクトロマイグレーションも発生し
ない。Furthermore, wiring corrosion and electromigration caused by impurities in the sealing resin and absorbed moisture do not occur.
［実施例］ 以下、本発明を図面に基いて詳細に説明する。[Example] Hereinafter, the present invention will be explained in detail based on the drawings.
たたし、各図面に共通する符合はそれぞれ同じ名称を有
する。However, symbols common to each drawing have the same name.
第１図は本発明の一実施態様である半導体組立用フィル
ムキャリヤテープを示す断面図である。FIG. 1 is a sectional view showing a film carrier tape for semiconductor assembly, which is an embodiment of the present invention.
第１図に示すように、半導体組立用フィルムキャリヤテ
ープは、絶縁性フィルムｌの表面にデバイスホール９を
有する導電層２を形成し、このデバイスホール９におい
て露出する絶縁性フィルムｌの表面に半導体素子４の素
子形成面か臨むように、導電層２の上に設けたバンブ６
を介して半導体素子４を絶縁性フィルムに装着し、前記
半導体素子４の前記素子形成面以外を樹脂３で封止して
なる。As shown in FIG. 1, the film carrier tape for semiconductor assembly includes a conductive layer 2 having a device hole 9 formed on the surface of an insulating film 1, and a conductive layer 2 having a device hole 9 on the surface of the insulating film 1 exposed in the device hole 9. A bump 6 is provided on the conductive layer 2 so as to face the element forming surface of the element 4.
The semiconductor element 4 is attached to an insulating film through the insulating film, and the semiconductor element 4 other than the element forming surface is sealed with a resin 3.
ここで、絶縁性フィルム１の材料として、たとえばポリ
エチレン、ポリプロピレン、ポリスチレン、ポリカーボ
ネート、ポリエチレンテレフタレート、ポリエーテルエ
ーテルケトン、ポリエーテルスルホン、ポリフェニレン
サルファイド、ポリサルフォン、ポリイミドポリパラバ
ン酸樹脂、アラミド樹脂、ガラスエポキシ複合材などが
挙げられる。Here, as the material of the insulating film 1, for example, polyethylene, polypropylene, polystyrene, polycarbonate, polyethylene terephthalate, polyether ether ketone, polyether sulfone, polyphenylene sulfide, polysulfone, polyimide polyparabanic acid resin, aramid resin, glass epoxy composite Examples include materials.
導電層２の材料としては、たとえばＣｕ、Ｃｕを主成分
とする合金、Ａｊｌ、Ａｇ、Ａｕ及び４２アロイ等の鉄
系合金などが挙げられる。Examples of the material for the conductive layer 2 include Cu, an alloy containing Cu as a main component, and iron-based alloys such as Ajl, Ag, Au, and 42 alloy.
樹脂３としては、エポキシ樹脂、シリコーン樹脂、ポリ
フェニレンサルファイド及び液晶ポリマーなどが挙げら
れる。Examples of the resin 3 include epoxy resin, silicone resin, polyphenylene sulfide, and liquid crystal polymer.
なお、上に挙げた各種の材料および樹脂は一例を示した
にすぎず、本発明では半導体の製造分野で公知のものが
使用可能である。Note that the various materials and resins listed above are merely examples, and those known in the field of semiconductor manufacturing can be used in the present invention.
前記半導体組立用フィルムキャリヤテープは。The film carrier tape for semiconductor assembly is as follows.
例えば、次のようにして製造することができる。For example, it can be manufactured as follows.
絶縁性フィルム１の表面にデバイスホール形成用マスク
（図示せず、）を配置してから、絶縁フィルム１の表面
に蒸着、メツキ、スパッタリング等により導電Ｎ２を形
成し、その後に前記デバイスホール形成用マスクを除去
すると、デバイスホール９を有する導電層２を形成した
絶縁性フィルム１が形成される。なお、このデバイスホ
ール９は、絶縁性フィルム１の一方の表面全面に導電層
２を形成してから、トリミング等により形成することも
できる。デバイスホール９の形成後、デバイスホール９
に露出する絶縁性フィルム１に臨むように半導体素子４
の素子形成面が相対するように、しかも半導体素子４と
露出する絶縁性フィルムｌとの間に空隙を存在させて、
半導体素子４を配置する。そして、半導体素子４を樹脂
３で封止することにより、半導体組立用フィルムキャリ
ヤテープが製造される。After placing a device hole forming mask (not shown) on the surface of the insulating film 1, conductive N2 is formed on the surface of the insulating film 1 by vapor deposition, plating, sputtering, etc., and then the device hole forming mask is formed on the surface of the insulating film 1. When the mask is removed, an insulating film 1 having a conductive layer 2 having device holes 9 is formed. Note that this device hole 9 can also be formed by forming the conductive layer 2 on the entire surface of one side of the insulating film 1 and then trimming or the like. After forming the device hole 9, the device hole 9
Semiconductor element 4 is placed so as to face insulating film 1 exposed to
so that the element forming surfaces of the semiconductor element 4 and the exposed insulating film l face each other, and a gap is created between the semiconductor element 4 and the exposed insulating film l.
A semiconductor element 4 is placed. Then, by sealing the semiconductor element 4 with the resin 3, a film carrier tape for semiconductor assembly is manufactured.
本発明は前記実施態様に限定されない、たとえば、半導
体素子４を装着する際の熱伝導性をよくするためには、
第２図に示すごとく、絶縁性フィルム１におけるデバイ
スホール９を閉鎖する部分の厚みを、その他の絶縁性フ
ィルムｌの厚みよりも小さくすることが好ましい。The present invention is not limited to the embodiments described above. For example, in order to improve thermal conductivity when mounting the semiconductor element 4,
As shown in FIG. 2, it is preferable that the thickness of the portion of the insulating film 1 that closes the device hole 9 be smaller than the thickness of the other insulating film l.
このように絶縁性フィルムｌの厚みを小さくするには、
たとえば機械加工による切削法、レーザ加工によるアブ
レーション、化学エツチング等の方法を用いればよい。In order to reduce the thickness of the insulating film l in this way,
For example, a method such as a cutting method using mechanical processing, ablation using laser processing, or chemical etching may be used.
本発明の一実施例である半導体組立用パッケージは以上
の構造を有し、樹脂が半導体素子における素子形成面に
接触することがないので、樹脂の流れによる応力や、硬
化時の樹脂の収縮による応力、あるいはテストや実装後
の熱履歴による、素材間の熱膨張係数の差により発生す
る応力に起因する、半導体素子の配線やリードの変形ま
たは断線、あるいはストレスマイグレーションが生じな
い。The semiconductor assembly package, which is an embodiment of the present invention, has the above structure, and since the resin does not come into contact with the element forming surface of the semiconductor element, stress due to the flow of the resin or shrinkage of the resin during curing can be avoided. Deformation or disconnection of semiconductor device wiring or leads, or stress migration due to stress or stress caused by differences in thermal expansion coefficients between materials due to thermal history after testing or mounting will not occur.
さらには、封止用樹脂中の不純物と吸湿された水分に起
因する配線の腐食やエレクトロマイグレーションも生じ
離い。Furthermore, corrosion and electromigration of the wiring occur due to impurities in the sealing resin and absorbed moisture.
［発明の効果］
本発明の半導体組立用フルムキャリヤテープによると、
封止用樹脂が半導体素子の素子形成面に接触することが
ないので、樹脂封止時の樹脂の流れによる応力や、樹脂
硬化時の樹脂の収縮による応力、あるいはテストや実装
後の熱履歴による半導体素子形成面と他の素材との熱膨
張係数の差に基づき発生する応力に起因する、半導体素
子の配線やリードの変形または断線、あるいはストレス
マイグレーションが生じない。[Effects of the Invention] According to the flume carrier tape for semiconductor assembly of the present invention,
Since the encapsulating resin does not come into contact with the element formation surface of the semiconductor element, there is no stress due to the flow of the resin during resin encapsulation, stress due to resin contraction during resin curing, or thermal history after testing or mounting. Deformation or disconnection of the wiring or leads of the semiconductor element, or stress migration due to stress generated due to the difference in thermal expansion coefficient between the semiconductor element forming surface and other materials does not occur.
さ′らには、封止用樹脂中の不純物と吸湿された水分と
に起因する配線の腐食やエレクトロマイグレーションも
生じない。Furthermore, corrosion and electromigration of wiring caused by impurities in the sealing resin and absorbed moisture do not occur.
したがって、本発明の半導体組立用フィルムキャリヤテ
ープを使用すると、半導体組立時の歩留まりが向上し、
実装後の半導体素子、ひいては該素子を搭載した電子機
器の信頼性を高め、さらにはその寿命を伸ばすことがで
きる。Therefore, when the film carrier tape for semiconductor assembly of the present invention is used, the yield during semiconductor assembly is improved,
It is possible to improve the reliability of a semiconductor element after mounting, and ultimately of an electronic device equipped with the element, and further extend its life.
第１図は本発明の一実施例である半導体組立用フィルム
キャリヤテープを示す縦断面図、第２図は本発明の他の
実施例である半導体組立用フィルムキャリヤテープの縦
断面図、第３図は従来の半導体組立用フィルムキャリヤ
テープの一例を示す縦断面図である。
ｌ・・・絶縁性フィルム、２・・・導電層、３・・・封
止用の樹脂、４・・・半導体素子。FIG. 1 is a longitudinal cross-sectional view showing a film carrier tape for semiconductor assembly which is an embodiment of the present invention, FIG. 2 is a longitudinal cross-sectional view of a film carrier tape for semiconductor assembly which is another embodiment of the present invention, and FIG. The figure is a longitudinal sectional view showing an example of a conventional film carrier tape for semiconductor assembly. 1... Insulating film, 2... Conductive layer, 3... Resin for sealing, 4... Semiconductor element.
Claims (3)
に空隙を設けて前記半導体素子を絶縁性フィルム上に配
置してなることを特徴とする半導体組立用フィルムキャ
リヤテープ。(1) A film carrier tape for semiconductor assembly, characterized in that the semiconductor element is placed on the insulating film with a gap provided between the element forming surface of the semiconductor element and the insulating film.
ルが覆われる状態で、絶縁性フィルム上に形成し、この
デバイスホール中に露出する絶縁フィルムに対して空隙
を有する状態で、しかも前記デバイスホールに素子形成
面を臨ませて半導体素子を配置し、この半導体素子を樹
脂で封止してなることを特徴とする半導体組立用フィル
ムキャリヤテープ。(2) A conductive layer having a device hole is formed on an insulating film in a state where the device hole is covered, and a conductive layer is formed on an insulating film with a gap between the insulating film exposed in the device hole and in the device hole. A film carrier tape for semiconductor assembly, characterized in that a semiconductor element is arranged with the element forming surface facing, and the semiconductor element is sealed with a resin.
う部分の厚みが、絶縁性フィルムの他の部分の厚みより
も小さくして形成されてなる前記請求項２に記載の半導
体組立用フィルムキャリヤテープ。(3) The film carrier tape for semiconductor assembly according to claim 2, wherein the insulating film is formed so that the thickness of the portion covering the device hole is smaller than the thickness of the other portion of the insulating film. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2023852A JPH03273658A (en) | 1990-02-02 | 1990-02-02 | Film carrier tape for assembling semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2023852A JPH03273658A (en) | 1990-02-02 | 1990-02-02 | Film carrier tape for assembling semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03273658A true JPH03273658A (en) | 1991-12-04 |
Family
ID=12121957
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023852A Pending JPH03273658A (en) | 1990-02-02 | 1990-02-02 | Film carrier tape for assembling semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03273658A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05121492A (en) * | 1991-10-25 | 1993-05-18 | Nec Corp | Tab tape |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01133729A (en) * | 1987-11-19 | 1989-05-25 | Nitto Denko Corp | Conductive laminated film |
-
1990
- 1990-02-02 JP JP2023852A patent/JPH03273658A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01133729A (en) * | 1987-11-19 | 1989-05-25 | Nitto Denko Corp | Conductive laminated film |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05121492A (en) * | 1991-10-25 | 1993-05-18 | Nec Corp | Tab tape |
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