JPH03273423A - Disk driving device - Google Patents

Abstract

PURPOSE:To read data at a transfer rate corresponding to the capacity and the state of a host system by raising or reducing the rotational speed of a motor so that a data quantity may keep a limited range while the data are read. CONSTITUTION:The number of rotation control of a spindle motor 61 after an access action is finished is executed by a data quantity discriminating circuit 78 so that a data quantity in a buffer memory 72 may be kept within a limited range. It is satisfied with deciding the capacity of the buffer memory and the limited range of the data quantity with judging the capacity of a microprocessor 76, the performance of a motor driving circuit 75, the data receiving capacity of a personal computer 74 possible to be connected and so on. Thus, the data is read at a transfer rate corresponding to the capacity and the state of the host system.

Description

[Detailed Description of the Invention] Industrial Application Field The present invention reads data from a disk-shaped recording medium such as a compact disk read-only memory (hereinafter abbreviated as CD-ROM) or a magneto-optical disk. The present invention relates to a disk drive device.

2. Description of the Related Art As an example of the above-mentioned disk drive device, the CD-ROM
A conventional example of a drive device will be described with reference to the drawings.

A compact disc (hereinafter abbreviated as CD) is a recording medium that records two channels of audio converted into digital data with a sampling frequency of 44.1 kHz and a quantization bit number of 16. A CD-ROM records general digital data such as character data, image data, and computer programs instead of this audio data, and is basically the same as a CD except for the recorded contents. In order to record these data, the CD-ROM's audio data storage area is structured into blocks of 150 kbYte.
/see (for example, "Electronics" February 1985 issue, pages 73-80).

First, let's look at the third part about the data format of CD-ROM.
This will be explained using figures.

Figure 3 shows the format of data recorded on a CD-ROM, where (a) is a schematic diagram of a data frame, which is the minimum unit of recording, (b) is a schematic diagram of a subcode frame, and (C) is a schematic diagram of a subcode frame. A schematic diagram of the data format of the Q channel in the program area; (d) is a schematic diagram of the data format of the sector in CD-ROM mode 1;

On a CD-ROM, from the inner circumference of the disc to the outer circumference,
There are a lead-in area, a program area, and a lead-out area indicating the end of the disc, and it is the program area where actual data is recorded.

One data frame includes subchannel 2 and main channel 1, and is recorded on a CD-ROM in a time-division manner.

Subchannel 2 has a 1-byte data recording area.
Main channel 1 has a data recording area of 32 bytes in total, including 24 bytes for data 3 and 8 bytes for error detection and correction code 4.

The data frames are recorded on the CD-ROM at a rate of 7350 data frames/second. The error detection and correction code 4 is a code for detecting and correcting data errors in the main channel 1 data. Also, the recording rate of data 3 is 7
350×24=178°4Kb7te/see.

Before recording these data on a CD-ROM, E
FM (Eight-to-Fourteen-Modu)
lat ton) modulation, addition of a data frame synchronization signal to identify data frame boundaries, etc. As a result, one data frame is 588 bits, and the bit rate when recorded on a CD-ROM is 588 bits.
8×7350=4°3218 Mbit/sec. This data is in the form of an NRZi signal at a constant speed (approximately 1.
25on/5ec).

A subcode frame is composed of subchannels 2 of 98 consecutive data frames. The subcode frame is 1
There are 75 of them per second. This situation is shown in FIG. 3(b). Subchannel 2 for the first two data frames constitutes subcode frame synchronization 7, and data called subcodes are recorded in the remaining subchannels for 86 data frames. Each bit in one byte of the subcode corresponds to a channel, and these channels are
They are called channels, Q channel, ..., W channel.

In the Q channel 9, an address for accessing any area within the disk is recorded (Figure 3 (C)
reference). Addresses include absolute times (AMIN, AsEC, AFRAME) that start at the beginning of the program area as 0 minutes, 0 seconds, and 0 frames, and increase toward the outer periphery, and relative times (MI
N, SEC, FRAME), track number, and index, and each has a BCD code (binary code 1
It is recorded in 0-decimal notation). The frame referred to here is a unit of time, and 75 frames corresponds to one second. That is, a frame as a unit of time is equal to the time length of one subcode frame.

In a CD-ROM, data for 88 data frames corresponding to the length of one subcode frame is 98X24=2
Structuring is performed using 352 bytes as one sector. Each sector has 12 characters at its beginning to identify the sector break.
There is a byte synchronization signal, followed by a four-byte header. The first three bytes of the header are called a physical sector address, and an absolute address is recorded with the beginning of the program area being 0 minutes, 0 seconds, and 0 sectors. This absolute address is the absolute time (AMIN,
ASEC, AFRAME). The last byte of the header indicates the mode, and the recorded contents of the remaining 2336 bytes vary depending on this value. In mode 0, all remaining 2336 bytes are O. In mode 1, as shown in FIG. 3(d), 2048 bytes of user data are followed by 4 bytes of error detection layer code and 8 bytes of O data.

A 276-byte error correction code is added.

Next, the CD-ROM drive device will be explained with reference to the drawings.

FIG. 4 is a block diagram of a conventional CD-ROM drive. In FIG. 4, the spindle motor 61 is a CD-R
The analog signal read out by the pickup 62 by rotating the OM 80 is shaped into a pulse signal by the waveform shaping circuit 63. The signal processing circuit 64 performs data error detection and correction operations and outputs user data recorded in the CD-ROM 80. The interface circuit 65 sends user data sent from the signal processing circuit 64 to the personal computer 66. The motor control circuit 67 controls the rotation of the spindle motor 61 using a CLV (Constant Voltage Control Voltage).
(Ltnear Velocfty) servo.

The pickup control circuit 68 has a focus servo that focuses the reading laser beam on the CD-ROM 60, a tracking servo that makes the reading laser beam follow a recording track formed in a spiral shape on the CD-ROM 80, and a tracking servo that controls the pickup 62 on the inner and outer peripheries. Perform traverse servo to move. The clock extraction circuit 69 is the waveform shaping circuit 6
A clock is extracted from the pulse signal outputted by 3. Microprocessor 71 controls the entire CD-ROM drive device.

The operation of the conventional CD-ROM drive device configured as described above will be described below.

First, a CD-RO is transmitted from the personal computer 86 to the microprocessor 71 via the interface circuit 65.
The starting address of the sector to be read from M80 (hereinafter referred to as
Abbreviated as destination address. ) and the number of sectors to be read out, the microprocessor 71 uses the pickup control circuit 68 to move the data reading position of the pickup 62 and reproduce the sector containing the target data. Since the signal read by the pickup 62 is an analog signal, it is converted into a pulse signal by the waveform shaping circuit 63 and then sent to the signal processing circuit 64 and the clock extraction circuit 69.

The clock extraction circuit 69 has a built-in PLL circuit, and creates a lock (hereinafter this clock will be abbreviated as a reproduced clock) necessary for punching out data from the input pulse signal. The signal processing circuit 64 latches the input pulse signal with a reproduced clock, detects data frame synchronization and subcode frame synchronization, performs EFM demodulation, and transmits the signal included in the subcode Q channel θ to the microprocessor 7e. The address to be sent to the microprocessor 71 is sent to the microprocessor 71. Furthermore, within the signal processing circuit 84, an error detection and correction code 4
It performs error detection and correction using , CD-ROM synchronization detection, address detection in the header, error detection and correction of user data, etc.

The access operation performed by the microprocessor 71 is performed as follows. First, the microprocessor 71 moves the pickup 62 to an approximate position calculated from the target address and performs reproduction.

The EFM demodulation circuit (not shown) in the signal processing circuit 64 extracts the data of the Q channel 9 from the reproduced signal, and compares the current address and the target address contained therein.

If they are different, the microprocessor 71 moves the pickup 62 or performs a track jump to move the playback position. When the target address and current address become close to each other to some extent, the pickup 62 is kept in the reproducing state, and the CD-=-ROM synchronization detection circuit (not shown) and header address detection circuit (FM
(not shown) to detect the target address.

When the access operation is completed, the user data contained in the designated number of sectors starting with the sector containing the target address is sent to the personal computer 66 via the interface circuit 65.

During the series of operations described above, the clock generation circuit 70 always generates a 4.3218 MHz reference clock. This reference clock is sent to motor control circuit 67. The motor control circuit 67 controls the rotation of the spindle motor 61 so that the reproduced clock sent from the clock extraction circuit 69 and the reference clock have the same frequency. As a result, from the interface circuit 65 to the personal computer 6
The user data sent to 8 is 150 k b V t
It is sent at a transfer rate of e/sec.

In reality, since CD-ROM error detection and correction is performed sector by sector, one sector of user data is sent to the personal computer 66 every 1/75 seconds.

Problem to be Solved by the Invention However, since the data read rate from the CD-ROM 80 is constant in the above-mentioned conventional CD-ROM drive device, the personal computer 6B is always at 150 kHz.
It is necessary to receive and receive data at a transfer rate of kbYte/sec. That is, it is necessary to receive one sector worth of user data sent from the interface circuit 65 at intervals of 1/75 seconds. Therefore, in order to read data from multiple sectors when the performance of the personal computer 6θ is low and data cannot be received at 1/75 second intervals, 1
It is necessary to access the CD-ROM 80 in multiple sectors.

Even if the personal computer 66 has the ability to receive data at 1/75 second intervals, if other interrupt processing occurs and the data cannot be received, the data may be discarded or the data may be transferred from the CD-ROM 80. It was necessary to interrupt reading and re-read once the data was ready for reception.

However, even if the personal computer 66 had high performance and was capable of receiving data at a high data rate, it had the problem that it could only receive data at 1/75 second intervals.

Means for Solving the Problems In order to solve the above problems, the disk drive device of the present invention includes a reading means for reading data from the disk, a motor for rotating the disk, and a data outputting means for temporarily storing data output from the reproducing means. a storage means; a data sending means for sending the data stored in the storage means to the host system for each transfer position in accordance with a transfer request signal from the host system; and a data amount detection means for detecting the amount of data in the storage means. and a motor control means for accelerating or decelerating the rotational speed of the motor so that the amount of data is kept within a predetermined range.

Effect of the Invention According to the above-described structure of the present invention, the data read from the disk is first stored in the storage means, and the stored data is transferred to the host system in accordance with the host system request. Furthermore, when the amount of data in the storage means decreases, the motor control means accelerates the rotation of the motor, increasing the data reading speed from the disk, and when the amount of data increases, the rotation of the motor is decelerated to increase the speed at which data is continuously read from the disk. decreases, and as a result the amount of data in the storage means remains approximately constant.

Embodiment Hereinafter, a disk drive device according to an embodiment of the present invention will be described with reference to FIG. In this embodiment, a CD-ROM is used as the disk.

FIG. 1 is a block diagram of a disk drive device in one embodiment of the present invention.

In FIG. 1, the spindle motor 61 is a CD-ROM
80, the pickup 62 picks up the CD-ROM 80.
Read the signal from. The read analog signal is shaped into a pulse signal by a waveform shaping circuit 63. The signal processing circuit 64 performs data error detection and correction operations, etc.
The user data recorded in 80 is output. The pickup control circuit 68 has a focus servo that reads the CD-ROM 80 and focuses the laser beam, and a C
A tracking servo that reads and follows the four recording tracks formed in a spiral shape on the D-ROM 80 and a traverse servo that moves the pickup 62 to the inner and outer peripheries are performed. The clock extraction circuit 69 is a waveform shaping circuit 63
The clock is extracted from the pulse signal output by the The buffer memory 72 stores user data output from the signal processing circuit 64. The interface circuit 73 reads and outputs user data in the buffer memory 72 in accordance with a request from the burner computer 74.

The motor drive circuit 75 supplies a drive current to the spindle motor 61. Microprocessor 76 controls the entire CD-ROM drive unit. The data amount detection circuit 77 detects the amount of user data stored in the buffer memory 72. The data amount determination circuit 78 outputs an acceleration or deceleration command to the motor drive circuit 75 according to the data amount detected by the data amount detection circuit 77. The switch circuit 79 is used to switch whether the motor drive circuit 75 is controlled by the microprocessor 76 or the data amount determination circuit 78.

CD-ROM60. Spindle motor 61. Pickup 62. Waveform shaping circuit 63. Signal processing circuit 84
．． Pickup control circuit 68. Clock extraction circuit 6
9 is the same as the conventional example, so the explanation of the operation will be omitted.

Further, the format of the data recorded in the CD-ROM 80 is also the same as in the conventional example, so a description thereof will be omitted.

In this embodiment, the pickup 62. Waveform shaping circuit 63.
Signal processing circuit 64. Pickup control circuit 68. Clock extraction circuit 68. The microprocessor 76 corresponds to a serial output means, the interface circuit 73 corresponds to a data sending means, and the motor drive circuit 75 . Data amount determination circuit 78. The switch circuit 78 corresponds to motor control means.

The operation of the CD-ROM drive device of this embodiment configured as described above will be described below.

First, a data read command is sent from the personal computer 74 to the microprocessor 76 via the interface circuit 73. That is, the personal computer 74 determines the starting addresses of multiple sectors to be read,
That is, specify the target address and the number of sectors.

Microprocessor 76 or data amount determination circuit 78
An acceleration command and a deceleration command are sent to the motor drive circuit 75, and the motor drive circuit 75 supplies an acceleration drive current to the spindle motor 61 when the acceleration command is in the ON state, and when the deceleration command is in the ON state. Supplies drive current for deceleration. The motor drive circuit 75 has acceleration commands and deceleration commands turned off.
In this case, no drive current is supplied to the spindle motor 61, and the spindle motor 61 rotates by the inertia of the CD-ROME 30. Therefore, if the acceleration command is turned on and off at certain intervals or at a certain duty, the CD-ROM8
0 will rotate.

The switching of the switch circuit 79 is performed by the microprocessor 76.
will do. When the microprocessor 76 is performing an access operation using the pickup control circuit 68, the motor drive circuit 75 is under the control of the microprocessor 76, and after the access operation is completed, the motor drive circuit 75 is
is under the control of the data amount determination circuit 78.

When the microprocessor 76 is given the target address, it instructs the motor drive circuit 75 to accelerate so as to rotate the CD-ROM 60 at the rotation speed corresponding to the target address. For example, if the destination address is CD-
If it is located at the innermost part of ROM60, it is 500rp.
The acceleration command is turned off so that the rotation speed is about m.

Subsequently, the microprocessor 76 moves the pickup 62 in the same manner as in the conventional example, and as a result, the data reading position of the pickup 62 is moved to the recording track containing the target address. After that, the CD-RO is read until the target address reaches the reading position of the pickup 62.
Wait for M60 to rotate, and end the access operation when the target address and current address match.

During the access operation, the signal processing circuit e4 does not output data, so the buffer memory 73 is in an empty state. After the address in the header matches the target address,
User data after error detection and correction is written from the signal processing circuit 64 to the batza memory 72 in units of sectors.

When the interface circuit 73 detects that data has been written into the buffer memory 72, it switches the bus to the personal computer 74 to a data output mode. Thereafter, the data output mode is maintained until the transfer of the number of sectors requested by the personal computer 74 is completed. After the personal computer 74 completes preparations for receiving data, it detects the data output mode and outputs a transfer request signal to the interface circuit 73. When the interface circuit 73 receives the transfer request signal, it reads one sector worth of data from the buffer 1 memory 72 and sends it to the personal computer 74. From then on, the personal computer 74 outputs a transfer request signal every time it is ready to receive data, and the interface circuit 73 transfers one sector worth of data to the buffer memory 72 every time it receives a transfer request signal.
The data is read from and sent to the personal computer 74.

After the access is completed, the microprocessor 76 switches the switch circuit 79, and the motor drive circuit 75 is thereafter placed under the control of the data amount determination circuit 78. While data is being transferred to the personal computer 74, the data amount detection circuit 77 detects the amount of data in the buffer memory 72 and sequentially informs the data amount determination circuit 78 of the data amount. The data amount determination circuit 78 outputs an acceleration or deceleration command to the motor drive circuit 75 so that the data amount remains within a predetermined range. That is, after the access operation is completed, the data amount determination circuit 78 sends an acceleration command to the motor drive circuit 75 for a certain period of time if the amount of data in the buffer memory 72 falls below the lower limit of the predetermined range, and if it exceeds the upper limit of the predetermined range, the data amount determination circuit 78 sends an acceleration command to the motor drive circuit 75. A deceleration command is sent to the drive circuit 75. for example,
Assume that the buffer memory 72 has a capacity capable of recording 10 sectors of user data. Immediately after the access operation ends, no data has been written in the buffer memory 72, so an acceleration command is sent to the motor drive circuit 75 to increase the amount of data in the buffer memory 72. When six sectors worth of data are accumulated in the buffer memory 72, the output of the acceleration command is stopped. If an acceleration command is not sent to the motor drive circuit 75, no drive current is supplied to the spindle motor 81, so the rotation of the CD-ROM 60 gradually slows down. If the transfer request signal is being output, the amount of data in the buffer memory 72 will gradually decrease.When the amount of data in the buffer memory 72 has decreased to four sectors,
The data amount determination circuit 78 starts sending an acceleration command to the motor drive circuit 75 again.

When an interrupt process other than data reception occurs in the personal computer 74 and data reception becomes impossible, the personal computer 74 stops outputting the transfer request signal. In this case, the amount of data in the buffer memory 72 increases. The microprocessor 76 has a buffer memory 72
When the amount of data within reaches seven sectors, a deceleration command is issued to the motor drive circuit 75, and the motor drive circuit 76 decelerates the spindle motor 61. When the personal computer 74 generates the transfer request signal again, the interface circuit 73 resumes reading data from the buffer memory 72.

In this way, the spindle motor 6 after the access operation is completed.
1 rotation speed control is performed by the data amount determination circuit 78 so that the amount of data in the buffer memory 72 is kept within a predetermined range. The predetermined range of the capacity and data amount of the buffer memory 80 depends on the capabilities of the microprocessor 76 and the performance of the motor drive circuit 75.

This may be determined by determining the data reception capability of the personal computer 74 that may be connected.

The above-mentioned microprocessor 76 and data amount detection circuit 7
7. A flowchart outlining the operation of the data amount determination circuit 78 is shown in FIG.

As described above, according to the present embodiment, there is a continuous output means for reading data from the disk, a motor for rotating the disk, a storage means for temporarily storing data output from the continuous output means, and a transfer request from the host system. data sending means for sending out the data stored in the storage means in accordance with a signal; data amount detection means for detecting the amount of data in the storage means; By including a motor control means for accelerating or decelerating, it is possible to realize a disk drive device that can read data at a transfer rate that corresponds to the capacity and state of the host system.

In the above embodiment, when neither the acceleration command nor the deceleration command is supplied to the motor drive circuit 75, the motor drive circuit 75 does not supply drive current to the spindle motor 81. A rotational speed detection means such as a generator is added, and when there is no acceleration command or deceleration command, the output of the rotational speed detection means is monitored and a drive current is supplied to keep the rotational angular velocity of the spindle motor 61 constant. You can also do it.

Also, a data amount detection circuit 77, a data amount discrimination circuit 78.
The function of the switch circuit 78 may be realized as a function of a program executed by the microprocessor 76.

Further, in the above embodiment, a CD-ROM is used as an example of the disk, but the disk is not limited to a CD, and can be used as a drive device for various disks such as a write-once CD, a magneto-optical disk, a floppy disk, a hard disk, etc. Can adapt.

Effects of the Invention As described above, the disk drive device of the present invention has a continuous output means for reading data from the disk, a motor for rotating the disk, a storage means for temporarily storing data output from the continuous output means, and a host system. data sending means for sending out the data stored in the storage means in accordance with a transfer request signal of the motor; data amount detection means for detecting the amount of data in the storage means; By including a motor control means for accelerating or decelerating the rotational speed of the host system, it is possible to realize a disk drive device that can read data at a transfer rate depending on the capacity and state of the host system. In other words, data transfer can be achieved at an optimal transfer rate and interval depending on the data reception capability of the host system. For example, CD-
When applied to a ROM drive device, the conventional method is to read data from multiple sectors when the host system has low performance and cannot receive data at 1/75 second intervals.
The CD-ROM was accessed sector by sector multiple times, but if the present invention is applied, the speed at which data is read from the CD-ROM is determined by the amount of data in the storage means, so multiple sectors can be accessed at once. data can be read. In addition, even if the host system cannot receive data due to other interrupt processing, the data will not be discarded; the data will not be discarded; the data will be interrupted and read again once it is ready to receive data. There's no need to do it.

Further, if the host system has high performance and has the ability to receive data at a high data rate, it is possible to read all data in a short time.

In addition to the above effects, the motor control means accelerates or decelerates the motor so that the amount of data stored in the storage means remains within a predetermined range after the access operation is completed. A disk drive device with a simplified circuit can be realized.

Further, after the access operation of the access means is completed, the motor control means decelerates the motor when the amount of data in the storage means exceeds the upper limit of the predetermined range, and when the amount of data in the storage means falls below the lower limit of the predetermined range. By accelerating the motor and not supplying drive current to the motor when acceleration or deceleration is not being performed, the drive current of the motor can be reduced, making it possible to reduce power consumption.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a disk drive device according to an embodiment of the present invention, and FIG. 2 is a block diagram of a microprocessor 76 shown in FIG.
, a flowchart outlining the operations of the data amount detection circuit 77 and the data amount discrimination circuit 78, and FIG. 3 shows the format of data recorded on a CD-ROM. (b) is a schematic diagram of the subcode frame, (C) is a schematic diagram of the Q channel data mat in the program area, (
d) is a schematic diagram of the sector data format of CD-ROM mode 1, and FIG. 4 is a block diagram of a conventional CD-ROM drive device. 72... Buffer memory, 75-... Motor drive circuit, 7B-... Microprocessor, 73.
...Interface circuit.

Claims (2)

[Claims] (1) reading means for reading data designated by a host system from a disk; a motor for rotating said disk; storage means for temporarily storing data output from said reading means; data sending means for sending the data stored in the storage means to the host system in accordance with a transfer request signal from the host system when the data is stored in the storage means; data amount detection means for detecting and outputting the amount of data stored in the data storage device; and motor control for accelerating or decelerating the rotational speed of the motor so that the data amount remains within a predetermined range while the reading means is reading the data. A disk drive device comprising: means. (2) The motor control means decelerates the motor when the amount of data in the storage means exceeds the upper limit of the predetermined range, and accelerates the motor when it falls below the lower limit of the predetermined range;
2. The disk drive device according to claim 1, wherein no drive current is supplied to the motor when acceleration or deceleration is not performed.