JPH0327326U - - Google Patents
Info
- Publication number
- JPH0327326U JPH0327326U JP1989087312U JP8731289U JPH0327326U JP H0327326 U JPH0327326 U JP H0327326U JP 1989087312 U JP1989087312 U JP 1989087312U JP 8731289 U JP8731289 U JP 8731289U JP H0327326 U JPH0327326 U JP H0327326U
- Authority
- JP
- Japan
- Prior art keywords
- light
- circuit
- conversion
- receiving element
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 7
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
- Exposure Control For Cameras (AREA)
Description
第１図は本考案による測光回路のブロツク図、
第２図、第３図は第１図の測光回路の動作を説明
するフローチヤート、第４図は第２図、第３図に
係わる時間関係のタイムチヤートである。
１……受光素子、７……Ａ／Ｄ変換カウンタ（
Ａ／Ｄ変換回路）、９……測光リミツト設定回路
（Ａ／Ｄ変換時間限定回路）、１２……撮影モー
ド（モード設定手段）、Ｃ１……積分コンデンサ
。
Figure 1 is a block diagram of the photometric circuit according to the present invention.
2 and 3 are flowcharts for explaining the operation of the photometric circuit shown in FIG. 1, and FIG. 4 is a time chart relating to time related to FIGS. 2 and 3. 1... Light receiving element, 7... A/D conversion counter (
A/D conversion circuit), 9...photometric limit setting circuit (A/D conversion time limiting circuit), 12... photographing mode (mode setting means), C1 ... integrating capacitor.
Claims (1)
記受光素子の受光に応じて充電される積分用コン
デンサと、前記積分用コンデンサの電圧をデジタ
ルに変換するＡ／Ｄ変換回路と、前記Ａ／Ｄ変換
回路による変換時間を予め定めた時間に限定す信
号を出力するＡ／Ｄ変換時間限定回路と、複数の
撮影モードのうち閃光撮影モードの時のみ前記信
号の出力を許容するモード設定手段とを備えた測
光回路。 a light-receiving element that receives incident light from a subject; an integrating capacitor that is charged in response to light received by the light-receiving element; an A/D conversion circuit that converts the voltage of the integrating capacitor into digital; An A/D conversion time limiting circuit that outputs a signal that limits the conversion time by the conversion circuit to a predetermined time, and a mode setting means that allows output of the signal only in a flash photography mode among a plurality of photography modes. Equipped with a photometric circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989087312U JPH0327326U (en) | 1989-07-25 | 1989-07-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989087312U JPH0327326U (en) | 1989-07-25 | 1989-07-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0327326U true JPH0327326U (en) | 1991-03-19 |
Family
ID=31636962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989087312U Pending JPH0327326U (en) | 1989-07-25 | 1989-07-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0327326U (en) |
-
1989
- 1989-07-25 JP JP1989087312U patent/JPH0327326U/ja active Pending
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