JPH032602U - - Google Patents

Info

Publication number
JPH032602U
JPH032602U JP6345589U JP6345589U JPH032602U JP H032602 U JPH032602 U JP H032602U JP 6345589 U JP6345589 U JP 6345589U JP 6345589 U JP6345589 U JP 6345589U JP H032602 U JPH032602 U JP H032602U
Authority
JP
Japan
Prior art keywords
resistor
conductors
terminals
substrate
resistance plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6345589U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6345589U priority Critical patent/JPH032602U/ja
Publication of JPH032602U publication Critical patent/JPH032602U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案によるポテンシヨメータ用抵
抗板の平面図、第2図はこの考案によるポテンシ
ヨメータ用抵抗板の側面図、第3図は第1図に示
すものをA−A線に沿つて見た断面図、第4図は
従来のポテンシヨメータ用抵抗板の平面図、第5
図は従来のポテンシヨメータ用抵抗板の側面図、
第6図は第4図に示すものをB−B線に沿つて見
た断面図である。 1,11……基板、2,12……第1の抵抗体
、3,13……第2の抵抗体、4,5,6,14
,15,16……導体、7,8,9,17,18
,19……端子、20,21,22……リベツト
Fig. 1 is a plan view of a resistance plate for a potentiometer according to this invention, Fig. 2 is a side view of a resistance plate for a potentiometer according to this invention, and Fig. 3 is the same as shown in Fig. 1 taken along line A-A. Fig. 4 is a plan view of a conventional resistor plate for potentiometers, Fig. 5 is a sectional view taken along the
The figure shows a side view of a conventional resistor plate for potentiometers.
FIG. 6 is a sectional view of the device shown in FIG. 4 taken along line B-B. 1, 11... Substrate, 2, 12... First resistor, 3, 13... Second resistor, 4, 5, 6, 14
, 15, 16...Conductor, 7, 8, 9, 17, 18
, 19... terminal, 20, 21, 22... rivet.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板1上に、第1の抵抗体2と、該第1の抵抗
体2を中心とするとともに、一部が切欠されたC
字形状をなす環状の第2の抵抗体3とを設け、前
記第1の抵抗体2および第2の抵抗体3に、その
上面よりも低くなつた上面を有する導体4,5,
6をそれぞれ接続し、さらに前記各導体4,5,
6にそれぞれ端子7,8,9を接続したポテンシ
ヨメータ用抵抗板において、前記各端子7,8,
9を前記基板1の内部に埋設するとともに、前記
各導体4,5,6に、直接に接続したことを特徴
とするポテンシヨメータ用抵抗板。
On the substrate 1, there is a first resistor 2 and a C with a part cut out, with the first resistor 2 as the center.
A ring-shaped second resistor 3 is provided, and conductors 4, 5, each having an upper surface lower than the upper surface of the first resistor 2 and the second resistor 3 are provided.
6 are connected to each other, and each of the conductors 4, 5,
In the potentiometer resistance plate in which terminals 7, 8, and 9 are connected to terminals 6 and 6, respectively, the terminals 7, 8, and
9 is buried inside the substrate 1 and is directly connected to each of the conductors 4, 5, and 6.
JP6345589U 1989-05-31 1989-05-31 Pending JPH032602U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6345589U JPH032602U (en) 1989-05-31 1989-05-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6345589U JPH032602U (en) 1989-05-31 1989-05-31

Publications (1)

Publication Number Publication Date
JPH032602U true JPH032602U (en) 1991-01-11

Family

ID=31593521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6345589U Pending JPH032602U (en) 1989-05-31 1989-05-31

Country Status (1)

Country Link
JP (1) JPH032602U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8892278B2 (en) 2011-11-30 2014-11-18 Inotera Memories, Inc. Overhead rail guided transport system and implementation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8892278B2 (en) 2011-11-30 2014-11-18 Inotera Memories, Inc. Overhead rail guided transport system and implementation method thereof

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