JPH03256132A - Double task system device - Google Patents

Double task system device

Info

Publication number
JPH03256132A
JPH03256132A JP2055499A JP5549990A JPH03256132A JP H03256132 A JPH03256132 A JP H03256132A JP 2055499 A JP2055499 A JP 2055499A JP 5549990 A JP5549990 A JP 5549990A JP H03256132 A JPH03256132 A JP H03256132A
Authority
JP
Japan
Prior art keywords
task
processing
time
fault
system device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2055499A
Other languages
Japanese (ja)
Inventor
Hiroshi Katayama
洋志 片山
Shuji Sanada
真田 秀志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Data Terminal Ltd
Original Assignee
NEC Corp
NEC Data Terminal Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Data Terminal Ltd filed Critical NEC Corp
Priority to JP2055499A priority Critical patent/JPH03256132A/en
Publication of JPH03256132A publication Critical patent/JPH03256132A/en
Pending legal-status Critical Current

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  • Retry When Errors Occur (AREA)

Abstract

PURPOSE:To eliminate the system down time at the time of generation a fault in this double task system device by doubling a program for executing a certain processing. CONSTITUTION:When a processing requirement is outputted, an operation system (OS) 1 admits the use of plural tasks to execute the processing and starts the management of the tasks. At the time of recognizing the generation of a fault in the task #2-3, the OS 1 immediately disconnects the task #2-3 and sets up a waiting state in the task just preceding the task #2-3. During the period, the OS 1 develops a task having the same function as the task #2-3 from an external storage device 5 to a real memory 7 through an external bus 6. After completing the transfer, the execution of the task is started to continue the processing, so that the system can be prevented from being interrupted at the time of generating the fault.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はプログラムで動作する情報処理システム装置に
おいて、特に装置内のプログラム処理を改良した二重タ
スクシステム装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing system that operates on a program, and more particularly to a dual task system that improves program processing within the system.

〔従来の技術〕[Conventional technology]

従来のこの種の装置は、あるーっの処理を実現するため
に、いつくがのプログラム群、いわゆるタスクを起動さ
せて結果を得ている。
Conventional devices of this type run a number of programs, or so-called tasks, to obtain results in order to accomplish a certain process.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述のように、従来の装置は、処理の実現のために複数
の違ったタスクが起動される。この場合、タスク上に障
害があったときに、その処理の結果としては、信頼性が
低い結果が出る。また最悪の場合には、結果が返ってこ
す、いわゆるシステム・ダウンにつながるという欠点が
ある。
As mentioned above, in conventional devices, multiple different tasks are activated to accomplish a process. In this case, when a fault occurs in a task, the processing results in a result with low reliability. Furthermore, in the worst case, a result is returned, leading to a so-called system failure.

〔課題を解決するための手段〕[Means to solve the problem]

本発明二重タスクシステム装置は、異常が起きたタスク
を発見し、同一の機能を有する他のタクスに置き換える
機能を有している。
The dual task system device of the present invention has a function of discovering a task in which an abnormality has occurred and replacing it with another task having the same function.

すなわち、本発明の二重タスクシステム装置は、ある処
理を実現するためのプログラムを二重にして障害時のシ
ステムダウン時間を無くすようにしたものである。
That is, the dual-task system device of the present invention eliminates system downtime in the event of a failure by duplicating a program for implementing a certain process.

〔実施例〕〔Example〕

次に本発明の実施例について図面を参照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図は、本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

第1図において、1は本システムのソフトウェアの中核
をなすO8部であり、各タスクの管理およびシステムの
管理を行うものである、2はタスク(#]、)、3はタ
スク(#2>、4はタスク(#n)で、O3部の支配下
に存在する。
In FIG. 1, 1 is the O8 unit that forms the core of the software of this system, and is responsible for managing each task and the system. 2 is the task (#), ), and 3 is the task (#2> , 4 is a task (#n), which exists under the control of the O3 department.

いま、本システムに一つの処理の要求があったとする。Now, suppose that this system receives a request for one process.

O81は、この処理を行うために複数のタスクの使用を
認めて管理を始める。そして、タスク(#2)3で障害
が起きていると認識したとき、ただちに、そのタスク(
#2)3を切離す。
O81 accepts the use of multiple tasks to perform this process and starts managing them. Then, when it is recognized that a failure has occurred in task (#2) 3, that task (
#2) Separate 3.

このため、タスク(#2>3の前のタスクで待ち状態と
なる。この間にO81は障害の起きたタスク(#2)3
と同一の機能をするタスクを外部記憶装置5から外部バ
ス6を通して転送して実メモリ7へ展開する。転送が終
了次第、このタスクから実行して処理を続行する。
Therefore, the task before the task (#2>3) enters the waiting state. During this time, the O81
A task that has the same function as the above is transferred from the external storage device 5 through the external bus 6 and expanded into the real memory 7. As soon as the transfer is complete, execute from this task and continue processing.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の二重タスクシステム装置
は、タスクを二重化することにより、プログラム上の障
害が起った場合のシステムの中断をなくすことができる
という効果がある。
As explained above, the dual task system device of the present invention has the advantage that by duplicating tasks, it is possible to eliminate system interruption when a program failure occurs.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の構成を示すブロック図であ
る。 1・・・O8,2・・・タスク(#1)、3・・・タス
ク(#2)=4・・タスク(#n)、5・・外部記憶装
置。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. 1...O8, 2...Task (#1), 3...Task (#2)=4...Task (#n), 5...External storage device.

Claims (1)

【特許請求の範囲】[Claims] ある処理を実現するためのプログラムを二重にして障害
時のシステムダウン時間を無くすようにしたことを特徴
とする情報処理システム装置の二重タスクシステム装置
A dual task system device for an information processing system device, characterized in that a program for realizing a certain process is duplicated to eliminate system down time in the event of a failure.
JP2055499A 1990-03-06 1990-03-06 Double task system device Pending JPH03256132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2055499A JPH03256132A (en) 1990-03-06 1990-03-06 Double task system device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2055499A JPH03256132A (en) 1990-03-06 1990-03-06 Double task system device

Publications (1)

Publication Number Publication Date
JPH03256132A true JPH03256132A (en) 1991-11-14

Family

ID=13000339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2055499A Pending JPH03256132A (en) 1990-03-06 1990-03-06 Double task system device

Country Status (1)

Country Link
JP (1) JPH03256132A (en)

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