JPH03255541A - Information processor - Google Patents

Information processor

Info

Publication number
JPH03255541A
JPH03255541A JP2052608A JP5260890A JPH03255541A JP H03255541 A JPH03255541 A JP H03255541A JP 2052608 A JP2052608 A JP 2052608A JP 5260890 A JP5260890 A JP 5260890A JP H03255541 A JPH03255541 A JP H03255541A
Authority
JP
Japan
Prior art keywords
board
substrate
control
fault
connection interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2052608A
Other languages
Japanese (ja)
Inventor
Nobuo Kobayashi
小林 延夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2052608A priority Critical patent/JPH03255541A/en
Publication of JPH03255541A publication Critical patent/JPH03255541A/en
Pending legal-status Critical Current

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  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To automatize the fault diagnosis by each substrate unit and to execute the exchange of a substrate on which a fault part is present without interrupting a power source by providing a self-diagnostic function and a hot-line inserting/drawing-out function on each of a control substrate and an external connection interface substrate. CONSTITUTION:On respective control substrates 3 and respective external connection interface substrates 5, self-diagnostic functions 33, 53 for diagnosing abnormality of its own substrate and informing its result, and hot-line inserting/ drawing-out functions 31, 51 which can be inserted/drawn out into/from a control bus 7 in a hot-line state are provided. In such a state, respective control substrates 3 and respective external connection interface substrates 5 diagnose separately whether its own fault is generated or not, and when a fault is generated, the substrate in which the fault is generated informs its fact to an operator, etc. In such a manner, the fault diagnosis can be automatized by each substrate unit, and also, the change of the substrate on which a fault part is prevent can be executed without interrupting the power source of the device.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、各基板単位で故障が発生した場合にも装置の
運用を継続可能にした情報処理装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an information processing device that allows continued operation of the device even if a failure occurs in each board.

(従来の技術) 従来よりプラント制御装置等に適用される情報処理装置
としては、複数の制御基板を実装して多重プロセッサ装
置を構成するとともに複数の外部接続インタフェース基
板を実装してそれぞれの基板間を内部制御バスを介して
中央制御装置に接続した構成のものが知られている。
(Prior Art) Conventionally, information processing devices applied to plant control devices, etc. have been equipped with multiple control boards to configure a multiprocessor device, and also have multiple external connection interface boards installed to connect each board. A configuration in which the controller is connected to a central controller via an internal control bus is known.

上記従来の情報処理装置において故障が発生すると、−
旦装置の運用を停止し、故障診断ツールにより操作員等
が故障部位のある基板を探し出すようにしている。
When a failure occurs in the above conventional information processing device, -
Once the equipment is out of operation, operators and others use a fault diagnosis tool to find the board with the faulty part.

また、故障のある基板を交換するには、装置の電源を停
止した上で取外し交換を行っていた。
In addition, in order to replace a faulty board, the power to the device must be turned off, and then the board must be removed and replaced.

(発明か解決しようとする課題) しかしながら、上記従来の情報処理装置にあっては、故
障発生時には故障部位のある基板を探し出すために、−
旦装置運用を停止せねばならす、継続走行を必要とする
装置等では別個のバックアップ機能が必要となる。
(Problem to be solved by the invention) However, in the above-mentioned conventional information processing device, when a failure occurs, in order to find the board where the failure part is located, -
A separate backup function is required for devices that require continuous operation and that must be stopped once the device is in operation.

また、故障診断は、人間系によっており、多大な時間、
作業量を強いられ、また故障部位を絞り切れずに正常な
装置まで交換してしまう可能性もある。
In addition, failure diagnosis is done by humans, which takes a lot of time and
This may result in increased workload and the possibility of replacing even normal equipment without being able to isolate the faulty part.

さらに、故障した基板の交換は、運用の停止と共に電源
も停止せねばならず、仮に縮退走行か可能な場合であっ
ても、運用の継続走行を停止せねばならないという不合
理があった。
Furthermore, replacing a faulty board requires stopping the power supply as well as stopping the operation, and even if degeneracy is possible, it is unreasonable that continued operation must be stopped.

本発明は上記事情に鑑みてなされたものであり、その目
的は、故障診断を個々の基板単位で自動化することがで
きるとともに故障部位のある基板の交換を装置の電源を
停止することなく行うことができる情報処理装置を提供
することにある。
The present invention has been made in view of the above circumstances, and its purpose is to automate failure diagnosis on an individual board basis and to replace a board with a faulty part without stopping the power supply of the device. The purpose of this invention is to provide an information processing device that can perform the following tasks.

[発明の構55.] (課題を解決するための手段) 上記目的を達成するために本発明は、複数の制御基板を
実装して多重プロセッサ装置を構成するとともに複数の
外部接続インタフェース基板を実装し、それぞれの基板
間は制御バスを介して接続される情報処理装置において
、 前記各制御基板及び各外部接続インタフェース基板それ
ぞれに、自己の基板の異常を診断してその結果を報知す
る自己診断機能と活線状態で前記制御バスに対して挿抜
可能にする活線挿抜機能とを設けたことを特徴とする。
[Structure of the invention 55. ] (Means for Solving the Problems) In order to achieve the above object, the present invention mounts a plurality of control boards to configure a multiprocessor device, mounts a plurality of external connection interface boards, and connects each board. In an information processing device connected via a control bus, each of the control boards and each external connection interface board has a self-diagnosis function that diagnoses abnormalities in its own board and notifies the results, and the It is characterized by providing a hot-line insertion/removal function that allows insertion/removal of the control bus.

(作用) 上記構成の本発明ては、各制御基板及び各外部接続イン
タフェース基板個別に自己の故障発生の有無を診断する
(Operation) In the present invention configured as described above, each control board and each external connection interface board are individually diagnosed for the occurrence of their own failure.

故障が発生すると故障発生基板はオペレータ等にその旨
を報知する。
When a failure occurs, the failure board notifies an operator or the like of this fact.

また、故障基板の交換は電源を停止することなく活線状
態て行うことかてきる。
Furthermore, a failed board can be replaced while the power supply is live, without stopping the power supply.

(実施例) 第1図は本発明に係る情報処理装置の一実施例を示すブ
ロック図である。
(Embodiment) FIG. 1 is a block diagram showing an embodiment of an information processing apparatus according to the present invention.

この情報処理装置1は、中央制御装置2を制御中枢とし
て、複数の制御基板3,3・・から構成される多重プロ
セッサ装置4と、インタフェース基板で構成され、プリ
ンタや通信制御装置等と接続される複数の外部接続イン
タフェース装置5と、多重プロセッサ装置4と外部接続
インタフェース装置5て扱われる情報を記憶する情報記
憶装置6とを備え、中央制御装置2.多重プロセッサ装
置4、外部接続インタフェース装置5及び情報記憶装置
6は制御ハス7を介して接続されている。
This information processing device 1 includes a central control device 2 as a control center, a multiprocessor device 4 made up of a plurality of control boards 3, 3, etc., and an interface board, and is connected to a printer, a communication control device, etc. A central control unit 2. The multiprocessor device 4, external connection interface device 5, and information storage device 6 are connected via a control hub 7.

多重プロセッサ装置4を構成する各制御基板3311.
は、各々同一構成か採られており、制御バス7に対して
活動状態で挿抜可能にするコネクタ等て構成された活線
挿抜部31と、自己の基板故障を常時監視するとともに
自己の基板に割当てられた演算処理を実行する制御部3
2と、故障発生時には自己診断を実行してその結果を出
力する自己診断部33と、自己診断結果をランプ、r、
j<灯やメツセージ出力等によりオペレータに報知する
故障報知部34と、オペレータの基板3に対する操作入
力用のオペレータ操作部35とを備えている。
Each control board 3311 configuring the multiprocessor device 4.
They each have the same configuration, including a hot-line insertion/extraction unit 31 consisting of a connector etc. that allows insertion and removal from the control bus 7 in an active state, and a hot-line insertion/extraction unit 31 that constantly monitors its own board failure and Control unit 3 that executes assigned arithmetic processing
2, a self-diagnosis unit 33 that executes self-diagnosis and outputs the result when a failure occurs, and a lamp, r, which outputs the self-diagnosis result.
It is provided with a failure notification section 34 that notifies the operator by means of a light or outputting a message, and an operator operation section 35 for inputting operations to the board 3 by the operator.

一方、各外部接続インタフェース装置5,5・・・も各
々同一構成か採られており、制御l・スフに対して活動
状態て挿抜可能にするコネクタ等で構成された活線挿抜
部51と、自己の基板故障を常時監視するとともに、プ
リンタや通信制御装置に対するデータの受授等を制御す
る制御部52と、故障発生時には自己診断をしてその結
果を出力する自己診断部53と、自己診断結果をランプ
点灯やメツセージ出力等によりオペレータに報知する故
障報知部54と、オペレータの基板5に対する操作入力
用のオペレータ操作部55とを備えている。
On the other hand, each of the external connection interface devices 5, 5, . A control unit 52 that constantly monitors its own board failures and controls data transmission to and from printers and communication control devices, a self-diagnosis unit 53 that performs self-diagnosis and outputs the results when a failure occurs, and a self-diagnosis It includes a failure notification section 54 that notifies the operator of the result by lighting a lamp, outputting a message, etc., and an operator operation section 55 for inputting operations to the board 5 by the operator.

次に本実施例の作用を多重プロセッサ装置4の制御基板
3を例に説明する。
Next, the operation of this embodiment will be explained using the control board 3 of the multiprocessor device 4 as an example.

制御基板3,3.・・・が動作中に各基板の制御部32
は常時故障発生を監視しており、いずれかの基板3,3
.・に故障が発生すると該当する基板3の制御部32は
故障発生コマンドを自己診断部33へ出力し、自己診断
を実行させる。
Control board 3, 3. ... is in operation, the control unit 32 of each board
is constantly monitoring the occurrence of failures, and if any of the boards 3, 3
.. When a failure occurs in , the control section 32 of the corresponding board 3 outputs a failure occurrence command to the self-diagnosis section 33 and causes the self-diagnosis to be executed.

自己診断部33は自己の基板内に故障発生が認められる
と、その故障部位をオペレータに報知するためにランプ
を点灯し、故障報知部34に故障部位に関する情報を表
示する。
When the self-diagnosis section 33 detects that a failure has occurred in its own board, it lights up a lamp to notify the operator of the failure location, and displays information regarding the failure location on the failure notification section 34.

オペレータはランプが点灯された基板3の故障報知部5
4に表示された故障部位に関する情報を見て、この基板
を制御バス7から切り離す必要かあると認識した場合に
は、活動挿抜部31を操作し、活線状態てこの基板3を
制御バス7から切り離す。
The operator checks the failure notification unit 5 of the board 3 whose lamp is lit.
If you look at the information about the faulty part displayed in 4 and recognize that it is necessary to disconnect this board from the control bus 7, operate the active insertion/extraction unit 31 to disconnect the live circuit board 3 from the control bus 7. separate from

これにより、装置電源を停止し、運用を停止することな
く、故障基板3のみを制御バス7から切り離すことがで
き、情報処理機能の運用も継続して行うことかできる。
As a result, only the faulty board 3 can be disconnected from the control bus 7 without stopping the device power and operation, and the information processing function can continue to be operated.

なお、自己診断部33へのコマンド出力は、オペレータ
操作部35を介してオペレータの手入力によって行うこ
ともてきる。
Note that commands can also be output to the self-diagnosis section 33 by manual input by the operator via the operator operation section 35.

以上の説明は、多重プロセッサ4内の制御基板3に故障
が発生した場合であったが、外部接続インタフェース装
置5,5.・・・に故障が発生した場合についても全く
同様の手順で処理すればよい。
The above explanation was based on the case where a failure occurred in the control board 3 in the multiprocessor 4, but the external connection interface devices 5, 5. . . . If a failure occurs, the same procedure can be used.

[発明の効果] 以上説明したように本発明に係る情報処理装置によれば
、制御基板、外部接続インタフェース基板の各々に自己
診断機能と活線挿抜機能を設ける構成としたので、故障
診断を各基板単位で自動化することかでき、また、故障
部位のある基板の交換を装置の電源を停止することなく
行うことができる。
[Effects of the Invention] As explained above, according to the information processing device according to the present invention, since the control board and the external connection interface board are each provided with a self-diagnosis function and a hot-swap function, failure diagnosis can be performed on each of them. This can be automated on a board-by-board basis, and a board with a faulty part can be replaced without stopping the power to the device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る情報処理装置の一実施例の構成を
示すブロック図である。 1・・情報処理装置 2・・中央制御装置 3・・制御基板 4・・多重プロセッサ装ff 5・・外部接続インタフェース装置 31.51・・−活線挿抜部 32.52・・制御部 33.53・・・自己診断部 34.54・・・故障報知部 35.55・・・オペレータ操作部
FIG. 1 is a block diagram showing the configuration of an embodiment of an information processing apparatus according to the present invention. 1...Information processing device 2...Central control device 3...Control board 4...Multiple processor unit ff 5...External connection interface device 31.51...-Hot insertion/extraction unit 32.52...Control unit 33. 53...Self-diagnosis section 34.54...Failure notification section 35.55...Operator operation section

Claims (1)

【特許請求の範囲】[Claims] 複数の制御基板を実装して多重プロセッサ装置を構成す
るとともに複数の外部接続インタフェース基板を実装し
、それぞれの基板間は制御バスを介して接続される情報
処理装置において、前記各制御基板及び各外部接続イン
タフェース基板それぞれに、自己の基板の異常を診断し
てその結果を報知する自己診断機能と活線状態で前記制
御バスに対して挿抜可能にする活線挿抜機能とを設けた
ことを特徴とする情報処理装置。
In an information processing device in which a plurality of control boards are mounted to configure a multiprocessor device and a plurality of external connection interface boards are mounted, and each board is connected via a control bus, each control board and each external Each of the connection interface boards is provided with a self-diagnosis function for diagnosing an abnormality in its own board and notifying the results, and a hot-line insertion/removal function for allowing the connection interface board to be inserted into or removed from the control bus in a live-line state. information processing equipment.
JP2052608A 1990-03-06 1990-03-06 Information processor Pending JPH03255541A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2052608A JPH03255541A (en) 1990-03-06 1990-03-06 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2052608A JPH03255541A (en) 1990-03-06 1990-03-06 Information processor

Publications (1)

Publication Number Publication Date
JPH03255541A true JPH03255541A (en) 1991-11-14

Family

ID=12919512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2052608A Pending JPH03255541A (en) 1990-03-06 1990-03-06 Information processor

Country Status (1)

Country Link
JP (1) JPH03255541A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61206048A (en) * 1985-03-11 1986-09-12 Fujitsu Ltd Rising system for data processing system
JPS62236056A (en) * 1986-04-07 1987-10-16 Nec Corp Input/output controller for information processing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61206048A (en) * 1985-03-11 1986-09-12 Fujitsu Ltd Rising system for data processing system
JPS62236056A (en) * 1986-04-07 1987-10-16 Nec Corp Input/output controller for information processing system

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