JPH0325378A - Signal measuring instrument - Google Patents

Abstract

PURPOSE:To accurately find a signal width mean value by measuring a burst signal by using a one-shot counter whose operation time width is determined by a counting time at the time of reference clock counting and performing arithmetic processing. CONSTITUTION:An input signal 101 is a burst signal which consists of 1 or >=2 pulses and is generated intermittently. A retriggerable one-shot counter 1 operates with a start signal 107 from a microcomputer 3, its operation time width is determined by the counting operation time when the reference clock signal from a clock oscillator 4 is counted by a set number, and the counter is triggered with a pulse of the burst signal. A microcomputer 3 divides the counted value of the time width counter 2 when the pulse generation frequency of the counter 1 reaches an expected value by the expected frequency and subtracts the operation time width tw from the counter 1 to accurately find the signal width mean value tx.

Description

Detailed Description of the Invention [Object of the Invention] (Industrial Application Field) The present invention provides a signal width measuring device for determining the time width of a burst signal composed of one pulse or a group of two or more pulses. Regarding.

(Prior Art) Conventionally, a signal under test is input to a retriggerable one-shot circuit having a predetermined operating time width, the one-shot circuit is operated, and the one-shot circuit is operated from 177 input points of the signal under test. There is a signal width measuring device that calculates the signal width of the signal under test by counting the time until the end of the operation and subtracting the operation time width from this time.

According to this device, even if the signal to be measured is generated intermittently, it is possible to capture the start point of manual input and the end point of input of the pulse group, making it easy to measure the signal width. Obtainable.

By the way, in addition to such a single measurement value, when obtaining the average value of a large number of measurement values, the above-mentioned device can also be used to obtain the average value by obtaining multiple measurement values and averaging them. However, this naturally requires multiple measurements. In this case, it is fine as long as the signal under test occurs frequently in a short period of time, but the fewer times the signal occurs, the longer it will take to obtain the required number of measured values for calculating the average value. , the measurement worker is bound to the measurement task until the required number of measured values is obtained.

Therefore, it is conceivable to automatically perform this series of operations using a microcomputer, but in this case, the microcomputer would perform processes such as starting measurement, checking the end of measurement, reading data, and adding the data each time. This has to be done by measurement, which poses a problem of increasing burden.

(Problem to be Solved by the Invention) As described above, in the conventional signal width l1111 determination device, when determining the average value, it is necessary to perform multiple measurements in order to obtain a large number of sample values. Therefore, the inventor of the present invention decided to measure multiple values instead of obtaining multiple sample values. I'm thinking of accumulating the data for each time and then taking the average over that number of times. However, if the accuracy of the one-shot circuit's operating time width is low, an error will occur between the edge value of the operating time width and the preset value in the calculation section, and this error will accumulate as data accumulates. There is a difficulty in this point, because

The present invention has been made in view of this point, and its purpose is to measure a signal width by which the average value of the signal width of a burst signal can be accurately determined without requiring multiple Δ)I determinations. The goal is to provide equipment.

[Structure of the invention]

(Means for Solving the Problems) The signal width measuring device of the present invention performs a counting operation for a period of time each time a one-shot pulse is generated, accumulates the count value, and calculates the h-count value of the one-shot pulse. When the number of occurrences reaches the scheduled number of times, the count value of the time counting means is read and the average value is calculated to obtain the average value of the signal width, and the operating time width of the one-shot pulse generation means is This is determined based on the counting operation time when counting the reference clock.

(Function) According to the present invention, since the operating time width of the one-shot pulse generating means is determined by the counting operation time during reference clock counting, it is possible to set a high viscosity and prevent the accumulation of errors due to data accumulation. It is possible to accurately determine the signal width average value.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

In FIG. 1, 101 is an input signal, and here,
As shown in FIG. 2(A) as this input signal 101,
Burst signal b each formed by a plurality of pulses
Targets those that occur.

tx is the signal width of each burst signal b, and the apparatus of this embodiment is intended to find the average value of the signal width tx of the burst signals b, b, . . . .

Reference numeral 3 denotes a microcomputer, which has functions such as calculating the per-day average, the number of measured values, and generating a fill constant start signal, and means 31 to 35 correspond to these functions, respectively. .

9 is an AND gate, and 8 is an inverter. The AND gate 9 inputs the input signal 1 only when the gate signal 110 is “H”.
01 is passed through, and 102 is this AND gate 9
is the output signal of Inverter 8 is this AND gate 9
103 is its output signal. In this configuration, when the gate signal 110 is "L", the signal 102 is "L" and the signal 103 is "H".

Then, when the gate signal 110 becomes 'H',
If the signal 102 does not rise, the state remains unchanged from before the gate opens, and when the signal 102 rises, the signal 10
3 becomes "L°", and when the signal 102 falls, the signal 103
stands up. Therefore, when the gate signal 110 becomes "H", the signal 102 rises first, and then the signal 103 rises.
stand up, and so on.

A clock oscillator 4 generates a high-precision reference clock signal 50 having a frequency sufficiently higher than the pulse repetition frequency of the burst signal that is the signal under test 102 .

1 is a one-sit counter, 12 is a flip-flop,
7 is the or gate.

The one-shot counter 1 is triggered by the rising edge of the signal 103 (that is, the falling edge of the input signal 101) and counts a set number of clock pulses of the reference clock signal. The one-shot counter 1 outputs 'H#' outside the counting operation time.The count time set by this count value is set longer than the pulse interval of the signal 103.Therefore, this one-shot counter 1 The second after being triggered by the falling edge Bl of the first pulse of b,
Since the output signal 104 is retriggered before it rises due to the falling edges B2 and B3 of the third pulse, the output signal remains "L" until the time tw elapses after the triggering due to the falling edge B3 of the third pulse. It is designed to be held at ゜.

The data terminal of the flip-flop 12 is held at "H" by the power supply voltage Vcc, the signal 102 is input to the clock input terminal, and the inverted signal 104 is input to the reset input terminal. This flip-flop 12 is turned on by the rise of the signal 102 when the signal 104 is "H", its output becomes "L", and is reset by the fall of the signal 104. Therefore, the output of this flip-flop 12 becomes "L#" at the rising edge R of the first pulse of the burst signal 102, and is reset by the falling edge of the output 1 word 104 of the one-shot counter 1, and its output becomes "H". become.

The output signals 111 and 104 of the flip-flop 12 and the one-shot counter 1 are inverted and input to the OR gate 7, and the OR gate 7 calculates the logical sum of these signals. Therefore, this OR gate 7 operates while the signals 111 and 104 are "L", that is, the input signal 1
It outputs "H" only during the period from the rise of 01 to the rise of the output signal 104 of the one-shot counter 1, that is, during the period of tx+tv.

13 is a flip-flop, the data input terminal of which is held at "H" by the voltage Vcc, the output of the one-shot counter 1 is input to the clock input terminal, and the start signal 107 is inverted to the reset input terminal. has been done. This flip-flop 13 receives the start signal 1
When the one-shot counter 1 rises for the first time after 07 rises, its output signal 105 becomes "H".

Here, the start signal 107 is generated by the ifll+constant mode generating means 32 and the measurement mode holding means 33 of the microcomputer 3.

The measurement mode generating means 32 generates a measurement mode signal when a measurement operator issues a command through a console (not shown). The measurement mode holding tjf stage 33 latches this measurement mode signal and raises its output.
The output of this measurement mode holding stage 33 is the start signal 10.
7.

Reference numeral 10 denotes an AND gate for gating the output signal of the OR gate 7, and the output signal of the OR gate 7 and the output signal 105 of the flip-flop 13 are logically connected by the AND gate 10. This and gate 10
When the output signal 105 of the flipflop l3 is "H", the output of the OR gate 7 is passed through, and the burst signal b
The start signal 107 is generated in the middle of the generation period (signal width tx).
This prevents the "H" output of the OR gate 7 from passing when the voltage rises.

Reference numeral 11 denotes an AND gate for gating the clock signal 50 from the clock oscillator 4. The clock signal 50 and the output signal 106 of the AND gate 10 are ANDed by the AND gate 11, and the signal 106 becomes "H1". The clock signal 50 passes through the AND gate 10 only during the period tx+tw.

2 is a time counter. This time counter 2 counts the period tx+tv every time the burst signal b is input after the output signal 105 of the flip-flop 13 rises, and accumulates the count value corresponding to the period jx+tW. This is done by counting the clock signal 50 gated by gate 11.

5 is a number counter, which counts the number of times the burst signal b is input after the all constant operation control signal 105 rises by counting the rise of the output of the AND gate 10, and the count value is determined by the time width. This corresponds to the number of counting operations of the counter 2, and when the count value reaches a set value, the carry signal 108 is set to "H".

This number setting to the number counter 5 is performed by the number setting stage 31 of the microcomputer 3.

14 is a flip-flop for control at the end of measurement, and its data input terminal receives the carry signal 1 of the number counter 5.
08 is input, the output signal 104 of the one-shot counter 1 is input to the clock input terminal, and the start signal 107 is input to the reset terminal. This flip-flop 14 turns on at the first rise of the signal 104 (output of the one-shit counter 1) after the carry signal 108 from the number counter 14 becomes "H".
The output signal 109 is set to "H", and the output signal 110 is set to "H".
It is set to L°. The output signal 110 is given to the AND gate 9 as a gate signal, and the output signal 109 is given to the microcomputer 3 as a notification of completion of the measurement operation.

The end confirmation means 34 of the microcomputer 3 resets the measurement mode holding means 33 in response to the rise of the output signal 109 of the flip-flop 14, and also issues an operation command to the calculation means 35.

The calculation means 35 reads the count value of the time width counter 2 in response to the calculation command from the completion confirmation means 34, and calculates the average value of the signal width (X) of the burst signal b.

Here, the average value of the signal width tX is Av (tx),
Signal width tX corresponding to the count value from time width counter 2
When the cumulative value of is Σ(tx) and the setting value from the number of times setting means 31 is n, the calculation means 35 performs calculation expressed by the following equation.

That is, Av(tx)-(Σ(tx)/n)-tw.

The calculating means 35 supplies the value obtained by this calculation to an output device such as a monitor or a printer to display it,
Alternatively, the average value obtained is supplied to a means for determining whether or not it is a desired value, and is caused to make the determination.

Next, the operation of the apparatus of this embodiment configured as described above will be explained.

First, when the start signal 107 is "L" in the initial state, the flip-flop 14 is reset, and the flip-flop 14 is in the off state.
The output signal 110 is "H". Therefore,
The AND gate 9 is open, and the input signal 101 passes through the AND gate 9 and is supplied to the flip-flop 12 and the one-shot counter 1. Therefore, Fig. 2(A). As shown in (B) and (C), the flip-flop 12 and the one-shot counter 1 respond to the burst signal b, and the OR gate 7 generates an OR output of their inverted signals.

Therefore, the rise of the output signal 104 of the one-shot counter 1 also acts on the flip-flop 13, but since the start signal 107 is "L" and turn-on is prohibited, its output must remain at 'L'. Therefore, AND gate 10 is closed and AND gate 11 is closed.
is not opened and the clock signal 50 is not supplied to the time counter 2, so the time counter 2 does not perform a counting operation.

Then, when the start signal 107 becomes "H", the time counter 2 and the number counter 5 are initialized, and the reset of the flip-flop 13 is released. ), it turns on in response to the first rise of the output signal 104 of the one-shot counter 1.

As a result, the output signal 106 of the OR gate 7 appears as the output of the AND gate 10, as shown in FIG. 2(F).
The AND gate 11 is opened only during the period ix+tv when this is "H", and the clock signal 50 is supplied to the time counter 2, and the rise of the signal 106 is counted by the number counter 5. The operation of the time counter 2 and the number of times counter 5 is performed every time the burst signal b is input, and in the time counter 2, tx+tw
is accumulated by the number of inputs of the burst signal b, and the number of inputs is counted by the number counter 5.

When the count value of the number counter 5 reaches the set value and the carry signal 108 becomes "H", the count value of the time counter 2 for that time waits for the output signal 104 of the one-sit counter 1 to rise, and the count value of the time counter 2 for that time is counted. After waiting for the end of the operation, the flip-flop 14 is turned on. Then,
The end confirmation means 34 of the microcomputer 3 knows the end of the measurement, resets the measurement mode holding means 33, lowers the start signal 107, and issues an operation command to the calculation means 35. The average lAv(tx) will be calculated.

As described above, when the microcomputer 3 raises the start signal 107 once, the data for calculating the average value is automatically collected by the external circuit, and the microcomputer 3 issues a termination notification at the end of the process. It is only necessary to perform a predetermined calculation in response to the average value, so that every time a measurement value is obtained for one burst signal b, the microcomputer 3 raises the start signal, confirms the completion of measurement, reads the data, and calculates the average value. There is no need to perform processing such as cumulative calculations, and the burden on the microcomputer 3 is greatly reduced, and the idle time from the rise of the start signal 107 until the end of the measurement operation can be used effectively.

According to this embodiment, the operating time width tvl of the one-shot counter 1 is determined by the counting operation time of the reference clock signal 50, so it can be set with high precision, and the accumulation of differences due to data accumulation is prevented. It is possible to accurately determine the signal width average value.

Although the above explanation describes the case of calculating the average value, in the apparatus of this embodiment, if the number set in the number setting means 31 is set to "1", the above calculation is performed in the calculation stage 35. It is also possible to obtain a signal width measurement of the burst signal b rather than its average value.

〔Effect of the invention〕

As explained above, according to the present invention, the operating time width of the one-shot pulse generating means is determined by the count 1 and the operating time when counting the reference clock, so it can be set with high precision and errors due to data accumulation can be avoided. can be prevented from accumulating, and the signal width average value can be accurately determined without requiring multiple measurements.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a signal width aPI determining device according to an embodiment of the present invention, and FIG. 2 is an operation timing chart thereof. DESCRIPTION OF SYMBOLS 1... One shot counter, 2... Time counter, 3... Microcomputer, 31... Number of times setting means, 32... Measurement mode generation means, 33... Measurement mode holding means, 34. ...Completion confirmation means, 35...
Average value calculation means, 4... Reference clock oscillator, 5...
・Number of times counter, 11...AND gate for reference clock gate for time counter 2, 13...Flip-flop for measuring start timing control, 14...
・Flip-flop for control at the end of measurement operation, b...
Burst signal, R...rise, 81-B3...fall, tX...signal width, tv...operation time width of one-shot counter 1.

Claims (1)

[Claims] A signal width measuring device for measuring the signal width of a burst signal consisting of one or more pulses and occurring intermittently, comprising: means for generating a reference clock signal; and means for generating the reference clock signal. a retriggerable one-shot pulse generating means for generating a one-shot pulse by being triggered by a pulse of the burst signal, the operation time width of which is determined by the counting operation time when counting a set number; a time counting means that performs a counting operation every time a pulse is generated and accumulates the counted value; and a measurement end signal when the counted value of the time counting means reaches the predetermined number of times the one-shot pulse signal is generated. an end control means for generating the measurement end signal; and in response to the measurement end signal, reads the count value of the time counting means, divides it by the scheduled number of times, and subtracts the operating time width from the one shot pulse generating means to obtain the signal. A signal width measuring device comprising: an average value calculation means for determining an average value of widths;