JPH03252399A - Production of semi-insulating gaas substrate - Google Patents

Production of semi-insulating gaas substrate

Info

Publication number
JPH03252399A
JPH03252399A JP4888190A JP4888190A JPH03252399A JP H03252399 A JPH03252399 A JP H03252399A JP 4888190 A JP4888190 A JP 4888190A JP 4888190 A JP4888190 A JP 4888190A JP H03252399 A JPH03252399 A JP H03252399A
Authority
JP
Japan
Prior art keywords
crystal
raw material
semi
gaas
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4888190A
Other languages
Japanese (ja)
Other versions
JPH085759B2 (en
Inventor
Masayoshi Matsui
正好 松井
Yoshihiro Okabe
良宏 岡部
Haru Okawa
大川 晴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Metal Mining Co Ltd
Original Assignee
Sumitomo Metal Mining Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Mining Co Ltd filed Critical Sumitomo Metal Mining Co Ltd
Priority to JP2048881A priority Critical patent/JPH085759B2/en
Publication of JPH03252399A publication Critical patent/JPH03252399A/en
Publication of JPH085759B2 publication Critical patent/JPH085759B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To obtain a semi-insulating GaAs substrate having low dislocation density and >=10<7> specific resistance without adding chromium in growing GaAs crystal by vertical temperature gradient method by adding a specific amount of impurity such as carbon to be an acceptor to raw material crystal or the impurity and a raw material to a growing crucible. CONSTITUTION:In growing GaAs crystal by vertical temperature gradient method, an impurity of at least one of carbon, copper, zinc, beryllium, magnesium, cadmium, lithium, gold, silver, lead, cobalt and nickel to become an acceptor in an amount to give 1X10<15> atoms cm<-3> to 3X10<15> atoms cm<-3> atomic concentration in grown crystal after subtracting concentration of impurities such as silicon or sulfur is added to raw material crystal or the impurity and a raw material are added to a growing crucible, crystal is produced and then cut into a wafer shape.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はLSIやIC用基板とする抵抗率が10Ωcm
以上の半絶縁性GaAs基板の製造方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to LSI and IC substrates with a resistivity of 10 Ωcm.
The present invention relates to a method of manufacturing the above semi-insulating GaAs substrate.

〔従来の技術〕[Conventional technology]

GAAsはSlよりも電子移動度が大きいことがら、マ
イクロ波通信素子用の基板として使われており、又次世
代の超高速集積回路素子の基板として周速を広げつつあ
る。このGaAs基板は通常液体封止引き上げ法(以下
LEC法と略記)、又はクロム添加を行なう水平ブリッ
ジマン法(以下HB法と略記)により得られたインゴッ
トから製造されている。ところがGaAs基板上にエピ
タキシャル膜を成長させて製造する素子では、HB法に
より得られたGaAs基板は、転位密度は低いが基板中
に添加されているクロムのエピタキシャル膜への悪影響
があり、クロムを添加しない半絶縁性GaAs基板の供
給が望まれている。又、LEC法により得られたGaA
s基板は、不純物無添加で半絶縁性ではあるが、転位密
度が高いために用いられない。
Since GAAs has a higher electron mobility than Sl, it is used as a substrate for microwave communication devices, and is also being used as a substrate for next-generation ultrahigh-speed integrated circuit devices with increasing peripheral speed. This GaAs substrate is usually manufactured from an ingot obtained by the liquid seal pulling method (hereinafter abbreviated as LEC method) or the horizontal Bridgman method (hereinafter abbreviated as HB method) in which chromium is added. However, in devices manufactured by growing an epitaxial film on a GaAs substrate, the GaAs substrate obtained by the HB method has a low dislocation density, but the chromium added to the substrate has an adverse effect on the epitaxial film, so it is difficult to add chromium. It is desired to provide a semi-insulating GaAs substrate without additives. In addition, GaA obtained by the LEC method
Although the s-substrate does not contain any impurities and is semi-insulating, it is not used because of its high dislocation density.

これらの問題点を解決すべく垂直温度勾配法(以下VG
F法と略記)が試みられているが、■GF法で得られた
GaAs基板はHE法で得られたGaAs基板と同等の
転位密度はあるものの、比抵抗は1o”hw)台に留ま
っている。
In order to solve these problems, the vertical temperature gradient method (VG
Although the GaAs substrate obtained by the GF method has the same dislocation density as the GaAs substrate obtained by the HE method, the resistivity remains in the 1o"hw) range. There is.

LSIやIC用基板にとっては、素子間の電気的分離が
良好で、高集積化を可能にするため比抵抗の高いことが
重要で、一般に107Ω(m以上が要求されている。し
かし、vGF法で得られる無添加GaAs基板は比抵抗
が上記のように低過ぎ、そのため素子間の電気的分離が
不完全となり基板を介しての漏れ電流が問題となる。
For LSI and IC substrates, it is important to have good electrical isolation between elements and a high specific resistance to enable high integration, and generally 107Ω (m or more is required. However, the vGF method The resistivity of the additive-free GaAs substrate obtained in the above method is too low as described above, and therefore electrical isolation between elements is incomplete, causing a problem of leakage current through the substrate.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明の課題は、クロム添加によらず低転位密度で且つ
比抵抗が107ΩCI+1以上の半絶縁性GaAs基板
を得る方法を提供することにある。
An object of the present invention is to provide a method for obtaining a semi-insulating GaAs substrate having a low dislocation density and a resistivity of 107ΩCI+1 or more without addition of chromium.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題を達成するため、本発明はVGF法によりGa
Al1結晶を育成する際、原料結晶中或いは原料と共に
育成用ルツボに炭素、銅、亜鉛、ベリリウム、マグネシ
ウム、カドミウム、リチウム、金、銀、鉛、コバルト、
ニッケルのうちの少なくとも一つのアクセプタとなる不
純物を、シリコン、硫黄などのドナとなる不純物の濃度
を差し引いた上で育成後の結晶中でlXl×1015個
am−’ 〜3 X 10 ”6個cm−”の原子濃度
となるよう添加して結晶を製造し、その後ウェハー状に
切断する点に特徴がある。
In order to achieve the above-mentioned problems, the present invention utilizes Ga by the VGF method.
When growing Al1 crystals, carbon, copper, zinc, beryllium, magnesium, cadmium, lithium, gold, silver, lead, cobalt,
Impurities that serve as acceptors for at least one of nickel, after subtracting the concentration of impurities that serve as donors such as silicon and sulfur, are present in the grown crystal at 1X1 x 1015 am-' ~ 3 x 10''6 cm. The feature is that the crystal is manufactured by adding it to an atomic concentration of -'', and then it is cut into wafer shapes.

〔作用〕[Effect]

LECt法により得られたGaAs結晶において、アク
セプタである残留炭素の原子濃度がlXl×1015個
C1n  よりも低い場合が稀にあるが、その場合は図
に示すように、500〜650 C”の温度範囲で熱処
理すると伝導帯下0.43eVに位置する深いドナ準位
(以下深いドナ準位と略記)が生成して比抵抗が107
Ωcm以下に低下し、又これを700 C’以上で熱処
理し450 C’まで急冷すると深いドナ準位が消滅し
比抵抗が10 ’ Qm以上に回復することが本発明者
等により確かめられている。しかし一般にLWC法で得
られた結晶では、結晶育成中に炉内部材(特にカーボン
ヒーター)からの汚染があるため炭素原子濃度は1×1
0 個cm  よりも高く、比抵抗か】020m以下に
低下することは極めて少ない。
In GaAs crystals obtained by the LECt method, there are rare cases where the atomic concentration of residual carbon, which is an acceptor, is lower than 1Xl x 1015 C1n, but in that case, the temperature is 500 to 650 C'' as shown in the figure. When heat-treated in a range of
The inventors have confirmed that when the specific resistance decreases to Ωcm or less, and then heat-treats it at 700 C' or higher and rapidly cools it to 450 C', the deep donor level disappears and the resistivity recovers to 10' Qm or higher. . However, in general, crystals obtained by the LWC method have a carbon atom concentration of 1
The resistivity is higher than 0 pieces cm, and it is extremely rare for the specific resistance to drop below 020 m.

一方、vGF法で得られたGaAs結晶では、結晶育成
系内に炭素部材を含まないので汚染が無く炭素原子濃度
は常にlXl0’“個cm−”以下であり、且つ育成後
徐冷するために上述のように深いドナ準位が生成し、比
抵抗が10’Ωcm台に低下する。この比抵抗を107
Ωcm以上にするために、vGF法によりGaAs結晶
を育成する際、原料結晶中或いは原料と共に育成用ルツ
ボに前記の炭素等のアクセプタとなる不純物を、育成後
の結晶中で、シリコン、硫黄などのドナとなる不純物の
濃度を差し引いた上で1×101 個cTn  〜3 
X 10’個cm  となる様添加して結晶を製造する
のである。アクセプタ、ドナ、KL2  (伝導帯下0
.78eVに位置するドナ準位)の間の濃度バランスが
上記のようになることは、ドナを電気的に補償して残っ
たアクセプタが、EL2に電気的に補償されることを示
しており、この場合GaAs結晶は10“9cm以上の
比抵抗を示す半絶縁性となる。
On the other hand, GaAs crystals obtained by the vGF method do not contain any carbon components in the crystal growth system, so there is no contamination, and the carbon atom concentration is always below lXl0' cm-. As described above, a deep donor level is generated, and the resistivity decreases to the order of 10'Ωcm. This resistivity is 107
When growing a GaAs crystal using the vGF method, in order to achieve a GaAs crystal of Ωcm or more, impurities such as silicon, sulfur, etc., which act as acceptors such as carbon, are added to the raw material crystal or to the growth crucible together with the raw material. After subtracting the concentration of donor impurities, 1 x 101 cTn ~3
Crystals are produced by adding X 10' pieces/cm. Acceptor, donor, KL2 (0 below conduction band
.. The above concentration balance between the donor level (located at 78 eV) indicates that the acceptor remaining after electrically compensating the donor is electrically compensated to EL2, and this In this case, the GaAs crystal becomes semi-insulating with a specific resistance of 10"9 cm or more.

このような濃度バランスで不純物添加してGaAs結晶
を製造することにより、クロムを添加しなくても安定し
て半絶縁性の基板が得られる。
By manufacturing a GaAs crystal by adding impurities with such a balanced concentration, a semi-insulating substrate can be stably obtained without adding chromium.

〔実施例〕〔Example〕

比較例(無添加GaAsの製造) 内径52鴎の熱分解窒化ボロンるつぼに、GaAs原料
700gを種結晶であるGaAs単結晶の上になるよう
に置き、又圧力制御用の金J!iAsを15 g、他に
リザーバを設けて入れ、10  torrに内部を減圧
して封止した石英封管を、VGF炉にセットした。A8
リザーバを615C’に、種結晶の上端とその上の原料
結晶部を1238〜1350C’に昇温し融解した後、
毎時0.6C°で降温した。結晶育成終了後、引き続い
てるつぼ全体を毎分1.0〜1.5C’の冷却速度で室
温まで冷却することにより単結晶を得るVC)F法によ
り育成を行なった。VGF法により得られた炭素原子濃
度1×10 個CTn  未満のGaAs結晶を、厚さ
0.6mrrのウェハー状に切断し、更にこれを4翳角
のチップに整形して比抵抗を測定した。比抵抗測定は、
ホール係数測定法を用いて行なった。結果を第1表に示
す。
Comparative Example (Manufacture of additive-free GaAs) In a pyrolytic boron nitride crucible with an inner diameter of 52 mm, 700 g of GaAs raw material was placed on top of a GaAs single crystal as a seed crystal, and a gold J! A quartz-sealed tube containing 15 g of iAs in a reservoir and sealed by reducing the internal pressure to 10 torr was set in a VGF furnace. A8
After heating the reservoir to 615C' and melting the upper end of the seed crystal and the raw material crystal part above it to 1238-1350C',
The temperature decreased at 0.6°C per hour. After the crystal growth was completed, the entire crucible was subsequently cooled to room temperature at a cooling rate of 1.0 to 1.5 C' per minute, thereby growing a single crystal using the VC)F method. A GaAs crystal having a carbon atom concentration of less than 1×10 CTn obtained by the VGF method was cut into a wafer shape with a thickness of 0.6 mrr, which was further shaped into a chip with a four-angle shape, and the specific resistance was measured. Specific resistance measurement is
This was done using the Hall coefficient measurement method. The results are shown in Table 1.

実施例1 (亜鉛添加GaAsの製造)VGF法により
得られる炭素原子濃度lXl×1015個(m未満のG
aAs結晶を育成する際、原料結晶中に亜鉛を、シリコ
ンなどのドナとなる不純物原子の濃度を差し引いた上で
尚育成後の結晶中で3×10  個cm以下となるよう
に添加して結晶を製造し、その後ウェハー状に切断して
比抵抗を測定した。比抵抗は、ホール係数測定法を用い
て行なった。結果を第1表に示す。
Example 1 (Manufacture of zinc-doped GaAs) Carbon atom concentration lXl×1015 (less than m G
When growing an aAs crystal, zinc is added to the raw material crystal, after subtracting the concentration of donor impurity atoms such as silicon, so that the number of zinc atoms in the grown crystal is 3 x 10 cm or less. was manufactured and then cut into wafers and the specific resistance was measured. Specific resistance was measured using the Hall coefficient measurement method. The results are shown in Table 1.

第1表から明らかなように、無添加のウェハーは5X1
0’個CwI の炭素原子濃度で比抵抗は5×10Ωc
mであるのに比べ、本発明により製造したウェハーでは
2×10 個cm の亜鉛原子濃度を得ると共に3 X
 10’Ωcmの半絶縁性を示している。
As is clear from Table 1, the additive-free wafer is 5X1
At a carbon atom concentration of 0'CwI, the specific resistance is 5×10Ωc
The wafer produced according to the present invention has a zinc atomic concentration of 2 × 10 cm and 3 ×
It shows semi-insulating property of 10'Ωcm.

第    1    表 実施例2 (銅添加GaAsの製造) 実施例1と同様のVGF法により銅を、シリコン等のド
ナとなる不純物原子の濃度を差し引いた上でなお育成後
の結晶中で3×10 個(m以下となるよう添加して結
晶を製造し、その後ウェハー状に切断して比抵抗を測定
した。比抵抗は、ホール係数測定法を用いて行なった。
Table 1 Example 2 (Manufacture of copper-doped GaAs) Copper was added by the VGF method similar to Example 1 to a concentration of 3×10 in the grown crystal after subtracting the concentration of impurity atoms serving as donors such as silicon. A crystal was manufactured by adding 1000 mol (m) or less, and then it was cut into wafers and the specific resistance was measured.The specific resistance was measured using the Hall coefficient measurement method.

実施例1で得られたと同様に、銅を添加したウェハーで
は2 X 1×1015個cm の銅原子濃度を得ると
共に3×10“ΩcTI+の半絶縁性を示した。
Similar to that obtained in Example 1, the copper-doped wafer obtained a copper atomic concentration of 2 x 1 x 1015 cm2 and exhibited semi-insulating property of 3 x 10''ΩcTI+.

〔発明の効果〕〔Effect of the invention〕

このように本発明によれば、クロムを添加しないで低転
位密度の半絶縁性()aAs基板を得ることができ、G
aAsの工(!、LS王化に大きく貢献することが出来
る。又、本発明はVGF法と原理を同じくする垂直ブリ
ッジマン法にも適用できることは云うまでもない。
As described above, according to the present invention, a semi-insulating ()aAs substrate with a low dislocation density can be obtained without adding chromium, and a G
It can greatly contribute to the development of aAs technology (!, LS).It goes without saying that the present invention can also be applied to the vertical Bridgman method, which has the same principle as the VGF method.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明の基本となる深いドナ準位の生成、消滅によ
る比抵抗変化の温度依存性を示すグラフである。 熱処理温度(0C) 手 続 補 正 書 (自発) 1゜ 事件の表示 平成 年 特 許 願 第 8881 号 2、発明の名称 半絶縁性G&All基板の製造方法 3゜ 補正をする者 事件との関係
The figure is a graph showing the temperature dependence of resistivity change due to generation and extinction of deep donor levels, which is the basis of the present invention. Heat treatment temperature (0C) Procedural amendment (voluntary) 1゜Indication of the case Heisei Patent Application No. 8881 2. Name of the invention Method for manufacturing semi-insulating G&All substrates 3゜Relationship with the person making the amendment

Claims (1)

【特許請求の範囲】[Claims] (1)垂直温度勾配法によりGaAs結晶を育成する際
、原料結晶中或いは原料と共に育成用ルツボに炭素、銅
、亜鉛、ベリリウム、マグネシウム、カドミウム、リチ
ウム、金、銀、鉛、コバルト、ニッケルのうちの少なく
とも一つのアクセプタとなる不純物を、シリコン、硫黄
などのドナとなる不純物の濃度を差し引いた上でなお育
成後の結晶中で1×10^1^5個cm^−^3〜3×
10^1^6個cm^−^3の原子濃度となるように添
加して結晶を製造し、その後ウェハー状に切断すること
を特徴とする半絶縁性GaAs基板の製造方法。
(1) When growing GaAs crystals by the vertical temperature gradient method, carbon, copper, zinc, beryllium, magnesium, cadmium, lithium, gold, silver, lead, cobalt, and nickel are placed in the raw material crystal or in the growth crucible together with the raw materials. After subtracting the concentration of at least one acceptor impurity such as silicon and sulfur, there are still 1 x 10^1^5 cm^-^3~3x in the crystal after growth.
A method for manufacturing a semi-insulating GaAs substrate, characterized by manufacturing a crystal by adding 10^1^6 atoms to an atomic concentration of 10^1^6 cm^-^3, and then cutting it into wafer shapes.
JP2048881A 1990-02-28 1990-02-28 Method for manufacturing semi-insulating GaAs substrate Expired - Fee Related JPH085759B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2048881A JPH085759B2 (en) 1990-02-28 1990-02-28 Method for manufacturing semi-insulating GaAs substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2048881A JPH085759B2 (en) 1990-02-28 1990-02-28 Method for manufacturing semi-insulating GaAs substrate

Publications (2)

Publication Number Publication Date
JPH03252399A true JPH03252399A (en) 1991-11-11
JPH085759B2 JPH085759B2 (en) 1996-01-24

Family

ID=12815628

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JPH085759B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6007622A (en) * 1996-04-26 1999-12-28 Sumitomo Electric Industries, Ltd. Method of preparing group III-V compound semiconductor crystal
JP2010245547A (en) * 2010-06-15 2010-10-28 Sumitomo Chemical Co Ltd Compound semiconductor epitaxial substrate

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58176200A (en) * 1982-04-12 1983-10-15 Sumitomo Electric Ind Ltd Preparation of single crystal of gallium arsenide
JPS59137400A (en) * 1983-01-26 1984-08-07 Sumitomo Electric Ind Ltd P type gallium arsenide single crystal with low dislocation density and its manufacture
JPS6479087A (en) * 1987-09-21 1989-03-24 Hitachi Cable Gallium arsenide single crystal having low dislocation density and its production

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58176200A (en) * 1982-04-12 1983-10-15 Sumitomo Electric Ind Ltd Preparation of single crystal of gallium arsenide
JPS59137400A (en) * 1983-01-26 1984-08-07 Sumitomo Electric Ind Ltd P type gallium arsenide single crystal with low dislocation density and its manufacture
JPS6479087A (en) * 1987-09-21 1989-03-24 Hitachi Cable Gallium arsenide single crystal having low dislocation density and its production

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6007622A (en) * 1996-04-26 1999-12-28 Sumitomo Electric Industries, Ltd. Method of preparing group III-V compound semiconductor crystal
USRE39778E1 (en) * 1996-04-26 2007-08-21 Sumitomo Electric Industries, Ltd. Method of preparing group III-V compound semiconductor crystal
USRE41551E1 (en) * 1996-04-26 2010-08-24 Sumitomo Electric Industries, Ltd. Method of preparing group III-V compound semiconductor crystal
JP2010245547A (en) * 2010-06-15 2010-10-28 Sumitomo Chemical Co Ltd Compound semiconductor epitaxial substrate

Also Published As

Publication number Publication date
JPH085759B2 (en) 1996-01-24

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LAPS Cancellation because of no payment of annual fees