JPH03247189A - Video encoder - Google Patents

Abstract

PURPOSE:To simplify the control sequence of a generating code quantity controlled variable quantizer and to realize high speed picture with a simple circuit by adding a fixed quantizer of a quantization step size in a CCITT recommendation (H.261) video encoder. CONSTITUTION:A signal transformed by a discrete cosine transformation device 103 is inputted to a fixed quantizer 202, a recorder A203 and a variable quantizer 204 through an input 201. The signal is quantized at the fixed quantizer 202 by a step size 8. The result of quantization by the fixed quantizer 202 and the variable quantizer 204 is inputted to a quantization step size decision device 205, the signals are rearranged in each block and subject to zigzag scanning. Then 2nd to 64th values in figure are used to obtain a generated code quantity in the case of Huffman encoding is obtained by a Huffman coding quantity table 206. Then the optimum quantization step size is obtained by designating the generated code quantity in matching with the transmission line.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a CCITT standard (H, 261) compliant video telephone/conference video encoder.

[Prior Art] In a conventional video encoder, the output of a discrete cosine transformer is quantized by a variable quantizer with a variable quantization step.
The output of the variable quantizer was Huffman encoded to determine the amount of generated code, and the quantization step was controlled according to the result. The control method is as described in D-45 of the 1989 Institute of Electronics, Information and Communication Engineers Autumn National Conference, in which the output of the variable quantizer is Huffman encoded to obtain the generated code amount.
The process was repeated three times, and the quantization step was controlled according to the results.

[Problems to be Solved by the Invention] However, in the above-mentioned conventional technology, high-speed processing is not possible due to the delay time caused by repeating Huffman encoding the output of the variable quantizer and determining the generated code amount two or three times. The problem is that it cannot be done. The present invention is intended to solve these problems, and its purpose is to realize high-speed processing by adding a simple circuit.

[Means for Solving the Problems] (1) The video encoder of the present invention complies with the CCITT standard (H,
261) In the video encoder, a discrete cosine transformer;
A fixed quantizer in quantization step 8 that quantizes the output of the discrete cosine transformer, a variable quantizer with variable quantization step that quantizes the output of the discrete cosine transformer, and a macro quantizer that quantizes the output of the discrete cosine transformer. A recorder that records in blocks; a quantization step determiner that determines the amount of information generated during Huffman encoding from the outputs of the fixed quantizer and the variable quantizer and determines the quantization step of the variable quantizer; It is characterized by having a Huffman encoder which quantizes the output of the quantization step with a variable quantizer with a quantization step determined by a quantization step determiner and Huffman encodes the quantization result.

(2) The video encoder of the present invention includes the video encoder described in (1), in which the output of the discrete cosine transformer is divided into two elements from the first element and the second element to the 64th element of each block. The first element is quantized with a fixed quantizer of quantization step 8, and the second to 64th elements are quantized with a quantization step determiner and a variable quantizer with a determined quantization step. It is characterized by having a synthesizer that performs quantization, Huffman-encodes the quantization results, and combines the quantization results of the first element and the Huffman-encoded results of the second to 64th elements.

[Example code] FIG. 1 is a block diagram of a video encoder according to the present invention.

The signal flow in FIG. 1 will be explained below. Video signal is CIF
(common intermediate format), and is divided into macroblocks consisting of 8 lines x 8 pixel blocks, 4 blocks of luminance signals, and 2 blocks of color difference signals, a total of 6 blocks. Prediction is usually done between frames, so
Encoding control 102 connects switch 109 and switch 110 to the lower side as shown in FIG.

A video signal is input from a video signal input 101 for each macroblock. First, it is input to the motion compensation predictor 107, which selects the signal of the macroblock with the minimum prediction error from the already recorded signal of the previous frame (motion vector detection), and outputs the signal of that macroblock. . After this signal passes through a loop filter 108, the difference between it and the video input signal is taken. The difference signal between this video input signal and the macroblock indicated by the motion vector of one frame before is converted by a discrete cosine transformer 103 for each block. The generated code amount control type variable quantizer 104 then performs quantization and Huffman encoding, and outputs the encoded result 112. The quantization characteristics of the generated code amount control type variable quantizer 104 are adaptively set to match the transmission rate of the transmission path. This method will be described in detail in the description of FIG. The quantized signal is inversely quantized by an inverse quantizer 105 and subjected to inverse discrete cosine transform by an inverse discrete cosine transformer 106, and then the signal of the block indicated by the motion vector is converted into a signal passed through a loop filter 108. The sum is added and recorded in the motion compensation predictor 107.

On the other hand, for the first frame or scene change, prediction is done within the frame, so the encoding control 1
02 connects switch 109 and switch 110 to the upper side. That is, the signal inputted from the video signal input 101 is directly converted by the discrete cosine transformer 103. Then, it is quantized by a variable quantizer 104 that controls the amount of generated codes, and further subjected to Huffman encoding, and is output as an encoding result 112. The quantized signal is dequantized by an inverse quantizer 105, subjected to inverse discrete cosine transform by an inverse discrete cosine transformer 106, and then recorded in a motion compensation predictor 1O7.

FIG. 2 shows a generated code amount control type variable quantizer of the video encoder of the present invention (generated code amount controlled variable quantizer 10 of FIG. 1).
4) in detail.

First, the characteristics of this generated code amount control type variable quantizer will be explained. The discrete cosine transformed signal is input for each block, quantized, and numbered in the order of numbers (1 to 64) in Figure 5.
After being zigzag scanned, it is Huffman encoded.

The first value in FIG. 4 is quantized in quantization step 8 because it corresponds to the DC component of the block signal before discrete cosine transformation. The 2nd to 64th values correspond to the alternating current components of the block signal before discrete cosine transformation, so the quantization step is an even value between 2 and 62, and is variable in macroblock units. Control to match the transmission rate. The characteristics of this variable quantizer are as shown in FIG. 6, taking into account the dead zone. To determine the optimal quantization step using a variable quantizer, first quantize in two quantization steps, measure the amount of generated code, and then use Equation 1 to find constants a and b.

(Generated code amount) = ax log (quantization step size) + b: Equation 1 Then, the optimal quantization step size is determined from the generated code amount that matches the transmission path.

The signal flow in FIG. 2 will be explained below. The signal transformed by the discrete cosine transformer 103 (Fig. 1) for each block is
Fixed quantizer 202, recorder A20 through input 201
3, and is input to the variable quantizer 204. The fixed quantizer 202 performs quantization with a step size of 8. This corresponds to QUANT=4 in FIG. The variable quantizer 204 performs quantization with a step size of 32 as specified by the quantization step size 214. This is QU in Figure 6.
Compatible with ANT=16. Note that this step size may be set to a value other than 32 by initial setting.

The quantization results of the fixed quantizer 202 and variable quantizer 204 are input to a quantization step size determiner 205, rearranged within the block, and zigzag scanned, as shown in FIG. Then, from 2nd to 6th in Figure 5
Using the fourth value, the amount of code generated during Huffman encoding is determined from the Huffman code amount table 206. In this way, the amount of generated code is calculated for six blocks in the macroblock, and the constant a is calculated from Equation 1.

Find b. The optimum quantization step size is then determined by specifying the amount of generated code that matches the transmission path. This is outputted from the quantization index 208 and also outputted as the quantization step size 214 to the variable quantizer 204 . Furthermore, the fifth output of the fixed quantizer 202 is
The first data in the figure is written to recorder B207. The signal input to the recorder A 203 has a quantization step size 214 after one macroblock is written.
is input to the variable quantizer 204, and then output to the variable quantizer 204. Here, in the recorder A203, the first data in FIG. 5 is discarded, and only the second to 64th data in FIG. be done.

The quantization result is processed by the Huffman encoder 208 and the synthesizer B21.
Output to 0. The Huffman encoder 208 zigzags scans the input data as shown in FIG. 5, and then performs Huffman encoding. The output of the Huffman encoder 208 is sent to the synthesizer A209, and the first data in FIG. 5 is sent to the recorder B2.
Using the data of 07, the 2nd to 64th data in FIG. Synthesizer B2
10, the first data in FIG. 5 uses data from the recorder B 207, and the second to 64th data in FIG. It is output from the output 213 to the device.

FIGS. 3 and 4 are diagrams showing the configuration of the fixed quantizer 202 of the present invention.

FIG. 3 shows a case where the input data to the fixed quantizer 202 is expressed in two's complement. It should be noted here that the Huffman code amount table 206 is designed so that the generated code amount after Huffman encoding is determined by the absolute value of the input data, and the generated code amount does not depend on the sign of the input data. FIG. 3 will be explained below. Input data 301 is 2 bits of 12 bits.
If the input data 301 is positive (MSE=O), 1 is added to the 12-bit data 302.
shall be. The reason why 1 is added is to match the quantization characteristics shown in FIG. If the input data 301 is negative, (M
SB=1), input data 301 is inverted bit by bit, and 2 is added to obtain 12-bit data 302. The reason why 2 is added to the inverted data is to invert the sign of the negative input data 301 by adding 1, and to match the quantization characteristics shown in FIG. 6 by adding 1.

Next, the 12-bit data 302 is divided into 3 bits on the LSB side and M
The upper 2 bits on the SB side are considered as 8-bit data 303 as shown in FIG. This shows that since the quantization step size is 8, the quantizer can be configured by discarding the 3 bits on the LSB side. The MSB of the 8-bit data 303 is set to 0 because the sign bit has no meaning in this system.

FIG. 4 shows a case where the input data to the fixed quantizer 202 is expressed as a signed absolute value. Input data 401 is 1
It is expressed as a 2-bit signed absolute value, and the input data is 40
1 is added to 1, and the resulting 12-bit data 402 is viewed as the 3 bits on the LSB side and the upper 2 bits on the MSB side, and the fourth
As shown in the figure, it is assumed to be 8-bit data 403. This shows that since the quantization step size is 8, the quantizer can be configured by discarding the 3 bits on the LSB side.

The MSB of the 8-bit data 403 is set to 0 because the sign bit has no meaning in this system. The reason why 1 is added to the input data 401 is to match the quantization characteristics shown in FIG.

[Effects of the Invention] As described above, according to the present invention, by adding one fixed quantizer with a quantization step size of 8, the control sequence of the generated code amount control type variable quantizer is simplified,
This has the effect of realizing high-speed processing with a simple circuit.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a video encoder of the present invention. FIG. 2 is a block diagram showing an embodiment of the generated code amount control type variable quantizer of the present invention. FIG. 3 is a diagram showing a fixed quantizer of the present invention. FIG. 4 is a diagram showing a fixed quantizer of the present invention. FIG. 5 is a diagram for explaining zigzag scanning. FIG. 6 is a diagram for explaining quantization characteristics. 101... Video signal input 102... Encoding control 103... Discrete cosine transformer 104... Generated code amount control type variable quantizer 105...
- Inverse quantizer 106...Inverse discrete cosine transform 107...Motion compensation predictor 108...Loop filter 109...Switch 110...Switch 111...Quantization index 112...Coding Result 201...Input 202...Fixed quantizer 203...Recorder A 204...Variable quantizer 205...Quantization step size determiner 206...
Huffman code amount table 207...Recorder B 2O3...Huffman encoder 209...Synthesizer A 210 211 12 13 14 01 02 03 01 02 03...Synthesizer B ・Quantization index/encoding result・Output to inverse quantizer ・Quantization step size ・Input data ・12 bit data ・8 bit data Input data ・12 bit data ・8 bit data or more

Claims (2)

[Claims] (1) In a CCITT standard (H.261) video encoder, a discrete cosine transformer and a fixed quantizer in a quantization step 8 for quantizing the output of the discrete cosine transformer;
a variable quantizer with a variable quantization step that quantizes the output of the discrete cosine transformer; a recorder that records the output of the discrete cosine transformer in units of macroblocks; the fixed quantizer and the variable quantizer. a quantization step determiner which determines the amount of information generated during Huffman encoding from the output of the encoder and determines the quantization step of the variable quantizer; and quantization of the output of the recorder determined by the quantization step determiner. A video encoder comprising a Huffman encoder that performs quantization with the variable quantizer of the step and Huffman encodes the quantization result. (2) In the video encoder according to claim 1, the output of the discrete cosine transformer is separated into two elements, the first element and the second element to the 64th element of each block, and the first element is Quantization is performed by a fixed quantizer in quantization step 8, and the second to 64th elements are quantized by a variable quantizer with a quantization step determined by a quantization step determiner, and the quantization result is converted into a Huffman code. A video encoder comprising: a synthesizer for combining the quantization results of the first element and the Huffman encoding results of the second to 64th elements.