JPH03242918A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03242918A JPH03242918A JP3999490A JP3999490A JPH03242918A JP H03242918 A JPH03242918 A JP H03242918A JP 3999490 A JP3999490 A JP 3999490A JP 3999490 A JP3999490 A JP 3999490A JP H03242918 A JPH03242918 A JP H03242918A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- identification
- identification symbol
- semiconductor device
- metal film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 50
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims description 14
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000012790 confirmation Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体装置に製品や工程を管理するための識
別記号を刻印する工程を含む半導体装置の製造方法に関
する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, which includes a step of stamping an identification symbol on the semiconductor device for controlling the product or process.
従来の技術
第3図(a) 、 (b)は、従来の半導体装置の製造
方法により刻印された半導体基板の平面図および断面図
を示すものであり、図において、1は半導体基板、2は
その半導体基板1上に刻印された識別記号、3は半導体
基板1上に蒸着された金属膜、4は金属膜3上に設けら
れた最終保護膜、5は半導体基板1上に形成された半導
体素子(以下素子と略す〉の形成領域である。第4図は
、第3図における識別記号2の位置付近を拡大して示し
たものであり、6は素子を個々に分割するための分割線
である。Prior Art FIGS. 3(a) and 3(b) show a plan view and a cross-sectional view of a semiconductor substrate stamped by a conventional semiconductor device manufacturing method. In the figures, 1 is a semiconductor substrate, and 2 is a An identification symbol engraved on the semiconductor substrate 1, 3 is a metal film deposited on the semiconductor substrate 1, 4 is a final protective film provided on the metal film 3, and 5 is a semiconductor formed on the semiconductor substrate 1. This is the formation area of the element (hereinafter abbreviated as element). Fig. 4 is an enlarged view of the vicinity of the position of identification symbol 2 in Fig. 3, and 6 is a dividing line for dividing the element into individual parts. It is.
以下この半導体装置の製造方法(該四方法を含む〉につ
いて説明する。The method for manufacturing this semiconductor device (including these four methods) will be described below.
半導体基板1に識別記号2を該印するために、半導体基
板1の方位指示用の切り欠き部近傍に一列に識別記号2
を写真印・刷技術を用いて刻印する。その後、半導体基
板1の上面に金属膜3を蒸着し、続いて最終保護膜4を
形成する。そして拡散工程の終った半導体基板1は分割
線6にそって素子ごとに切断9分割される。In order to mark the identification symbol 2 on the semiconductor substrate 1, the identification symbol 2 is placed in a row near the notch for indicating the orientation of the semiconductor substrate 1.
is engraved using photo printing/printing technology. Thereafter, a metal film 3 is deposited on the upper surface of the semiconductor substrate 1, and then a final protective film 4 is formed. After the diffusion process, the semiconductor substrate 1 is cut into nine parts along the dividing line 6 into nine parts.
発明が解決しようとする課題
しかしながら、上記従来の半導体装置の製造方法におい
ては、製造工程において、識別記号2の上に金属膜3が
蒸着されていくために、識別記号2が不鮮明になり、識
別記号2の識別が困難となる。また、半導体基板1上に
ICなどの半導体素子を形成した後、それぞれの素子を
切断2分割する際に分割線6に沿って溝切りを施した時
、第4図に示すように、その識別記号2の上を切ってし
まい、以後の工程でその識別記号2の読み取りができな
くなるなどの課題があった。Problems to be Solved by the Invention However, in the conventional semiconductor device manufacturing method described above, since the metal film 3 is deposited on the identification symbol 2 during the manufacturing process, the identification symbol 2 becomes unclear and the identification symbol 2 becomes unclear. Symbol 2 becomes difficult to identify. Further, after forming semiconductor elements such as ICs on the semiconductor substrate 1, when cutting grooves along the dividing line 6 when cutting each element into two parts, as shown in FIG. There was a problem in that the top of the symbol 2 was cut off, making it impossible to read the identification symbol 2 in subsequent steps.
本発明は上記従来の課題を解決するものであり、半導体
基板に素子分割用の溝切りを行った後も、識別記号を認
識可能とする半導体装置の製造方法を提案することを目
的とする。The present invention is intended to solve the above-mentioned conventional problems, and it is an object of the present invention to propose a method for manufacturing a semiconductor device that allows identification symbols to be recognized even after grooves for dividing elements are cut in a semiconductor substrate.
課題を解決するための手段
本発明は上記目的を達成するために、半導体装置の製造
工程において、半導体基板上および半導体基板上に設け
られた金属膜上の1個の素子領域内に1回以上識別記号
を刻印するものである。Means for Solving the Problems In order to achieve the above-mentioned objects, the present invention has an object of the present invention, in which, in the manufacturing process of a semiconductor device, a semiconductor substrate is coated once or more in one element region on a semiconductor substrate and a metal film provided on the semiconductor substrate. It is stamped with an identification symbol.
作用
したがって本発明によれば、識別記号は半導体基板上お
よびその上に設けられた金属膜上の1個の素子領域内に
刻印されているために、半導体装置の製造工程中宮にそ
の識別記号を、鮮明に確認できるとともに、素子分割用
の溝切りを施しても損傷する恐れはなく、最終工程に至
るまで識別記号の読み取りが可能となるものである。Therefore, according to the present invention, since the identification symbol is engraved on the semiconductor substrate and within one element region on the metal film provided thereon, the identification symbol can be printed during the manufacturing process of the semiconductor device. , can be clearly confirmed, there is no risk of damage even if grooves are cut for element division, and the identification symbol can be read up to the final process.
実施例
以下、本発明の一実施例について、第1図、第2図とと
もに、第3図、第4図における部分と同一部分について
は同一番号を付して説明を省略し、相違する点について
のみ説明する。Embodiment Hereinafter, regarding an embodiment of the present invention, parts that are the same as those in FIGS. 1 and 2, as well as in FIGS. 3 and 4 will be given the same numbers and explanations will be omitted, and differences will be omitted. I will only explain.
すなわち本発明においては、半導体基板1上に形成され
た素子形成領域5内の1個の素子領域内に第1の識別記
号2Aを該印し、さらに金属膜3上に第2の識別記号2
Bを該印するものである。That is, in the present invention, the first identification symbol 2A is marked in one element region in the element formation region 5 formed on the semiconductor substrate 1, and the second identification symbol 2A is further marked on the metal film 3.
B is marked as such.
第2図は、識別記号2A、2Bの位置付近を拡大して示
したものであり、識別記号2A、2Bは1個の素子領域
内に刻印されており、分割線6によって損傷されるもの
でないことがわかる。FIG. 2 shows an enlarged view of the vicinity of the positions of the identification symbols 2A and 2B, which are engraved within one element area and are not damaged by the dividing line 6. I understand that.
つぎにその製造方法(該四方法を含む)を説明する。写
真印刷技術を用いて、半導体基板1上の1個の素子領域
内に第1の識別記号2Aを刻印する。刻印後、その半導
体基板1上に金属膜3を蒸着する。さらに、その金属膜
3上に第1の識別記号2Aと同じ位置に同じ形の第2の
識別記号2Bを第1の識別記号2Aと同じ方法で重ねて
刻印し、その後上面に最終保護膜4を設ける。そして拡
散工程を終了した半導体基板1は、分割線6に沿って素
子単位ごとに切断、分割される。なお、第2の識別記号
以降の刻印は、半導体装置の製造工程において金属膜が
設けられるごとに施され、かつ識別記号の位置は前段階
の識別記号の位置と異なる他の1個の素子領域内であっ
てもよい。Next, the manufacturing method (including these four methods) will be explained. A first identification symbol 2A is engraved within one element region on the semiconductor substrate 1 using photo printing technology. After marking, a metal film 3 is deposited on the semiconductor substrate 1. Furthermore, a second identification mark 2B having the same shape as the first identification mark 2A is stamped on the metal film 3 in the same position as the first identification mark 2A in the same manner as the first identification mark 2A, and then a final protective film 4 is engraved on the upper surface. will be established. After completing the diffusion process, the semiconductor substrate 1 is cut and divided into element units along the dividing line 6. Note that the engraving after the second identification mark is performed every time a metal film is provided in the manufacturing process of the semiconductor device, and the position of the identification mark is different from the position of the identification mark in the previous stage in another element region. It may be within.
上記のように本実施例によれば、工程中宮に識別番号を
確認でき、また最終蒸着された金属膜3上にも第2の識
別記号2Bが刻印されており、最終保護1114が透明
であるため、拡散工程終了後も鮮明に認識できる。また
、識別記号2A、2Bはいずれも1個の素子領域内に刻
印されているため、素子単位に分割するために溝切りが
施されたあとでも識別記号は損傷されることがなく、そ
の識別確認は容易である。As described above, according to this embodiment, the identification number can be confirmed on the middle plate during the process, and the second identification symbol 2B is also engraved on the final deposited metal film 3, and the final protection 1114 is transparent. Therefore, it can be clearly recognized even after the diffusion process is completed. In addition, since the identification symbols 2A and 2B are both engraved within one element area, the identification symbols will not be damaged even after grooves are cut to divide them into individual elements. Confirmation is easy.
発明の効果
本発明は上記実施例より明らかなように、半導体基板上
および各工程においてその半導体基板上に設けられた金
属膜上の1個の素子領域内に識別記号を刻印するもので
あり、半導体装置の製造工程において、常にその識別記
号の確認が容易であるため、各工程における製品を効果
的に管理できるものである。Effects of the Invention As is clear from the above embodiments, the present invention imprints an identification symbol on a semiconductor substrate and in one element region on a metal film provided on the semiconductor substrate in each step, In the manufacturing process of semiconductor devices, the identification symbol can be easily confirmed at all times, so that products in each process can be effectively managed.
第1図(a) 、 (b)は本発明の一実施例における
半導体装置の製造方法における半導体基板の平面図およ
び断面図、第2図は同半導体基板における識別記号の位
置付近の拡大平面図、第3図(a) 、 (b)は従来
の半導体装置の製造方法における半導体基板の平面図お
よび断面図、第4図は同半導体基板における識別記号位
置付近の拡大平面図である。
1・・・・・・半導体基板、2A、2B・・・・・・識
別記号、3・・・・・・金属膜、5・・・・・・素子形
成領域。FIGS. 1(a) and (b) are a plan view and a sectional view of a semiconductor substrate in a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is an enlarged plan view of the vicinity of the position of an identification symbol on the same semiconductor substrate. , FIGS. 3(a) and 3(b) are a plan view and a sectional view of a semiconductor substrate in a conventional method of manufacturing a semiconductor device, and FIG. 4 is an enlarged plan view of the vicinity of the identification symbol position on the same semiconductor substrate. 1...Semiconductor substrate, 2A, 2B...Identification symbol, 3...Metal film, 5...Element formation region.
Claims (1)
領域内および前記半導体基板の上面に設けられた金属膜
上の同じく1個の素子領域内にそれぞれ識別記号を1回
以上刻印する工程を含む半導体装置の製造方法。A step of stamping an identification symbol at least once in each element region in an element formation region formed on a semiconductor substrate and in the same element region on a metal film provided on the upper surface of the semiconductor substrate. A method for manufacturing a semiconductor device including:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3999490A JPH03242918A (en) | 1990-02-21 | 1990-02-21 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3999490A JPH03242918A (en) | 1990-02-21 | 1990-02-21 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03242918A true JPH03242918A (en) | 1991-10-29 |
Family
ID=12568484
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3999490A Pending JPH03242918A (en) | 1990-02-21 | 1990-02-21 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03242918A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100732571B1 (en) * | 1999-10-26 | 2007-06-27 | 사무코 테크시부 가부시키가이샤 | Marking method for semiconductor wafer |
-
1990
- 1990-02-21 JP JP3999490A patent/JPH03242918A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100732571B1 (en) * | 1999-10-26 | 2007-06-27 | 사무코 테크시부 가부시키가이샤 | Marking method for semiconductor wafer |
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