JPH03241403A - Electronic equipment - Google Patents

Abstract

PURPOSE:To set a suitable power supply output state corresponding to clock rate and to reduce the output consumption of an electronic equipment by providing a control means to control the output of power to be supplied to circuits constituting this equipment corresponding to the rate of a fundamental operation clock. CONSTITUTION:A power supply voltage control circuit composed of respective elements shown by codes 7-12 is provided in a power supply line directing from a power supply part 1 to respective equipment parts behind a crystal oscillator 2. At the electric equipment controlling the rate of the fundamental operation clock corresponding to a prescribed control condition, the output of the power source 1 to be supplied to the circuits constituting this equipment is controlled corresponding to the velocity of the fundamental operation clock. Thus, the electronic equipment can be obtained so as to reduce the energy consumption of this equipment corresponding to the clock rate.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application J] The present invention relates to an electronic device, particularly a device having a control means for controlling the operation of the device based on a basic operating clock, and controlling the speed of the basic operating clock according to a predetermined control situation. This is used for electronic equipment that is variably controlled depending on the situation.

[Prior Art] Conventionally, as control means for various electronic devices, devices using a circuit such as a microprocessor that controls the device based on a predetermined operating clock are known. The power supply section and operation clock generation section of this type of device are constructed as shown in FIG.

In FIG. 4, reference numeral 1 denotes a power source such as a battery, and this power source supplies power voltage to each part of the device. C.P.
U4 is composed of a microprocessor, etc., and controls the peripheral circuit 6i5 and memory 5 based on a predetermined operating clock, thereby managing the operation of the entire device.

An operating clock for the CPU 4 is generated by a crystal oscillator 2 and input to the CPU 4 via a variable frequency circuit 3.

The variable frequency circuit 3 is used to change the operating speed of the CPU 4 automatically depending on the operating mode of the device or in response to a switch operation or the like.

[Problems to be Solved by the Invention] In the configuration shown in FIG.
Even when the operating clock of the power supply l is changed, the power supply voltage of the power supply l is not particularly controlled. That is, even when the operating clock of the CPU 4 is lowered, the same power supply voltage as when the clock is high-speed is supplied to each part of the electronic device.

If we consider the case where the CPU 4 and the peripheral circuit 6 are CMO 3, etc., it is possible to operate the circuit elements at a low voltage if the operating clock is slow, but the conventional configuration as shown in Fig. 4 In this case, the same power supply voltage is supplied even when the clock is low as when the clock is high, so the CMO5's characteristic of reducing power consumption by lowering the clock cannot be fully utilized, and as a result, unnecessary power is consumed. There was a problem.

An object of the present invention is to solve the above problems and provide an electronic device that can reduce the power consumption of the device in accordance with the clock speed of the control circuit.

[Means for Solving the Problems] In order to solve the above problems, the present invention includes a control means for controlling the operation of the device based on a basic operation clock, and adjusts the speed of the basic operation clock to a predetermined speed. In an electronic device that is variably controlled depending on the control situation, a configuration is adopted in which a control means is provided for controlling the output of power supplied to the component circuits of the device in accordance with the speed of the basic operation clock.

[Operation] According to the above configuration, an appropriate power output state can be set according to the clock speed.

[Example] Hereinafter, the present invention will be described in detail based on the example shown in the drawings. Similar to FIG. 4, FIG. 1 shows the structure of a power supply system and a clock control system of an electronic device. In FIG. 1, the same or corresponding members as in FIG. 4 are given the same reference numerals.

The difference between FIG. 1 and FIG. 4 is that a power supply voltage control circuit consisting of elements 7 to 12 is provided on the power line from the power supply section 1 to each part of the device after the crystal oscillator 2. The other configurations are the same as in FIG. 4.

In Fig. 1, the reference numeral 8 is a transistor, whose emitter collector is inserted in series with the power supply line, and is used to control the current by series regulation and, as a result, to control the power supply voltage supplied to each part of the device to a desired value. It will be done. Control of the conductivity of transistor 8 is controlled by comparator 7.

A constant reference voltage obtained by dividing the voltage of the power supply line by a resistor 12 and a Zener diode 9 is supplied to the input terminal of the comparator 7 . On the other hand, the voltage of the power supply line is connected to the - input terminal of the resistor 11a and llb, 11c or ll.
A voltage value corresponding to the output power supply voltage divided by the series circuit d is input.

Which of resistors 11b-1id to use depends on the switch IO composed of an analog switch or a relay.
determined by

As for the switch IO, the CPU 4 controls the variable frequency circuit 3,
It is switched depending on which of the possible lock speeds is used.

In FIG. 1, reference numeral 13 is a capacitor for smoothing the power output.

In the above configuration, the CPU 4 controls the keyboard and other control systems (included in the peripheral circuit 6, etc.), or
The frequency variable circuit 3 is controlled in accordance with control such as a power save mode automatically selected by the PU 4 itself, and a predetermined operating clock is selected.

The control characteristics of the power supply voltage according to the clock control of the CPU 4 are set as shown in FIG. In other words, if the CPU operating clock is fast, the power supply voltage is increased, and if the clock is slow, the power supply voltage is lowered. Especially when the low speed lock is selected, the power supply voltage is lowered. Power consumption can be kept low.

Assuming that the load on each part of the device is constant, lowering the power supply voltage means lowering the supplied current. In order to perform such control, the resistor 11b-1id
The resistance values of the resistors 11b to 11lid are set in stages so that the higher the clock is, the smaller the resistance value is selected from among the resistors 11b to lid, and conversely, the lower the clock is, the higher the resistance value is selected. The switch 10 may be controlled in conjunction with the control of the frequency variable circuit 3 so that the frequency change circuit 3 is controlled.

As a result, the higher the clock, the higher the base voltage of the transistor 8, and the lower the clock, the lower the base voltage of the transistor 8. As a result, the control characteristics shown in FIG. 2 can be obtained. By controlling the operating clock to a low speed by the CPU 4 as necessary, the power consumption of the device can be kept very low, and if the power supply section 1 is composed of a battery or the like, its consumption can be reduced.

In the configuration shown in FIG. 1, there are three resistors 11b-1id, and an example is shown in which the power supply voltage is controlled in three stages according to the CPU operation clock (not limited to three stages).
The number of b...- is not limited to this, and an appropriate number may be provided depending on the required power consumption control mode.

Since the configuration shown in FIG. 1 is achieved by switching the voltage dividing resistors, the structure is simple and can be implemented at low cost, especially when the number of switching stages of the power supply voltage according to the clock frequency is small.

If the number of switching stages of the power supply voltage depending on the clock frequency is large, a configuration as shown in FIG. 3 may be used. In FIG. 3, a measured value obtained by dividing the power supply voltage by resistors 11e and 11f is applied to one terminal of the comparator 7, and the DA
The CPU 4 controls the power supply voltage by controlling the reference voltage input to the manual input terminal via the converter 14.

The D/A converter 14 connects the output voltage of the power supply line to the resistor 12J.
5 and Zener diode 15 is converted into a voltage value having a magnitude corresponding to a control value inputted from CPU 4 and inputted to comparator 7 . In this case, the CPU 4 controls the D/A converter 14 so that the input voltage at the manual input terminal of the comparator 7 increases as the clock speed increases, thereby achieving the same effect as in the above embodiment. can.

In this case, the selection range of the power supply voltage is the number of stages according to the resolution of the D/A converter 14, so the power supply voltage can be selected more finely than in the above-mentioned embodiment, and control for more fine-grained power consumption reduction can be achieved. It has the effect of being able to do the following.

[Effects of the Invention] As is clear from the above, the present invention includes a control means for controlling the operation of the device based on a basic operation clock, and controls the speed of the basic operation clock according to a predetermined control situation. Electronic equipment that is subject to variable control employs a configuration that includes a control means that controls the output of power supplied to the component circuits of the device according to the speed of the basic operating clock. The power output state can be set, and therefore, when a CMO5 element or the like is used as a circuit element, there is an excellent effect that the power consumption of the device can be significantly reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of the power supply section and clock control system of an electronic device adopting the present invention, FIG. 2 is a timing chart showing the control characteristics of the circuit in FIG. 1, and FIG.
The figure is a block diagram showing different embodiments of the present invention, and FIG. 4 is a block diagram showing the configuration of a conventional electronic device. l-・Power supply unit 2-・-Crystal oscillator 3--frequency variable circuit 4-・CPU5-・-Memory
6-Peripheral circuit 7--Comparator
8-・Transistor 9...Zener diode 10
...-Switch 11...Resistor 12...
-Resistor 13--Capacitor 14...-D/A
Converter 15...Zener diode stiffness-r

Claims (1)

[Scope of Claims] 1) An electronic device having a control means for controlling the operation of the device based on a basic operation clock, and variably controlling the speed of the basic operation clock according to a predetermined control situation, comprising: An electronic device comprising a control means for controlling the output of power supplied to the component circuits of the device according to the speed of a clock.