JPH03239168A - Ultrasonic motor drive system - Google Patents

Abstract

PURPOSE:To increase a drive efficiency of an ultrasonic motor by controlling an drive frequency setting device to output a drive frequency for the muximum drive efficiency of the ultrasonic motor or by controlling a drive voltage setting device to output a drive voltage for the muximum drive efficiency of the ultrasonic motor. CONSTITUTION:An output frequency of a drive frequency setting device 2 corresponds to a drive frequency of an ultrasonic motor and is controlled by an output from a drive condition detector 1. A drive voltage setting device 4 supplies an output from a phase shifting device 3 to the ultrasonic motor after amplifying it to the drive voltage needed for driving the ultrasonic motor. The drive voltage setting device 4 also varies the drive voltage and changes the drive speed of the ultrasonic motor. A drive condition detector 1 watches if the ultrasonic motor is driven in an antiresonance condition and controls the drive frequency setting device 2 by its output so that the ultrasonic motor may be kept driven in an antiresonance condition.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an ultrasonic motor drive device.

[Prior Art] In the past, several systems have been proposed for driving devices for ultrasonic motors.

First, the structure of the ultrasonic motor will be briefly explained with reference to the drawings. FIG. 34 is a sectional view of the ultrasonic motor, in which a rotor base material 100-1 and a sliding material 100-2 form a moving element (rotor), and the rotor base material and sliding material are bonded to each other. has been done. Elastic body 100-3 and piezoelectric body 100-4
are glued together to form a stator. The ultrasonic motor is formed on the mover and the stator in a pressurized contact state.

Next, FIG. 35 is a drawing showing the arrangement of electrodes of the piezoelectric body 100-4. Electrodes 100-4a, 100-4b
are input electrodes, into which AC drive voltages having a mutual phase difference of π/2 are input.

Electrode 100-4c is a common electrode and is connected to ground. 1i pole 10 (14d is called a monitor electrode,
This is a portion of the piezoelectric body that does not contribute to the excitation of the elastic body, and provides an AC output voltage that corresponds to the vibration state of the stator.

The ultrasonic motor 100 is constituted by the rotor base material, sliding material, elastic body, and piezoelectric body described above.

Regarding the configuration and operation of these, please refer to Nikkei Mechanical
19B3.2.28, JP-A No. 541204417, JP-A No. 61251490, etc., the electrode 100-4 of the piezoelectric material is well known, so a detailed explanation will be omitted.
By inputting a driving voltage to a and 100-4b, the piezoelectric body is excited to generate a progressive vibration wave in the elastic body, and the piezoelectric body is brought into pressure contact with the stator by a pressure means (not shown). The movable element is driven.

Conventionally, as a drive device for an ultrasonic motor, the present applicant discloses Japanese Patent Application Laid-Open Nos. 59-204477 and 61-2514.
90 etc. have been proposed. These driving devices are driven by the output voltage of the monitor electrode in the former case;
In the latter case, the ultrasonic motor can be driven stably by controlling the frequency of the drive voltage, that is, the drive frequency, based on the phase difference between the drive voltage waveform input to the piezoelectric element and the output waveform of the monitor electrode. It was designed to do this.

In addition, there are other proposals for driving the ultrasonic motor, for example, as shown in JP-A-61-124275 and JP-A-62-19276, the drive voltage is made variable and the drive is controlled. Alternatively, a method has been proposed in which the drive is controlled by making the drive voltage variable and the drive frequency variable.

However, conventionally proposed driving devices for ultrasonic motors have the problem that although stable driving conditions can be obtained, high driving efficiency cannot always be obtained. This will be explained using a diagram. Figure 2 shows the relationship between drive current, drive speed, and drive efficiency when the drive voltage input to the ultrasonic motor is maintained at 25 (VRMS), the load torque is 900gcm, and the drive frequency is varied. This is what I researched. Starting from the lowest drive frequency, the drive current reaches its highest value at drive frequency F1, decreases to the same <F2, and reaches its lowest value at F2.
At frequencies higher than F2, the driving speed gradually increases.On the other hand, the driving speed is set at the maximum speed at Fl', and is decelerated on the higher and lower frequency sides.Here, usually, the driving speed of the ultrasonic motor The driving frequency band used for driving is higher than the driving frequency Fl'. Looking at the drive efficiency here, the efficiency is highest near the drive frequency F2 where the drive current has its lowest value. As can be seen from this, the drive efficiency is good near the drive frequency F2 among the drive frequencies higher than the drive frequency Fl', and in conventional ultrasonic motor drive devices, the drive frequency is set to the highest drive frequency. Since the driving frequency is not controlled to be efficient, there is a problem in that a high driving efficiency cannot always be obtained.

[Problem B to be Solved by the Invention] The present invention aims to solve the above-mentioned problems, and aims to provide an ultrasonic motor drive device π that increases the driving efficiency of an ultrasonic motor. .

[Means for Solving the Problems] In order to achieve the above object, the present invention constantly detects the driving state of the ultrasonic motor by a driving state detection means,
The drive frequency setting means sets the drive frequency of the ultrasonic motor to a frequency that maximizes drive efficiency, or the drive voltage setting means sets the drive voltage of the ultrasonic motor to a voltage that maximizes drive efficiency. . That is, the present invention provides an ultrasonic motor (100) that utilizes ultrasonic vibration and includes an elastic body and a piezoelectric body that has at least one pair of input electrode sections that excite the elastic body, and a driving frequency of the ultrasonic motor. a drive frequency setting means (2) for setting a frequency signal; a phase shift means (3) for outputting frequency signals having a phase difference with each other based on the output of the drive frequency setting means; and a frequency signal output from the phase shift means. An ultrasonic motor drive device comprising: drive voltage setting means (4) for setting a signal to a voltage necessary to drive the ultrasonic motor; detects the driving state of the ultrasonic motor; A driving state detecting means (1) is provided for inputting an input to a driving frequency setting means, and based on the output of the driving state detecting means, the driving frequency setting means changes the driving frequency of the ultrasonic motor to the ultrasonic motor with respect to the voltage. An ultrasonic motor (100 ), a driving frequency setting means (2) for setting the driving frequency of the ultrasonic morph, and a phase shifting means (3) for outputting frequency signals having a mutual phase difference based on the output of the driving frequency setting means. , a driving voltage setting means (4) for setting the frequency signal output from the phase shifting means to a voltage necessary for driving the ultrasonic motor. The driving state detecting means (1) detects a driving state and inputs its output to the driving voltage setting means, and the driving voltage setting means adjusts the driving voltage of the ultrasonic motor based on the output of the driving state detecting means. is set to a voltage that maximizes the driving efficiency of the ultrasonic motor with respect to the frequency signal.

[Operation] As described above, the inventor's experiments have revealed that in order to drive the ultrasonic motor with high drive efficiency at all times, the drive frequency should be set to the drive frequency F2 in FIG. 2. The drive frequency F2 is the drive frequency at which the drive current is minimum and the drive efficiency is maximum. Here, an equivalent circuit diagram of the ultrasonic motor is shown in FIG. 3. CO is a self-capacitance, and L, C, and R form a series resonant circuit. Here, when the ultrasonic motor is in a resonant state, the series resonant circuit is also considered to be in a resonant state, and in this case, as is well known, the impedance becomes minimum and the current flowing into the equivalent circuit reaches its maximum value. Become. Further, as is well known, the series resonant circuit has an anti-resonant frequency, and when an input of this anti-resonant frequency is applied, as is well known, its impedance becomes maximum and the inflow current becomes a minimum value. From this, it is considered that the drive frequency Fl is the resonant frequency of the ultrasonic motor, and the drive frequency F2 is considered to be the resonance frequency of the ultrasonic motor.
is considered to be the anti-resonant frequency of the ultrasonic motor, since the driving current is the minimum.

From the above, in order to drive the ultrasonic motor with high drive efficiency, it is sufficient to set the driving frequency to the anti-resonance frequency at which the ultrasonic motor is open. That is, as described above, the anti-resonance frequency herein means the frequency at which the drive current is the minimum at the drive voltage at that time when the ultrasonic motor is driven.

As described above, in order to always drive the ultrasonic motor efficiently, it is sufficient to always make the drive frequency of the ultrasonic motor match the anti-resonance frequency. However, if it is difficult to completely match the driving frequency and the anti-resonant frequency, even if the driving frequency does not completely match the anti-resonant frequency, the driving frequency may be set near the anti-resonant frequency, for example, as shown in FIG. 2 above. If the early drive frequency is set within the range of section a, considerably high drive efficiency can be obtained. Here, the range of a may be about maximum efficiency x 0.8.

Naturally, instead of setting it at just one driving frequency point,
The drive frequency may be set in a drive frequency range corresponding to the section a, including the anti-resonance frequency F2.

Further, according to experiments conducted by the present applicant, it has been confirmed that when the drive voltage is changed, the drive frequency F2 at which the drive current of the ultrasonic motor becomes the minimum and the drive efficiency is the highest changes with the drive voltage. Figure 4 shows the driving voltage of 15 (V
This is a graph showing the relationship between drive frequency and drive speed when changing from 35 (VRMS) to 35 (VRMS), and shows that the higher the drive voltage, the faster the drive speed becomes possible. FIG. 5 is a graph showing changes in the resonant frequency F1 and anti-resonant frequency F2 at each drive voltage in FIG. 4. The drive frequency F2 at which the drive current is minimum and high drive efficiency is obtained is As the voltage becomes higher, the frequency changes to lower, and the driving frequency F1 at which the driving current is maximum does not change much even if the driving voltage changes, and Fl and F2
The frequency difference becomes smaller as the driving voltage becomes higher. Although it is not possible to clearly explain this phenomenon at present, it is thought that it is because the resonance characteristics of the ultrasonic motor change depending on the drive voltage. Furthermore, the reason why the drive speed at drive frequency F1, where the drive current is maximum, is not the maximum drive speed is that although the cause is unknown, the operation of the vibrating body becomes unstable near the resonance frequency, and the piezoelectric It is presumed that this is due to variations in the two drive electrodes of the element, positional errors, etc. FIG. 6 is a graph showing the relationship between the driving speed at the driving frequency F2 at each driving voltage shown in FIG. As can be seen from Figure 5, when changing the drive voltage, it is impossible to always obtain high drive efficiency by keeping the drive frequency constant. By setting it to F2, not only stable driving of the ultrasonic motor can be obtained, but also high driving efficiency can always be obtained.

From the above, when driving the ultrasonic motor, if the driving voltage of the ultrasonic motor is made variable and the driving frequency is set to an anti-resonance frequency corresponding to the driving voltage, the driving speed can be changed arbitrarily. In addition, it becomes possible to always drive the ultrasonic motor with high efficiency at an arbitrarily set drive speed.

Further, by changing the drive frequency, the drive speed is made variable and the drive voltage is controlled so that the drive frequency becomes the anti-resonance frequency, whereby high drive efficiency can always be obtained.

Here, a method for always setting the drive frequency to the anti-resonance frequency F2 will be explained.

The first method is possible by controlling the driving frequency using the phase difference φm between the driving voltage waveform of the ultrasonic motor and the output voltage waveform of the monitor electrode 100-4d. To explain this using a diagram, FIG. 7 shows the relationship between the driving frequency, the driving speed, and the phase difference φm. The driving voltage and load torque are the same as in the case of FIG. φm1
is, the phase difference relationship between the drive voltages applied to the two input electrodes of the ultrasonic motor is 1OO-4 in FIG. 35.
This is a case where the phase of the input terminal waveform of a is 90 (deg) ahead of the input voltage waveform of month 00-4b. The phase difference φ
m1 is the phase difference between the drive voltage waveform applied to the input electrode 100-4a and the output voltage waveform of the monitor electrode. The above φm2 has a driving voltage waveform of 100-4b.
This is a case where the phase is 90 (deg) ahead of the drive voltage waveform of a, and the drive direction is the opposite direction to the previous one. The 0 anti-resonance drive frequency F2 is the drive frequency at which the drive efficiency is maximum, and φmll, φm21 is the phase difference at the driving frequency F2. From this figure, φm1-φmll, or
If the drive frequency is controlled so that φm2=φrn21, it is possible to control the drive frequency so that the anti-resonance frequency is satisfied.

Fig. 8 shows the investigation of the phase difference φm at the anti-resonant frequency when the driving voltage is changed, and even if the driving voltage is changed, the driving voltage waveform at the anti-resonant frequency and the output voltage waveform of the monitor electrode are The phase difference φm is approximately constant value φmll, φm
21.

As is clear from this figure, even if the driving voltages are different, there is a phase difference φ between the driving voltage waveform and the output voltage waveform of the monitor electrode.
m has almost the same value φmll at the anti-resonant frequency F2,
Since φrn21 is shown, φml=φmll, φm2=φ
By controlling the drive frequency so that m21 is achieved, the drive frequency can always be set to the anti-resonance frequency, and the ultrasonic motor can be driven efficiently.

As a second method, a method will be described in which the drive frequency is controlled to the anti-resonance frequency by the output voltage VM of the output of the monitor electrode. FIG. 9 is a diagram showing the relationship between the driving frequency and driving speed of the ultrasonic motor and the output voltage VM of the monitor electrode, and the driving voltage and load torque are as shown in FIG. 2 as in the first method. Same as in case. The vM changes depending on the driving frequency, and VMN in the figure is the VMO value at the anti-resonant frequency F2. In this case, VM=VM
If the drive frequency is controlled so that N is achieved, it becomes possible to set the drive frequency to the anti-resonance frequency.

However, even at a drive frequency lower than the drive frequency at which the drive speed of the ultrasonic motor is maximum, VM=VM
Since there may be a drive frequency equal to N, VM-VMN may be set at a drive frequency higher than at least the drive frequency Fl' that is the drive frequency at which the drive speed is maximum. FIG. 1O shows the change in VMN when the driving voltage is changed, and it changes depending on the driving voltage. If the relationship between the drive voltage and the VMN is investigated in advance in this way, the drive frequency can be controlled so that the VM has a voltage corresponding to the drive voltage, so that even if the drive voltage changes, the anti-resonance frequency will always be This makes it possible to drive the ultrasonic motor with a high efficiency.

As a third method, as shown in FIG. 11, the input of an inductive element is connected to the rods 100-4a and 1004b, and driving power is supplied to the ultrasonic motor through the inductive element. In this case, by detecting the phase difference φV between the voltage waveforms at both ends of the inductive element, it is possible to control the driving frequency to be the anti-resonant frequency. 12th
The figure is an example of investigating the relationship between drive frequency, drive speed, and the above-mentioned φV. The driving voltage and load torque are the same as in the case of FIG. However, as will be described later, even if the voltage value VL applied to the inductive element is constant, the driving voltage Vl applied to the input electrode is not constant, so the voltage VL applied to the inductive element is set to 15Vpeak to pea.
k square wave, and the load torque is 90, the same as in the second case.
It is 0gcm. Further, it is necessary to determine the value of the inductive element according to each ultrasonic motor. Here, it was set to 3.9 mH by experiment. As can be seen from this figure, the phase difference φV exhibits φV1 at the anti-resonant frequency F2. From this, it can be seen that the driving frequency should be controlled so that φV=φv1. However, if the driving frequency is changed to F2
As the frequency changes to a lower frequency than
Since there is a driving frequency where the phase difference is 1, it is preferable that the driving frequency is not lower than the driving frequency at which the φV has the maximum phase difference. In addition, the V
If L changes, Vl also changes, so FIG. 13 shows the results of examining changes in the phase difference φvl at the anti-resonant frequency when changing VL. Although not particularly shown here, the change in anti-resonant frequency F2 when VL is changed shows the same change as in FIG. 5, and when VL becomes a high voltage, F2 changes to a low frequency, When VL becomes a low voltage, it changes to a high frequency. From FIG. 13, it can be seen that the VL
Even if φV1 is changed, the phase difference φV between the voltage waveforms at both ends of the inductive element at the anti-resonant frequency remains unchanged.
From 0 or more, which was found to show, the phase shift difference φV=φv
If the drive frequency is controlled to be 1, it becomes possible to always drive the ultrasonic motor with the drive frequency set as the anti-resonance frequency, and high drive efficiency can be obtained.

As a fourth method, similarly to the third method, in the case where driving power is supplied to the two input electrodes of the ultrasonic motor via an inductive side element, the driving power is applied to the inductive element. Even if the voltage value VL of the voltage waveform is constant, the voltage value V of the drive voltage waveform input to the input electrode
It has been found through experiments that l changes depending on the driving frequency.

This is considered to be due to the change in impedance of the ultrasonic motor. When the ultrasonic motor is driven at an anti-resonant frequency, the impedance of the ultrasonic motor is at its maximum as described above, and therefore the drive current flowing into the input electrode is at a minimum, so that the inductive This can be considered to be because the voltage drop across the inductive element is minimized because the current flowing through the element is also minimized.

FIG. 14 shows an example of the results of investigating the relationship between the driving frequency, driving speed, and the Vl. The voltage value VL and load torque applied to the inductive element are the same as in the third method,
The inductive element is 2mH.

When the driving frequency is set to the anti-resonance frequency F2, the symbol (1) above indicates the lowest voltage VIL. FIG. 15 shows the change in VIL when the voltage applied to the inductive element is changed. Since the VIL changes depending on the voltage value applied to the inductive element, By checking the relationship between the applied voltage value VL and VIL, it is possible to set VJ=IL by controlling the drive frequency, and it is possible to set the drive frequency=anti-resonance frequency.

As a fifth method, the driving voltage waveform input to the two input electrodes and the current waveform flowing into the input electrode are detected, and the driving frequency is similarly controlled to the anti-resonant frequency by the phase difference φi. It is possible to do so. This is the first
This is because the driving frequency and the above-mentioned φi exhibit a relationship as shown in FIG.

When the driving frequency becomes anti-resonant frequency F2, φi becomes φ
Indicates iN. Figure 17 shows the change in φiN when the driving voltage is changed.
N indicates a nearly constant value. From the above, it has become clear that if the driving frequency is controlled so that φi=φiN, the driving frequency of the ultrasonic motor can always be set to the anti-resonant frequency.

By using the method described above, it has become possible to control the drive frequency of the ultrasonic motor to an anti-resonance frequency, and it has become possible to always maintain high drive efficiency of the ultrasonic motor.

[Example] FIG. 1 is a schematic configuration diagram of the present invention. N To simply explain, the driving state detecting means 1, the driving frequency setting means 2, the phase shifting means 3, and the driving voltage setting means 4 constitute an ultrasonic motor driving device. The output of the drive frequency setting means 2 is a frequency signal, the output frequency of which corresponds to the drive frequency of the ultrasonic motor, and is controlled by the output of the drive state detection means 1. The phase shifting means 3 divides the output frequency signal of the driving frequency setting means 2 and mutually
A frequency signal having a phase difference of /2 is outputted to the drive voltage setting means 4. The driving voltage setting means 4 amplifies the output of the phase shifting means 3 to a driving voltage necessary to drive the ultrasonic motor and supplies it to the ultrasonic motor.
The driving voltage is made variable to change the driving speed of the ultrasonic motor. The driving state detecting means 1 detects whether the ultrasonic motor is being driven in an anti-resonant state, and uses its output to control the driving frequency setting means 2 as described above, so that the ultrasonic motor is always at an anti-resonant frequency. Control to be driven. The driving state detecting means detects whether the ultrasonic motor is being driven at the anti-resonant frequency, and controls the driving frequency so that it is always at the anti-resonant frequency, thereby changing the driving frequency voltage. To always obtain high driving efficiency even if the driving speed is set to an arbitrary speed.

Next, the present invention will be explained in detail using the drawings.

FIG. 18A shows a first embodiment, in which the drive frequency is controlled to the anti-resonance frequency of the ultrasonic motor by the phase difference φm between the drive voltage waveform of the ultrasonic motor and the output voltage waveform of the monitor electrode. It is a drive device with a When the starting human power is at a high level, the ultrasonic motor is in a driving state, and at a low level, it is in a stopped state. Depending on whether the direction input is high level or low level, the phase difference relationship between the drive voltages applied to the two input electrodes of the ultrasonic motor is reversed, and the drive direction is switched. The drive state detection means 1 includes a waveform shaper 101 and a multiplexer 102.
(hereinafter referred to as MPXI), phase comparator 103 (hereinafter referred to as φ1), resistor 104, capacitor 105, voltage controlled oscillator 106 (hereinafter referred to as V COl), and 16 of 107 to 122.
A first phase-locked loop consisting of a well-known shift register consisting of D flip-flops, a waveform shaper 123, and a multiplexer 124 (hereinafter referred to as MPX2
), multiplexer 125 (hereinafter referred to as MPX3), and oscillation''
:AI 26 and a phase comparator I27 (hereinafter referred to as φ2). The drive frequency setting means 2 includes a resistor 201, a capacitor 202, and a voltage control development expansion 203 (hereinafter referred to as VCO 2).
It consists of The frequency division phase shift means 3 is composed of two D flip-flops 301 and 302 and an EXOR gate 303. The drive voltage setting means 4 includes a variable resistor 401 and a variable output power source 402 that makes the output voltage variable depending on the output voltage of the variable resistor, and two power amplifiers 403 that are supplied with the output of the variable output power source. configured. The power amplifier cuts off its output when the starting input is at a low level, and amplifies and outputs the input when the starting input is at a high level. Inductive elements 5 are connected between the two input electrodes of the ultrasonic motor and the two power amplifiers, respectively. In FIG. 18A, an inductive element 5 is interposed between the input electrode of the ultrasonic motor and the power amplifier 403, but even in such a case, the output voltage VL of the power amplifier is set to a constant value. If so, the relationship between the drive frequency and drive speed, and the phase difference φm1.4m2 between the drive voltage waveform and the output voltage waveform of the monitor electrode will be similar to that shown in Figure 7, and when the output voltage of the power amplifier is varied. The phase difference at the anti-resonant frequency of is also almost constant regardless of the output voltage of the power amplifier as shown in FIG. 8, and if the VL is increased, the anti-resonant The resonance frequency F2 changes to a lower frequency, and if VL is lowered, it changes to a higher frequency. Here, the relationship between FIGS. 7 and 8 will be explained. Now, let's explain that the startup input is low level and the direction input is high level. In this case,
Since the starting input is at a low level, the output of the power amplifier is off, no driving voltage is applied to the input electrode of the ultrasonic motor, and the ultrasonic motor is in a stopped state. The MPXI has a start input connected to a control terminal CTL, and when the CTL is at a low level,
Out of the two inputs, input A is selected and output. , the D flip-flop 302Q output is connected to X9,
The output of the waveform shaper +01 is connected to the 8-man power. As a result, the output of the D flip-flop 302Q becomes the S! of the φ1. It will be connected to the G input. A D flip-flop 1 is connected to the COMP input on one side of φ1.
It is connected to the D input of 07. φ1 is a phase frequency comparator (hereinafter referred to as PFC) which is a well-known phase difference comparator, and its configuration and operation will be briefly explained. FIG. 19 is an example of a circuit diagram of the PFC. J- consists of a flip-flop 128, 129, a NAND gate 130, an inverter 131, 132, a tour gate 133, 134, an inverter 135, and a MOS) run sister 136, 137, and the CP terminal of the flip-flop is connected to the two J-. The SIG input signal is input to COMP, and if the SIG input signal is ahead of the COMP input signal, the MOS run sister 136 is turned on only during the phase difference, and the output of φl is supplied with power. Voltage is output. Conversely, when the COMP input signal is ahead of the SIG input signal in phase, the MOS run sister 137 is turned on only during the phase difference, and 0 (V) is output. When both input signals have the same phase, both MOS transistors 136 and 137 are turned off, and the output is in an insulated state. A resistor 104 and a capacitor 105 constitute a low-pass filter, which integrates the output of φl and is connected to the VCOI. Their relationship is shown in FIG. 20. A dashed-dotted line in the figure indicates that the output of the PFC is in an insulated state. Note that the pFC also operates based on the frequency difference between two manual input signals, and when the SIG input signal has a higher frequency than the COMP input signal, it increases the output voltage of the low-pass filter and causes the COMP input signal to rise. If the frequency is higher than that of the SIG input signal, it operates to lower the frequency. The VCOI is a well-known voltage 11J oscillator, and its output is a frequency signal, and the relationship between the input voltage and the output frequency is as shown in FIG. When the input voltage becomes high, the output frequency changes to a high frequency, and when the input voltage becomes low, the output frequency changes to a low frequency.Bg■CO
The output frequency signal of I is applied to the clock terminals G of the D-flimb flow controllers 107 to 122 constituting a well-known shift register.
connected to K. The shift register divides the output frequency signal of the vcoi into a frequency of 1/(number of D flip-flops x 2), that is, 1/32 here, as is well known. As a result, the first phase-locked loop performs a feedback operation so that the frequency signal of the COMP input becomes equal in frequency and phase to the frequency signal of the SIG input of φ1. Therefore, the output frequency of vcoi is the SIG input frequency of φ1, which in this case is 32 times the frequency of the Q output of 302, and from the Q and Q of each of the D flip-flops constituting the shift register, as shown in FIG. As shown in , the D input of the above 107 has the same frequency and the same phase as the S G input, and the Q output of the J 107 is 360/32.
= 11.25 (deg) delay phase, and from then on,
The 107Q output has a phase delay of 11.25 (deg) to the 122Q output, and the 107Q output has a phase delay of 180 (deg).
), and the subsequent Q output is similarly 11.25
The phase becomes delayed by (deg).

Next, the direction input is connected to the control terminal CTL of MPX2, and the A input and the B input are selectively outputted depending on the driving direction of the ultrasonic motor. MPX3 is a well-known two-system multiplexer, and its start input is connected to the control terminal CTL, the IA large input is connected to the output of the 81.26 oscillation, and the 2B input is connected to the output of MPX2. For 2A input, the above D
A flip-flop 302Q is connected, and the IB large input is connected to the output of the waveform shaper 123. In this state, since the CTL is at a low level, IA and 2A are selected and output. As a result, the SI of φ2
The output of the oscillator 126 is input to the G input, and the output of the D flip-flop 302Q is input to the COMP input. φ
2 is a PFC having the same configuration as t1. The φ2
The output is input to the VCO 2 via an integrator composed of a resistor 201 and a capacitor 202. The VcO2 is a voltage controlled oscillation crystal similar to the Vcot, but its output frequency band is different. The output frequency signal of the VCO2 is connected to the clock terminal CK of a well-known phase frequency divider composed of D flip-flops 301 and 302, and the Q and Q outputs of the two D flip-flops are connected to the well-known , each has a phase difference of 90 (deg), and the VC
An output signal with a frequency of 174 of the output frequency of O2 is obtained. Here, the 301Q output is 9
0 (d e g) The oscillator 1 operates as a second phase-locked loop due to the leading phase of 0 or more, and operates in the same manner as the first phase-locked loop.
26 and the D flip-flop 302Q output have the same frequency and phase, and the output frequency of the VCO 2 is four times the frequency of the oscillator, and the output frequency of the VCO 2 is four times that of the oscillator.
The Q output of 302 has the same frequency as the output frequency of the oscillator 126. Here, the oscillation H126 is a means for setting the drive frequency of the ultrasonic motor at the time of startup, and it is sufficient to set it to a drive frequency that allows startup.The Q output of the D flip-flow knob 302 is well known. is connected to one of the power amplifiers 403 of the same <301(7)Q output L
i EX is connected to one input terminal of the OR gate 303, and the other input is connected to the direction input. As a result, if the direction input is at a high level, the output of the EX OR gate 31 becomes an inverted signal of the Q output of the above-mentioned 301, and if the direction input is at a low level, it is directly transmitted to the power amplifier 403.
is output to the other one, and switches the drive direction of the ultrasonic motor. The power amplifier 403 has its output cut off when the starting input is at a low level, and amplifies and outputs the input when the starting input is at a high level. The power amplifier is supplied with the output of a well-known variable output power source 402 whose output voltage is controlled by a variable resistor 2S401, and by varying the output voltage of the variable output power source with the variable resistor, the power amplifier is The output voltage of the amplifier ■I is varied. The outputs of the power amplifiers are each connected to the two input TL poles of the ultrasonic motor via an inductive element 5, but at the moment the starting input is at a low level, so the ultrasonic motor has no drive voltage. is not applied, so it is not driven.

From this state, when the output voltage of the variable output power supply 402 is set by the variable resistor r&401 and the startup input is set to high level, the power amplification! 1s403 starts outputting,
Application of a drive voltage to the ultrasonic motor is started, and at the same time driving is started at a drive frequency equal to the output frequency of the oscillation iA 1 26, the selection of the inputs of the MPXI and MPX3 is switched. Since the B input of MPXI is selected, the output of the IrI waveform shaper 101 is selected. The waveform shaper converts the drive voltage waveform applied to the input electrode 100-4a into a square wave of a required size and outputs the square wave. As a result, the first phase-locked rope changes the drive voltage waveform input to the input electrodes 1, 00-4a of the ultrasonic motor by the same operation when the ultrasonic motor is stopped. The shift registers 107 to 122 operate in synchronization, and a frequency signal having the same frequency as the driving voltage waveform and a fixed phase difference is obtained from the shift registers 107 to 122. Here, the first phase-locked rope is at the same frequency as the output frequency of the oscillator when the ultrasonic motor is stopped, so it can quickly follow the drive voltage waveform when starting. In the second phase-locked rope, the Ml" The shaper 123 converts the output voltage waveform of the monitor electrode f into
Convert it to a square wave of the required size and output it. The output of the MPX2 will be connected to the COMP manual power. The MPX 2 selects and outputs the A input when the direction is low level and the B input when the direction is high level. In this embodiment, since the direction input is currently at a high level, the drive voltage waveform applied to the pole 100-4a is 100-4a.
The driving voltage waveform applied to 4b has a leading phase. For this reason, the A input of MPX2 is
In the figure, the output of the shift register corresponding to φm21 is connected, and the output corresponding to φmll is connected to the B input. Thereby, the second phase-locked rope is configured to perform a feedback operation so that the frequency signal corresponding to φmll or φm21 and the output waveform of the monitor electrode are in the same phase. If there is no signal that completely matches φmll,2], fairly good driving efficiency can be obtained by selecting the output signal of the nearest shift register. Alternatively, the number of D flip-flop knobs constituting the shift register may be increased to increase the number of phase divisions. As a result, φ2 is equal to the output waveform of the monitor electrode, the drive voltage waveform, and φmll. , or a frequency signal having a phase difference of φm210. The M
Since the direction input of PX2 is currently at a high level, the B input is selected, and a frequency signal having a phase difference of φmll from the drive voltage waveform of 100-4a is output. Therefore, in the output of φ2, the output waveform of the monitor electrode is delayed in phase than the frequency signal corresponding to φmll, that is, in FIG. If the frequency is higher than V, the output voltage of the low-pass filter decreases and V
The output frequency of CO2 changes to a lower frequency, and the drive frequency naturally changes to a lower frequency, and the anti-resonance frequency F
Approaching 2. Therefore, the phase difference φml changes in the direction of decreasing.At this time, since the first phase-locked loop always operates in synchronization with the drive voltage waveform, even if the drive frequency changes, the From the output of MPX2, a frequency signal whose phase differs from the driving voltage waveform by φmll continues to be obtained. Due to this operation, the drive frequency becomes equal to the anti-resonance frequency, and the drive voltage waveform and φm
When the phase difference between the frequency signal having a phase difference of ll and the monitor electrode output waveform disappears, the output of φ2 becomes insulated, the output of the low-pass filter stops changing, and the driving frequency stops changing, On the other hand, if the output voltage waveform of the monitor electrode has a leading phase, φml<φm
l! Therefore, the drive frequency is lower than the anti-resonance frequency, and the SIG input of φ2 is COMP
Since the phase leads the input, the output outputs the power supply voltage for a period according to the phase difference, so the output frequency of vC02 changes to a high frequency, and the drive frequency changes to a high frequency. Therefore, φm1 changes in the direction of increasing, and the driving frequency approaches the anti-resonant frequency, and then the driving frequency becomes equal to the anti-resonant frequency, and the frequency signal and monitor voltage waveform corresponding to φmll are When they become in phase, the output of φ2 becomes insulated, the drive frequency stops changing, and the drive frequency becomes the anti-resonance frequency. Through such an operation, the driving frequency is controlled to be the anti-resonant frequency. This situation is shown in FIG. 23. Note that φl and φ2 may use other types of phase comparators to form a phase-locked loop.

When the output voltage of the variable output power supply 402 is changed by the variable resistor 401, the anti-resonance frequency changes and a phase shift occurs between φmll and φml, so that the first and second phase-locked loops performs the operation described above, controls the drive frequency setting means 2 so that the drive frequency becomes the anti-resonance frequency, and always drives the ultrasonic motor with high drive efficiency.

When the directional human power is set to a low level and the drive direction is changed, the MPX2 selects and outputs the B input, and as shown in FIG.
In order to selectively output the frequency signal corresponding to φm21 in FIG. 8, the same operation as described above is performed,
The drive frequency is controlled to be equal to the anti-resonance frequency.

Next, an example of controlling the driving frequency within the range a including the antiresonance frequency shown in FIG. 2 will be described in 18B.
This will be explained using figures. Note that only the parts that are different from FIG. 18A will be illustrated and explained.

The only difference from FIG. 18A is the drive state detection means 1. The first phase-locked loop described above is omitted because it is the same. Therefore, the first phase-locked loop and the multiplexer 140 (MP
X4), D flip-flops 141 and 142, a well-known analog multiplexer 143, an analog multiplexer 144, a variable resistor 145, and the waveform shaper 123 constitute the anti-resonance state detection means 1.
The MPX4 is similar to the MPX3, and has a direction input connected to the control terminal CTL, and when the direction input is at a low level, selects and outputs the IA and 2A inputs, respectively.
When the direction input is at a high level, the IB and 2B inputs are selected and output. When section a in FIG. 2 corresponds to FIG. 7, the corresponding phase differences on the low frequency side and high frequency side in φml and φm2 are respectively expressed as φm12. φm
13, φm22, and φm23. The IA large input, φm
22, 2A input, φm23, IB large input, φm1
2, the 2B input connects the output of the shift register corresponding to φm13. The two outputs of the MPX4 are each connected to the D input of the D flip-flop, and the output of the waveform shaper 123 is connected to the clock terminal CK of the D flip-flop. The Q output of each of the D flip-flops is connected to the control terminal C of MPX5.
Connected to TLI and CTL2. H Pig MPX5 is
When CTLI and CTL2 are both low level, select the A input, when CTLI is high level and CTL2 is low level, select the B input, and when both CTLI and CTL2 are high level, select the C input. Select and output. The M
The A input of PX5 is connected to the power supply, and the 8-power input is in an isolated state. C human power is connected to 0■. AiM
The output of PX5 is connected to the B input of MPX6, and the output of variable resistor 145 is connected to the A input of the MPX.
6 is connected to the drive frequency setting means 2, and the output of the MP
A starting input is connected to the control terminal CTL of X6, and when the starting power is at a low level, the 6 inputs are selected, and when the starting power is at a high level, the B input is selected and output. When the startup input is low level, MPX6 selects and outputs six inputs, so
By varying the variable resistor 145, it is possible to vary the output frequency of the drive frequency setting means 2, and the variable resistor 145 is adjusted so that the drive frequency is such that the ultrasonic motor can be started. Set it. Here, as in the case of the explanation of FIG. 18A, when the direction signal is set to a high level and the starting human power is set to a high level to drive the ultrasonic motor, the MPX 6 selects the B input. Furthermore, since the CTI terminal of the MPX4 is at a high level, the IB and 2B inputs are selected and outputted, respectively. As a result, the D input of the D flip-flop 141 has 4
The frequency signal corresponding to m12 is applied to the D flip-flop 14.
A frequency signal corresponding to φm13 is input to the D input of No.2. On the other hand, since the output of the waveform shaper 123 is connected to the CK terminal, it is possible to determine whether the frequency signal input to each D input has a lead phase or a lag phase compared to the output voltage waveform of the monitor electrode. It will be possible. If the D input is ahead of the output waveform of the monitor electrode in phase, each output will be at a high level, and if it is behind the output waveform, the output will be at a high level.
becomes low level. When the Q output of 141 and the Q output of 142 are both at high level, the driving frequency is higher than the above-mentioned section a, so the MP
Since X5 selects and outputs the C input, the input voltage of the VCO2 decreases, so the drive frequency changes to a low frequency and approaches the section a.
When the output is high level and the Q output of 142 is low level, the driving frequency is within the range a. In this case, since the MPX5 selects the isolated B input, the input of the C02 does not change and the drive frequency is maintained. When both Q outputs are at a low level, the driving frequency is lower than that in section a.

In this case, MPX5 selects the A input, so the V
The input voltage of CO2 increases and the driving frequency changes to a higher frequency. As a result, the driving frequency is the section a
change towards. In this way, when the drive frequency is higher or lower than the drive frequency included in the section a, the drive frequency is controlled to be the drive frequency of the section a, and the drive frequency is the same as the drive frequency of the section a. Then, the drive frequency will be maintained. When the drive direction signal is set to low level, the MPX4 selects and outputs the IA and 2A inputs, and performs the same operation.

In this way, the driving frequency is always controlled to fall within the section a that includes the anti-resonant frequency, and high driving efficiency can be obtained.

The variable output power source 402 may be configured with a variable output DC/DC converter. An example of this is shown in FIG.
Briefly, the output voltage of the DC/DC converter is divided by resistors 410 and 411, the output voltage of the reference voltage source 413 is divided by the variable resistor 412, and the voltage comparator 409 compares the output voltage with the set voltage. If the voltage has reached the reference voltage, the output of the oscillator 415 is stopped by the AND gate 414, and the switching transistor 406
If the reference voltage has not been reached, the switching transistor is switched by the output of the expander via the AND gate;
The output voltage of the DC/DC converter is increased until it becomes equal to the reference voltage. Here, the variable resistor 412
Therefore, by changing the reference voltage, the output voltage can be easily varied. By using such a DC-DC converter, a variable output power source can be easily configured.

Alternatively, similar results can be obtained by replacing the variable output power supply with a fixed ratio cuff i1 source and controlling the amplification degree of the power amplifier.

Alternatively, a method as shown in FIG. 25 may be used. This uses the variable output type a402 as a fixed output power source 421, and sets the ratio of the on time and off time of each of the power transistors 418 and 419 to the duty ratio control means 417.
This is a method in which the drive voltage is varied by variable control, and the drive speed is made variable. The transistor is driven by the output frequency signal of the duty ratio control means 417, and the on time of the transistor is at most 5.
Set to 0% or less. The duty ratio control means 41
The control terminal voltage input to the control terminal of 7 is controlled by the variable resistor 42.
0, if the voltage is low, the on-time ratio is small (
Therefore, the drive voltage becomes a low voltage. Conversely, if the voltage is set to a high voltage, the on-time ratio becomes large and the drive voltage becomes a high voltage. When the driving frequency is changed while keeping the on-time ratio constant, the driving frequency at which the maximum driving efficiency is obtained is the same frequency as the anti-resonant frequency, as described above. Further, when the duty ratio control means changes the on-time ratio of the transistor, the anti-resonant frequency changes to a lower frequency as the on-time ratio increases, and the drive at the anti-resonant frequency Regarding the relationship between speeds, the larger the on-time ratio, the higher the drive voltage and the higher the speed. Therefore, by varying the voltage value input to the control terminal by the variable resistor 420, the drive speed can be arbitrarily set. The drive frequency can be varied, and high drive efficiency can be obtained by the drive frequency control method described above.

Note that the driving voltage of the ultrasonic motor may be too high or
If it is too low, problems such as abnormal noise and unstable operation may occur. In order to prevent the occurrence of such inconvenience, it is preferable to set an upper limit and a lower limit of the drive voltage in the drive voltage setting means 4. The upper and lower limits of the drive voltage may be determined by experiment. The output voltage VM of the monitor electrode generates an output proportional to the amplitude of the stator, so as the drive voltage increases, VM naturally increases, and as the drive voltage decreases,
VM becomes smaller. This relationship may be used to control the drive voltage setting means 4. When the VM reaches a preset maximum voltage value, the drive voltage setting means 4 is configured to prevent the drive voltage from increasing any further.
When VM reaches a preset minimum voltage value, the drive voltage setting means 4 may be controlled to prevent the drive voltage from changing below that value.

Naturally, in the drive voltage setting means, instead of a variable resistor for setting the drive voltage, a speed detection means such as a tacho generator or a pulse encoder is set on the mover of the ultrasonic motor, Comparing and calculating a reference speed signal corresponding to the desired speed with the output of the speed detection means,
By controlling the drive voltage by the drive voltage setting means based on the output, feedback control to easily obtain an arbitrary drive speed becomes possible.

FIG. 26 is a diagram showing the timing of the operation of the circuit shown in FIG. 25.

Next, a second embodiment will be briefly described using FIG. 27. The second embodiment is an example in which the drive frequency of the ultrasonic motor is controlled to an anti-resonance frequency by the output voltage of the monitor electrode 100-4d. Since the parts are the same as those in the first embodiment, illustration thereof is omitted. The driving state detecting means includes a monitor voltage detecting means 150, a driving voltage detecting means 151, and a well-known error amplifier 152. The monitor voltage detection means 150 is the monitor 1!
The output frequency voltage of 8iloO-4d is converted to direct current and output at an appropriate output level. The drive voltage detection means 15
1 is the variable output 11it? ! The output voltage of 402 is detected and converted to an appropriate level. The error amplifier 1
Reference numeral 52 receives the outputs of the monitor voltage detection means and drive voltage detection means, and amplifies and outputs the difference between the two. Here, since an inductive element is interposed between the power amplifier and the human-powered electrode of the ultrasonic motor, even if the output of the variable output power source is constant, the voltage applied to the input electrode varies depending on the driving frequency. Since the voltage value of the drive voltage changes, the output voltage of the variable output power source is detected.

Alternatively, the voltage at the variable output terminal of the variable resistor 401 may be detected. Of course, if the inductive element is not present, the driving voltage may be detected. Even when the inductive element is interposed between the power amplifier and the input electrode, the relationship between the output voltage of the variable output power source and the output voltage of the monitor electrode at the anti-resonant frequency is the same as in the case of FIG. It will be similar. In other words, as the output voltage of the variable output power supply increases, the monitor electrode output voltage VMN at the anti-resonance frequency increases. This relationship is shown in FIG. 28. To briefly explain the operation of the drive state detection means, the relationship between the output voltage of the drive voltage detection means and the output of the monitor voltage detection means is shown in FIG. In other words, the output voltage of the drive voltage detection means with respect to the output voltage of the variable output power supply matches the output of the monitor voltage detection means with respect to the VMN at the output of the variable output power supply. The error amplifier compares the output of the drive voltage detection means and the output of the monitor voltage detection means, and if the drive frequency is higher than the anti-resonance frequency, the monitor voltage detection means Since the output of the error amplifier becomes a lower voltage than the output of the drive voltage detection means, the output voltage of the error amplifier decreases, the drive frequency changes to a lower frequency, and the output voltage VMN of the monitor electrode increases. Conversely, when the drive frequency is lower than the anti-resonance frequency, the output of the monitor voltage detection means becomes a higher voltage than the output of the drive voltage detection means, the output voltage of the error amplifier increases, and the drive The frequency changes to a high frequency, and the output voltage VMN of the monitor electrode
By such an operation, the drive frequency setting means 2 is controlled so that the outputs of the drive voltage detection means and the monitor voltage detection means match, and as a result, the drive frequency is reversed. Controlled to match the resonant frequency. In the case of FIG. 28, the relationship between the output of the variable output power supply and the VMN is approximately linearly proportional, so even if the driving speed is changed by the variable resistor, it is easy to It is possible to control the driving frequency to the anti-resonant frequency.

Furthermore, even if the relationship between the output of the variable output power supply and the VMN does not change linearly, it is possible to easily adjust the drive frequency to anti-resonance by examining the relationships shown in Figures 28 and 10 through experiments in advance. It is possible to control the frequency.

Next, as a third example, when an inductive element is connected in series between a power amplifier and the input electrode of the ultrasonic motor, the voltage waveform across the inductive element, that is, the power amplifier An embodiment in which the drive frequency is controlled to be an anti-resonance frequency based on the phase difference between the output voltage waveform and the drive voltage waveform will be described with reference to FIG. 29.

FIG. 29 is different from FIG. 18A described in the first embodiment.
The drive state detection means 1 is different, and the other parts have the same configuration. To explain the difference, waveform shaper 1
The input of 01 is connected to the output of said power amplifier that supplies power to input 1iFi 100-4a, and the input of waveform shaper 12
No. 3 input is connected to the input electrode 100-4a. In this embodiment, unlike the first embodiment, the phase difference between the voltage waveforms at both ends of the inductive element does not change by switching the drive direction, so MPX2 is omitted. The operation when the starting input is at a low level and the ultrasonic motor is in a stopped state is the same as in the first embodiment. When the starting input is set to high level and the ultrasonic motor is started, a driving voltage is applied to the ultrasonic motor using the output frequency of the oscillation type 126 as the driving frequency, and the inputs of MPXI and MPX3 are set to B, IB, and 2, respectively.
Can be switched to B input. The first phase long droop operates in synchronization with the output voltage waveform of the power amplifier, and is a D flip-flop.

107 of the shift register consisting of blocks 107 to 122
The input waveform of the D input of the waveform shaper IO1 operates so as to be in the same phase as the output waveform of the waveform shaper lO1.
As explained in the embodiment, a frequency signal with a specific phase difference can be obtained.

An output signal corresponding to φV1 in the 121D is selected from among the frequency signals and connected to the IB large input of the MPX3. For cases where there is no completely matching signal,
This may be done in the same manner as in the first embodiment. 2B of said MPX3
The output of the waveform shaper 123 is connected to the input. As a result, the second phase long droop becomes the φv1
It operates so that there is no phase difference between the frequency signal corresponding to the waveform and the output waveform of the waveform shaper 123, that is, the drive voltage waveform applied to the input electrode 100-4a.

For example, if the output waveform of the waveform shaper 123 is ahead in phase than the frequency signal corresponding to φv1, φV
1, and the drive frequency is higher than the anti-resonance frequency, but in this case, the phase comparator φ2 outputs 0 according to the phase difference, so the low-pass The output voltage of the filter decreases, and the driving frequency changes to a lower frequency and approaches the anti-resonance frequency. When the two phases match, the φ2
The output of the low-pass filter becomes insulated, the output voltage of the low-pass filter does not change, and the driving frequency is maintained at the anti-resonant frequency. Conversely, when the drive voltage waveform is delayed in phase than the frequency signal corresponding to φv1, φV
>φV1, and the driving frequency is lower than the anti-resonance frequency. In this case, the φ2
Since the output of the low-pass filter outputs a power supply voltage according to the phase difference, the output voltage of the low-pass filter increases and the driving frequency also changes to a high frequency. When both phases match, as described above, the output voltage of the low-pass filter will be held at that point, and the drive frequency will be held at the anti-resonant frequency. Also, while driving,
Even if the anti-resonance frequency fluctuates due to environmental changes, etc., the driving frequency is always controlled to be the anti-resonance frequency by the same operation.

Next, as in the third embodiment, when driving the ultrasonic motor by connecting an inductive element between the power amplifier and the input electrode of the ultrasonic motor, the driving frequency can be adjusted by changing the driving voltage. The fourth example of controlling to the anti-resonant frequency is shown in the 30th example.
This will be explained using figures.

FIG. 30 is omitted because the frequency division phase shift means 3 and drive voltage setting means 4 are the same as those in FIG. 18A in the first embodiment. The driving state detecting means 1 and the driving frequency setting means 2 each include an A/D converter 160, a microcomputer (CPU) 161, and a programmable oscillator (PO3C) 162. Said C
The PU receives the input 11f by the A/D converter.
The driving voltage waveform applied to t8ilOO-4a is received as digital data. The PO3C 162 is connected to the CPU 161 via a bus, and the output frequency is determined by instructions from the CPU. The driving frequency will be controlled by the CPUI 61. here,
The CPU 161 sets the output frequency of PO5C162 to
The voltage is changed little by little so that the voltage value of the drive voltage waveform received from the A/D converter 160 becomes the lowest value.
If PO3C is controlled, the voltage value Vl of the drive voltage waveform will be set to VIL in FIG. 14, and at that time, the drive frequency will be controlled to the anti-resonance frequency.

Although not shown, the voltage value VL applied to the inductive element is detected by the CPU by providing another A/D converter, and the value of VIL is determined from the relationship shown in FIG. Then, the P0SC may be controlled by the CPU so that the driving frequency is such that the VTL corresponding to I at that time is obtained.

Next, as a fifth embodiment, a case will be described in which control is performed using a phase difference between the current flowing into the input electrode and the drive voltage waveform. In this case, as shown in FIG.
In the case of the first embodiment, a current detection element 170 such as a Hall element is attached to the wiring part connecting the pole and the power amplifier, or the inductive element, and the waveform of the current flowing into the input electrode is detected. By a method similar to that, the phase difference φ in FIG.
It is only necessary to control the driving frequency so that 1 becomes φiN. In this case, the phase difference φi does not change depending on the driving direction, so there is no need to switch the signal corresponding to φiN depending on the driving direction. , MPX2 are omitted. 171 is an amplifier for the output of the Hall element;
Its output is connected to waveform shaper 123. The operation is the same as in the embodiment described above, so
Omitted.

The sixth embodiment is shown in Figs. 32 and 33. Fig. 32 is a schematic diagram of the configuration. This is an example in which the driving voltage setting means 4 is controlled by the driving state detecting means 1 to make the driving frequency coincide with the anti-resonance frequency by varying the driving voltage. The anti-resonance state is detected based on the phase difference φm between the output voltage waveform and the drive voltage waveform. In FIG. 7, if the phase difference at the anti-resonance frequency is φml<φmll or φm2<φm21, the driving frequency is lower than the anti-resonance frequency, so the applied voltage shown in FIG. Due to the relationship between anti-resonance frequencies, if the drive voltage is made higher, the anti-resonance frequency will change to a lower frequency, and even if the drive frequency does not change, the phase differences φml and φm2 will be large. φml=φmll, or φm2=
It can be set to φm21. Conversely, φml>φmll
, or if φm2>φm21, the driving frequency is higher than the anti-resonant frequency, so if the driving voltage is similarly lowered, the anti-resonant frequency changes to a higher frequency and φml, φm2 becomes smaller even if the driving frequency does not change, φml−φmll, or
It is possible to set φm2=φm21, and it is possible to make the driving frequency match the anti-resonance frequency.

Briefly, the drive frequency setting means 2 includes variable resistors 204 and 205 and a well-known analog multiplexer 20.
6 (MPX7), resistor 207 and capacitor 208
and a VCO2, and the VCO2 is the same as in the first embodiment. The MPX7 selects and outputs the output of the variable resistor 204 when the starting input is at a low level, and outputs the output from the variable resistor 204 when the starting input is at a high level.
5 is selected, and the drive voltage detection means 430.5, which will be described later, is selected.
Depending on the output of 431, the C input connected to the power supply or the D input connected to the ground is selected. The variable resistor 204 is a variable resistor for setting the drive frequency at startup, and is set so that V
All you have to do is set the output frequency of CO2. Specifically, when the drive voltage is the lowest, the drive frequency is higher than the drive frequency where the drive speed is the maximum, and when the drive voltage is the maximum, the drive frequency is higher than the drive frequency where the drive speed is the maximum. , it is preferable to set the frequency to be lower than the driving frequency at which the driving speed becomes O. Furthermore, it is even better if it matches the anti-resonance frequency. During driving, since the output of the variable resistor 205 is selected, the driving speed is set by operating the variable resistor. The output of the drive frequency setting means 2 is divided into 1/4 frequency by the frequency dividing and phase shifting means 3 to obtain the drive frequency, so the output frequency of the VCO 2 is set to be four times the drive frequency. I'll keep it.

In the configuration of the drive voltage setting means 4, the first
The difference from Fig. 8A is that a low-pass filter consisting of an analog multiplexer 405 (MPX8), a resistor 407, and a capacitor 408 is connected between the input of the variable output voltage rA402 and the output of the drive state detection means 1. , IMpxa selects and outputs the output of the variable extension resistor 23406 when the starting human power is at a low level, and selects the output of the drive state detection means 1 when the starting input is at a high level. The variable resistor 409 sets the output voltage of the variable output power supply 402 at startup. The drive state detection means 1 operates in the same manner as in the first embodiment, and includes a first phase long loop that forms a frequency signal having a phase difference from the drive voltage waveform by φmll or 4m21; Consisting of an MPX2 that selects and outputs the two frequency signals depending on the driving direction, and a phase difference comparator φ2 that compares the phase difference between the frequency signal selected by the MPX2 and the output voltage waveform of the monitor electrode. . Waveform shaper +01.
123 is the same as in FIG. 18A. Said φ2
The output of the waveform shaper 123 is connected to the SIG input of , and the output of the MPX 2 is connected to the COMP input. As a result, if the aforementioned phase difference φml or φm2 between the drive voltage waveform and the output voltage waveform of the monitor electrode is φml<φrnll or φm2<4m21, the drive frequency is lower than the anti-resonance frequency. Since the SIG input of the φ2 leads the phase of the COMP input, the output of the φ2 outputs the power supply voltage according to the phase difference, and the output voltage of the low-pass filter rises, causing the output of the variable output power supply As the output voltage of the ultrasonic motor increases, the driving voltage of the ultrasonic motor increases, and the anti-resonance frequency becomes
It changes to a lower frequency. In the opposite case, the output of φ2 outputs Ov according to the phase difference, so the output voltage of the variable output power supply decreases, and the drive voltage changes to a low voltage, so the anti-resonance frequency becomes a high frequency. It's changing. When it operates in this manner and φml=φmll, φm2-φm21, the output of φ2 is in an insulated state and the drive voltage is held at a constant value. As a result, the driving frequency is controlled to be equal to the anti-resonance frequency.

Here, if the ultrasonic motor is driven very close to the resonance frequency or at a driving frequency that is significantly different from the frequency originally used for driving, if the driving voltage becomes too high, or if the driving voltage becomes too low, This may cause inconveniences such as generation of abnormal noise and unstable operation. Therefore, the output frequency band of the VCO 2 is at least as long as the driving speed when the output voltage of the variable output power supply is at its minimum. higher than the frequency at which the output voltage of the variable output power source is maximum (corresponds to a drive frequency higher than the drive frequency at which the drive speed is maximum when the output voltage of the variable output power source is maximum and lower than the frequency at which the drive speed becomes O). By doing so, stable operation can be obtained without applying unnecessarily high or low drive voltages.However, it is not possible to create a voltage controlled 21 oscillator that satisfies these conditions. In difficult cases, VC
The output frequency of O2 may be detected and the input of VCO2 may be controlled so as to satisfy the above conditions, or the method shown in this embodiment may be implemented.

Briefly, when the maximum drive voltage obtained by the drive voltage setting means 4 is reached, the VC is adjusted so that the drive frequency does not become lower than the drive frequency at that time.
By controlling the input voltage of O2, it is possible to prevent the drive frequency of the ultrasonic motor from reaching close to the resonance frequency, which would cause unstable operation. For this reason, the voltage comparator 430.431
The above-described drive voltage detection means is formed, and the output of the drive voltage detection means controls M P X' 7! B. The above-mentioned inconvenience is prevented from occurring during driving of the ultrasonic motor. The voltage comparator 430 detects that the output voltage of the variable output IIT source 402 has reached the upper limit value, and due to the change in the output of the voltage comparator, the MPX7
However, by selecting the C input connected to the power supply, the input voltage of VCO2 will increase, the driving frequency will change to a high frequency, and the output voltage of the variable output power supply will become a low voltage. As a result, the driving voltage changes to a lower voltage. As the output of the variable output power supply decreases, the output of the voltage comparator 430 is inverted, and when the MPX7 selects the variable resistor 205 again, the drive frequency changes to a lower frequency, and accordingly , the output of the variable output power supply increases. Due to this operation, when the output of the variable output power supply reaches the upper limit value again,
The above-described operation is repeated to prevent the drive frequency from becoming extremely close to the anti-resonance frequency.

Next, in order to make the drive speed low, even when the drive frequency is changed to a high frequency by the variable resistor 205, the drive voltage setting means sets the lowest drive voltage, so that the drive voltage is When the minimum drive voltage is reached, the input of C02 may be controlled so that the drive frequency does not become any higher. By detecting that the voltage has reached the lower limit value and switching the input of the MPX 7 to select the D input connected to 0 (v), the driving frequency is changed to a low frequency, and accordingly, The driving voltage was increased. By implementing this method, it is possible to prevent unstable operation near the resonant frequency, and also to prevent unstable operation when the driving frequency is high.
Since the operating limit can be set when the drive speed is low, a stable drive state can always be obtained. In the figure, Vu and Vl connected to one input of the voltage comparators 430 and 431 are reference voltage sources that respectively set the upper and lower limits of the output voltage of the variable output power supply.

Furthermore, if the drive voltage of the ultrasonic motor is too high or too low, problems such as abnormal noise and unstable operation may occur. This kind of thing can also be prevented.

In addition, in the embodiments described above, the drive efficiency is controlled to be maximum, but the output torque of the ultrasonic motor is always controlled to be the maximum, or the output of the ultrasonic motor is controlled to be the maximum. It is also possible to control it to the maximum.

The drive frequency at which the output torque of the ultrasonic motor is maximum varies depending on the drive voltage.In order to drive at a drive frequency that can always generate the maximum frequency torque, the drive state detection means determines the drive frequency at which the output torque of the ultrasonic motor is maximum. It is also possible to detect the driving state of the ultrasonic motor and control the driving frequency so that the output torque of the ultrasonic motor becomes the maximum torque.

Further, the driving frequency at which the output of the ultrasonic motor is maximum is usually lower than the driving frequency at which driving efficiency is maximum. The drive frequency at which the output is maximum changes by changing the drive voltage, but by detecting the drive state of the ultrasonic motor by the drive state detection means and controlling the drive frequency, the drive frequency at which the output is maximum is always maintained at the maximum. It is possible to drive the ultrasonic motor with the drive frequency that is the output.

In addition, the drive frequency is not limited to the maximum efficiency, maximum output torque, and maximum output as described above, and it is possible to control the drive frequency to obtain a desired drive state. Further, the desired driving state may be switched and used depending on the case.

In this way, by detecting the driving state of the ultrasonic motor by the driving state detection means, it becomes possible to control the driving state of the ultrasonic motor to a desired state.

Of course, similar control is possible for the embodiment shown in FIG.

[Effects of the Invention] According to the present invention, when driving the ultrasonic motor, always
Not only can high driving efficiency be obtained, but the driving frequency is controlled to an anti-resonant frequency that is shifted from the resonant frequency of the ultrasonic motor, so a stable driving state can always be obtained. In addition, the embodiments of the present invention are not limited to controlling the drive frequency to the anti-resonance frequency; for example, in the first embodiment, the phase difference between the drive voltage waveform and the output waveform of the monitor electrode is It is possible to perform sufficient control even when the value is set, and stable drive can be obtained, and stable drive can be obtained in response to fluctuations in the characteristics of the ultrasonic motor due to changes in environmental conditions, etc.

[Brief explanation of drawings]

FIG. 1 is a block diagram schematically showing an embodiment of the present invention, and FIG. 2 is a diagram showing an example of the relationship between the driving frequency, driving speed, driving efficiency, and driving current of an ultrasonic motor. . FIG. 3 is a diagram showing an equivalent circuit of an ultrasonic motor. Fourth
The figure is a diagram showing an example of the relationship between drive frequency and drive speed when the drive voltage is changed. FIG. 5 is a diagram showing changes in the resonant frequency and anti-resonant frequency of the ultrasonic motor when the driving voltage is changed. FIG. 6 is a diagram showing the change in driving speed at the anti-resonant frequency when the driving voltage is changed. Figure 7 shows the driving frequency, driving speed,
and a graph of the relationship between the phase difference between the drive voltage waveform and the output voltage waveform of the monitor electrode. FIG. 8 is a diagram showing changes in the phase difference between the drive voltage waveform and the output voltage waveform of the monitor electrode at the anti-resonance frequency when the drive voltage is changed. FIG. 9 is a diagram showing the relationship between drive frequency, drive speed, and output voltage of the monitor electrode. FIG. 1O is a graph showing the change in the output voltage of the monitor electrode at the anti-resonant frequency when the driving voltage is changed. FIG. 11 is a diagram in which an inductive element is connected to an input electrode of a piezoelectric body constituting an ultrasonic motor. FIG. 12 is a diagram showing an example of the relationship between drive frequency, drive speed, and phase difference between voltage waveforms at both ends of an inductive element. FIG. 13 is a graph showing changes in the phase difference between the voltage waveforms across the inductive element at the anti-resonance frequency when the voltage applied to the inductive element is changed. FIG. 14 is a graph showing an example of the relationship between drive frequency, drive speed, and voltage applied to the input electrode of the ultrasonic motor when drive power is supplied through an inductive element. FIG. 15 is a diagram showing changes in the applied voltage in FIG. 14 when the voltage value applied to the inductive element is changed at the anti-resonance frequency. Figure 16 shows
7 is a graph showing the relationship between drive frequency, drive speed, and phase difference between the drive voltage waveform and the current waveform flowing into the input electrode. FIG. 17 is a graph showing the relationship between the drive voltage and the phase shift difference of the inflow current at the anti-resonance frequency when the drive voltage is changed.
It is a figure showing an example of. FIG. 19 is a diagram showing an example of a circuit diagram of a phase frequency comparator. FIG. 20 is a diagram showing the operation of the phase frequency comparator. Figure 21 shows
FIG. 3 is a diagram showing the relationship between the input voltage and output frequency of a voltage controlled oscillator. FIG. 22 is a timing chart illustrating the operation of the shift register. Figure 23 shows the 18th
3 is a timing chart showing the operation of the embodiment shown in FIG. FIG. 24 is a diagram showing an example of a circuit diagram of a variable output power supply. FIG. 25 is a circuit diagram showing an example of drive voltage setting means. FIG. 26 is a timing chart showing the operation of the circuit of FIG. 25. Figure 27 shows the second
It is a figure showing an example of. FIG. 28 is a graph showing the relationship between the output voltage of the variable output power source and the output voltage of the monitor electrode at the anti-resonant frequency in the second embodiment. FIG. 29 is a diagram showing the third embodiment. FIG. 30 is a diagram showing the fourth embodiment. FIG. 31 is a diagram showing the fifth embodiment. Figures 32 and 33 are
It is a figure showing a 6th example. FIG. 34 is a sectional view of the ultrasonic motor, and FIG. 35 is a diagram showing the arrangement of piezoelectric electrodes. [Explanation of symbols of main parts] ■・・・・・・・・・Drive state detection means 2...
...... Drive frequency setting means 3...
. . . Phase shifting means 4 . . . Drive voltage setting means 100.
・・・・・・Ultrasonic motor

Claims (2)

[Claims] (1) An ultrasonic motor (100) that uses ultrasonic vibration and includes an elastic body and a piezoelectric body that has at least one pair of input electrodes that excites the elastic body, and a driving frequency of the ultrasonic motor is set. drive frequency setting means (2); phase shifting means (3) for outputting frequency signals having a phase difference with each other based on the output of the driving frequency setting means; An ultrasonic motor drive device comprising: a drive voltage setting means (4) for setting a voltage necessary to drive the ultrasonic motor; detecting the drive state of the ultrasonic motor; and adjusting the output to the drive frequency setting; Drive state detection means (1) input to the means
Based on the output of the drive state detection means, the drive frequency setting means sets the drive frequency of the ultrasonic motor to:
An ultrasonic motor drive device characterized in that the voltage is set to a frequency that maximizes the driving efficiency of the ultrasonic motor. (2) Setting an ultrasonic motor (100) using ultrasonic vibration that includes an elastic body and a piezoelectric body having at least one pair of input electrode parts that excites the elastic body, and a driving frequency of the ultrasonic motor. drive frequency setting means (2); phase shifting means (3) for outputting frequency signals having a phase difference with each other based on the output of the driving frequency setting means; An ultrasonic motor drive device comprising: drive voltage setting means (4) for setting a voltage necessary to drive the ultrasonic motor; detecting the drive state of the ultrasonic motor; and setting the output to the drive voltage setting; The drive voltage setting means includes a drive state detection means (1) for inputting an input to the drive state detection means, and the drive voltage setting means sets the drive voltage of the ultrasonic motor to the frequency signal according to the output of the drive state detection means. An ultrasonic motor drive device characterized in that the voltage is set to maximize drive efficiency.